Floating Point Arithmetic

Sept 23, 1999

Topics
IEEE Floating Point Standard
Rounding
Floating Point Operations
Mathematical properties
IA32 floating point
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15-213
The course that gives CMU its Zip!
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Floating Point Puzzles
For each of the following C expressions, either:
Argue that is true for all argument values
Explain why not true
x == (int)(float) x
x == (int)(double) x
f == (float)(double) f
d == (float) d
f == -(-f);
2/3 == 2/3.0
d < 0.0 ((d*2) < 0.0)
d > f -f < -d
d * d >= 0.0
(d+f)-d == f
int x = ;
float f = ;
double d = ;
Assume neither
d nor f is NAN
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IEEE Floating Point
IEEE Standard 754
Estabilished in 1985 as uniform standard for floating point arithmetic
Before that, many idiosyncratic formats
Supported by all major CPUs
Driven by Numerical Concerns
Nice standards for rounding, overflow, underflow
Hard to make go fast
Numerical analysts predominated over hardware types in defining
standard
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Fractional Binary Numbers
Representation
Bits to right of binary point represent fractional powers of 2
Represents rational number:
b
i
b
i1
b
2
b
1
b
0
b
1
b
2
b
3
b
j
.
1
2
4
2
i1

2
i



1/2
1/4
1/8
2
j
b
k
2
k
k=j
i

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Fractional Binary Number Examples
Value Representation
5-3/4 101.11
2

2-7/8 10.111
2

63/64 0.111111
2

Observation
Divide by 2 by shifting right
Numbers of form 0.111111
2
just below 1.0
Use notation 1.0 c
Limitation
Can only exactly represent numbers of the form x/2
k

Other numbers have repeating bit representations
Value Representation
1/3 0.0101010101[01]
2

1/5 0.001100110011[0011]
2
1/10 0.0001100110011[0011]
2


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Numerical Form
1
s
m 2
E
Sign bit s determines whether number is negative or positive
Mantissa m normally a fractional value in range [1.0,2.0).
Exponent E weights value by power of two
Encoding

MSB is sign bit
exp field encodes E
significand field encodes m
Sizes
Single precision: 8 exp bits, 23 significand bits
32 bits total
Double precision: 11 exp bits, 52 significand bits
64 bits total
Floating Point Representation
s exp significand
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Normalized Numeric Values
Condition
exp = 0000 and exp = 1111
Exponent coded as biased value
E = Exp Bias
Exp : unsigned value denoted by exp
Bias : Bias value
Single precision: 127 (Exp: 1254, E: -126127)
Double precision: 1023 (Exp: 12046, E: -10221023
in general: Bias = 2
m-1
- 1, where m is the number of exponent bits
Mantissa coded with implied leading 1
m = 1.xxxx
2

xxxx: bits of significand
Minimum when 0000 (m = 1.0)
Maximum when 1111 (m = 2.0 c)
Get extra leading bit for free
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Normalized Encoding Example
Value
Float F = 15213.0;
15213
10
= 11101101101101
2
= 1.1101101101101
2
X 2
13

Significand
m = 1.1101101101101
2

sig = 11011011011010000000000
2

Exponent
E = 13
Bias = 127
Exp = 140 = 10001100
2





Floating Point Representation (Class 02):
Hex: 4 6 6 D B 4 0 0
Binary: 0100 0110 0110 1101 1011 0100 0000 0000
140: 100 0110 0
15213: 1110 1101 1011 01
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Denormalized Values
Condition
exp = 0000
Value
Exponent value E = Bias + 1
Mantissa value m = 0.xxxx
2

xxxx: bits of significand
Cases
exp = 0000, significand = 0000
Represents value 0
Note that have distinct values +0 and 0
exp = 0000, significand = 0000
Numbers very close to 0.0
Lose precision as get smaller
Gradual underflow
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Interesting Numbers
Description Exp Significand Numeric Value
Zero 0000 0000 0.0
Smallest Pos. Denorm. 0000 0001 2

{23,52}
X 2

{126,1022}
Single ~ 1.4 X 10
45

Double ~ 4.9 X 10
324

Largest Denormalized 0000 1111 (1.0 c) X 2

{126,1022}
Single ~ 1.18 X 10
38

Double ~ 2.2 X 10
308

Smallest Pos. Normalized 0001 0000 1.0 X 2

{126,1022}
Just larger than largest denormalized
One 0111 0000 1.0
Largest Normalized 1110 1111 (2.0 c) X 2
{127,1023}
Single ~ 3.4 X 10
38

Double ~ 1.8 X 10
308
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Special Values
Condition
exp = 1111
Cases
exp = 1111, significand = 0000
Represents value (infinity)
Operation that overflows
Both positive and negative
E.g., 1.0/0.0 = 1.0/0.0 = +, 1.0/0.0 =
exp = 1111, significand = 0000
Not-a-Number (NaN)
Represents case when no numeric value can be determined
E.g., sqrt(1),
No fixed meaning assigned to significand bits
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Summary of Floating Point
Real Number Encodings
NaN
NaN
+
-
-0 +0
+Denorm +Normalized -Denorm -Normalized
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Tiny floating point example
Assume an 8-bit floating point representation where
the sign bit is in the most significant bit.
the next four bits are the exponent, with a bias of 7.
the last three bits are the significand.
Otherwise, the rules are the same as IEEE floating
point format (normalized, denormalized,
representation of 0, NaN, infinity)
s exp significand
0 2 3 6 7
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Values related to the exponent
Exp exp E

0 0000 -6 (denorms)
1 0001 -6
2 0010 -5
3 0011 -4
4 0100 -3
5 0101 -2
6 0110 -1
7 0111 0
8 1000 1
9 1001 2
10 1010 3
11 1011 4
12 1100 5
13 1101 6
14 1110 7
15 1111 (inf, Nan)
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Dyanamic Range
exp E value

0 0000 000 n/a 0
0 0000 001 -6 1/512
0 0000 010 -6 2/512

0 0000 110 -6 6/512
0 0000 111 -6 7/512
0 0001 000 -6 8/512
0 0001 001 -6 9/512

0 0110 110 -1 28/32
0 0110 111 -1 30/32
0 0111 000 0 1
0 0111 001 0 36/32
0 0111 010 0 40/32

0 1110 110 7 224
0 1110 111 7 240
0 1111 000 n/a inf
closest to zero
largest denorm
smallest norm
closest to 1 below
closest to 1 above
largest norm
Denormalized
numbers
Normalized
numbers
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Special Properties of Encoding
FP Zero Same as Integer Zero
All bits = 0
Can (Almost) Use Unsigned Integer Comparison
Must first compare sign bits
NaNs problematic
Will be greater than any other values
What should comparison yield?
Otherwise OK
Denorm vs. normalized
Normalized vs. infinity
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Floating Point Operations
Conceptual View
First compute exact result
Make it fit into desired precision
Possibly overflow if exponent too large
Possibly round to fit into significand
Rounding Modes (illustrate with $ rounding)
$1.40 $1.60 $1.50 $2.50 $1.50
Zero $1.00 $2.00 $1.00 $2.00 $1.00
Round down (-) $1.00 $2.00 $1.00 $2.00 $2.00
Round up (+) $1.00 $2.00 $2.00 $3.00 $1.00
Nearest Even (default) $1.00 $2.00 $2.00 $2.00 $2.00
Note:
1. Round down: rounded result is close to but no greater than true result.
2. Round up: rounded result is close to but no less than true result.
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A Closer Look at Round-To-Even
Default Rounding Mode
Hard to get any other kind without dropping into assembly
All others are statistically biased
Sum of set of positive numbers will consistently be over- or under-
estimated
Applying to Other Decimal Places
When exactly halfway between two possible values
Round so that least signficant digit is even
E.g., round to nearest hundredth
1.2349999 1.23 (Less than half way)
1.2350001 1.24 (Greater than half way)
1.2350000 1.24 (Half wayround up)
1.2450000 1.24 (Half wayround down)
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Rounding Binary Numbers
Binary Fractional Numbers
Even when least significant bit is 0
Half way when bits to right of rounding position = 100
2
Examples
Round to nearest 1/4 (2 bits right of binary point)
Value Binary Rounded Action Rounded Value
2-3/32 10.00011
2
10.00
2
(<1/2down)

2
2-3/16 10.00110
2
10.01
2
(>1/2up)

2-1/4
2-7/8 10.11100
2
11.00
2
(1/2up)

3
2-5/8 10.10100
2
10.10
2
(1/2down)

2-1/2


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FP Multiplication
Operands
(1)
s1
m1 2
E1
(1)
s2
m2 2
E2
Exact Result
(1)
s
m 2
E

Sign s: s1 ^ s2
Mantissa m: m1 * m2
Exponent E: E1 + E2
Fixing
Overflow if E out of range
Round m to fit significand precision
Implementation
Biggest chore is multiplying mantissas


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FP Addition
Operands
(1)
s1
m1 2
E1
(1)
s2
m2 2
E2
Assume E1 > E2
Exact Result
(1)
s
m 2
E

Sign s, mantissa m:
Result of signed align & add
Exponent E: E1
Fixing
Shift m right, increment E if m 2
Shift m left k positions, decrement E by k if m < 1
Overflow if E out of range
Round m to fit significand precision

(1)
s1
m1
(1)
s2
m2
E1E2
+
(1)
s
m
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Mathematical Properties of FP Add
Compare to those of Abelian Group
Closed under addition? YES

But may generate infinity or NaN
Commutative? YES
Associative? NO
Overflow and inexactness of rounding
0 is additive identity? YES
Every element has additive inverse ALMOST
Except for infinities & NaNs
Montonicity
a b a+c b+c? ALMOST
Except for infinities & NaNs
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Algebraic Properties of FP Mult
Compare to Commutative Ring
Closed under multiplication? YES
But may generate infinity or NaN
Multiplication Commutative? YES
Multiplication is Associative? NO
Possibility of overflow, inexactness of rounding
1 is multiplicative identity? YES
Multiplication distributes over addtion? NO
Possibility of overflow, inexactness of rounding
Montonicity
a b & c 0 a *c b *c? ALMOST
Except for infinities & NaNs
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Floating Point in C
C Supports Two Levels
float single precision
double double precision
Conversions
Casting between int, float, and double changes numeric values
Double or float to int
Truncates fractional part
Like rounding toward zero
Not defined when out of range
Generally saturates to TMin or TMax
int to double
Exact conversion, as long as int has 54 bit word size
int to float
Will round according to rounding mode

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Answers to Floating Point Puzzles
x == (int)(float) x No: 24 bit mantissa
x == (int)(double) x Yes: 53 bit mantissa
f == (float)(double) f Yes: increases precision
d == (float) d No: loses precision
f == -(-f); Yes: Just change sign bit
2/3 == 2/3.0 No: 2/3 == 1
d < 0.0 ((d*2) < 0.0) Yes!
d > f -f < -d Yes!
d * d >= 0.0 Yes!
(d+f)-d == f No: Not associative
int x = ;
float f = ;
double d = ;
Assume neither
d nor f is NAN
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x86 Floating Point
History
8086: first computer to implement IEEE fp
separate 8087 FPU (floating point unit)
486: merged FPU and Integer Unit onto one chip
Summary
Hardware to add, multiply, and divide
Floating point data registers
Various control & status registers
Floating Point Formats
single precision (C float): 32 bits
double precision (C double): 64 bits
extended precision: 80 bits
Instruction
decoder and
sequencer
FPU
Integer
Unit
Data Bus
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FPU Data Register Stack
FPU register format (extended precision)
s exp significand
0 63 64 78 79
R7
R6
R5
R4
R3
R2
R1
R0
st(0)
st(1)
st(2)
st(3)
st(4)
st(5)
st(6)
st(7)
Top
FPU register stack
stack grows down
wraps around from R0 -> R7
FPU registers are typically
referenced relative to top of
stack
st(0) is top of stack (Top)
followed by st(1), st(2),
push: increment Top, load
pop: store, decrement Top
stack grows down
absolute view stack view
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FPU instructions
Large number of floating point instructions and formats
~50 basic instruction types
load, store, add, multiply
sin, cos, tan, arctan, and log!

Sampling of instructions:
Instruction Effect Description

fldz push 0.0 Load zero
flds S push S Load single precision real
fmuls S st(0) <- st(0)*S Multiply
faddp st(1) <- st(0)+st(1); pop Add and pop

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Floating Point Code Example
Compute Inner Product of Two Vectors
Single precision arithmetic
Scientific computing and
signal processing workhorse
float ipf (float x[],
float y[],
int n)
{
int i;
float result = 0.0;

for (i = 0; i < n; i++) {
result += x[i] * y[i];
}
return result;
}
pushl %ebp # setup
movl %esp,%ebp
pushl %ebx

movl 8(%ebp),%ebx # %ebx=&x
movl 12(%ebp),%ecx # %ecx=&y
movl 16(%ebp),%edx # %edx=n
fldz # push +0.0
xorl %eax,%eax # i=0
cmpl %edx,%eax # if i>=n done
jge .L3
.L5:
flds (%ebx,%eax,4) # push x[i]
fmuls (%ecx,%eax,4) # st(0)*=y[i]
faddp # st(1)+=st(0); pop
incl %eax # i++
cmpl %edx,%eax # if i<n repeat
jl .L5
.L3:
movl -4(%ebp),%ebx # finish
leave
ret # st(0) = result
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Inner product stack trace
0
st(0)
1. fldz 2. flds (%ebx,%eax,4)
0
st(0)
x[0]
st(1)
3. fmuls (%ecx,%eax,4)
0
st(0)
x[0]*y[0]
st(1)
4. faddp %st,%st(1)
0 + x[0]*y[0]
st(0)
5. flds (%ebx,%eax,4)
0 + x[0]*y[0]
st(0)
x[1]
6. fmuls (%ecx,%eax,4)
0 + x[0]*y[0]
st(1)
x[1]*y[1]
st(0)
7. faddp %st,%st(1)
0 + x[0]*y[0] + x[1]*y[1]
st(0)
st(1)