3 MicropSysDesign

EED4403 Microprocessor-Based Systems
Intel 8088 (8086) Microprocessor Structure
Hasrulnizam Hashim, Dr. Esam Al_Qaralleh CE Department Princess Sumaya University for Technology
Microprocessor System Design 3-1
Overview
Textbook:
J. L. Antonakos, "An Introduction to the Intel Family of Microprocessors," Third Edition, Prentice Hall, 1999
Objectives:
The course will provide knowledge to build and program microprocessor-based systems. Microprocessor architecture Architecture of microprocessor-based systems Programming microprocessor-based systems Future trends
Grading:
Two midterms, one final exam, and homeworks
What are microprocessor-based systems?

Microprocessor-based systems are electrical systems consisting of microprocessors, memories, I/O units, and other peripherals.
Microprocessors are the brains of the systems Microprocessors access memories and other units through buses The operations of microprocessors are controlled by instructions stored in memories Microprocessor
Control unit Datapath ALU Reg.
Bus
Memory
Output units
Input units
3-3
Microprocessor System Design
What are microprocessors?

A microprocessor is a processor (or Central Processing Unit, CPU)
fabricated on a single integrated circuit.
Address bus
MAR PC IR
Control bus
Control unit X Y ALU ACC
Data bus
A simple microprocessor architecture

3-4
Evolution of Computers
First generation (1939-1954) - vacuum tube Second generation (1954-1959) - transistor Third generation (1959-1971) - IC Fourth generation (1971-present) - microprocessor
3-5
First generation (1939-1954) - vacuum tube
IBM 650, 1954 Http://history.acusd.edu/gen/recording/computer1.html http://www.cs.virginia.edu/brochure/museum.html http://www.columbia.edu/acis/history/650.html

3-6
Second generation (1954-1959) - transistor
Manchester University Experimental Transistor Computer Http://history.acusd.edu/gen/recording/computer1.html http://www.computer50.org/kgill/transistor/trans.html

Third generation (1959-1971) - IC
PDP-8, Digital Equipment Corporation
Thanks to the use of ICs, the DEC PDP-8 is the least expensive general purpose small computer in 1960s
Http://history.acusd.edu/gen/recording/computer1.html http://www.piercefuller.com/collect/pdp8.html
Fourth generation (1971-present) - microprocessor
In 1971, Intel developed 4-bit 4004 chip for calculator applications.
ROM/RAM buffer Timing Reset
Control logic Instruction decoder ALU I/O Reg. Program counter
Refresh logic System bus
http://www.intel.com
4004 chip layout
Block diagram of Intel 4004
A good review article: The History of The Microprocessor, Bell Labs Technical Journal, Autumn, Microprocessor System Design 1997 3-9
Evolution of Intel Microprocessors

Number of transistors
100,000,000 10,000,000 1,000,000 100,000 10,000 1,000 100 10 1 1974 1979 1982 1985 1989 1993 1997 1999 2000
Minimum transistor sizes (m)

8080
Pentium 80386 8088 8080 80286 P II 80486
P III
P4
6 5 4 3 2 1 0
8088 80386 80286

1974 1979 1982 1985
Pentium P II P III P 4 80486

1989 1993 1997 1999 2000
Clock frequencies (MHz)

10000
MIPS
10000
P4
1000
1000
P III Pentium P II 80386 80486 80286
P4
P II
100
Pentium 80386 8088 8080 80286 80486
P III
100 10 1 8080 8088 0.1
10
1 1974 1979
1982
1985
1989
1993
1997
1999
2000
1974 1979 1982 1985 1989 1993 1997 1999 2000
3-10
Other Commercial Microprocessors

PowerPC (IBM, Motorola) Athlon, Dulon, Hammer (AMD) Crusoe (Transmeta) SPARC, UltraSPARC (Sun Microsystems) TIs TMS DSP chips (Texas Instruments) StarCore (Motorola, Agere) ARM cores (Advanced RISC Machines) MIPS cores (MIPS Technologies) yyyyyy
Applications of Microprocessor-Based Systems

Computers
System performance is normally the most important design concern
...
Keyboard
Monitor Bus
Disk
Other peripherals
...
3-12
Microprocessor
Memory
Timing & control
Interrupt control
Block diagram of a computer
1.3 System block diagram

Crystal oscillator Timing circuitry
(counters dividing to lower frequencies) ROM (Read Only Memory) (start-up program) RAM (Random Access Memory) Bus controller QP + DRAM (Dynamic RAM) associated Bus drivers high capacity, refresh needed logic SRAM (Static RAM) - low Coprocessor circuitry: power, fast, easy to interface
Timing
CPU
Memory
System bus (data, address & control signals) Parallel I/O

Many wires, fast.
Printer (high resolution) External memory Floppy Disk Hard Disk Compact Disk Other high speed devices
Serial I/O
Simple (only two wires + ground) but slow.
Printer (low resolution) Modem Operators console Mainframe Personal computer
Interrupt circuitry
At external unexpected events, QP has to interrupt the main program execution, service the interrupt request (obviously a short subroutine) and retake the main program from the point where it was interrupt.
The Personal Computer

Speaker
Timer logic (8253)
Processor (8086 trough Pentium
Coprocessor (8087 trough 80387
System ROM
640KB DRAM
System bus (data, address & control signals) Keyboard logic (8253) DMA Controller (8237)
Video card Disk controller Serial port ... Extension slots
Expansion logic
Interrupt logic (8259)
Keyboard

Microcontrollers
A microcontroller is a simple computer implemented in a single VLSI chip. In general, microcontrollers are cheap and have low performance Microcontrollers are widely used in industrial control, automobile and home applications
OSC. CPU
RAM
ROM
I/O port Timer Interrupt USART A/D, D/A
Block diagram of a microcontroller


ASICs
Microprocessors are embedded into ASIC chips to implement complex functions In general, it requires that the microprocessors have low power consumption and take small silicon area
http://www.ti.com
A TI baseband chip for cellular phone applications

Class Objectives
Hardware architecture of microprocessor-based systems
Microprocessor architecture Memory organization I/O units of microprocessor-based systems How to put them together
Programming of microprocessor-based systems

Intel 80x86 instruction set Microprocessor Interrupt services Assembly language programming
3-17
Overview & Review

Overview
Intel 8088 facts
20 bit address bus allow accessing
1 M memory locations
VDD (5V)
16-bit internal data bus and 8-bit

external data bus. Thus, it need two read (or write) operations to read (or write) a 16-bit datum
8-bit data control signals To 8088 CLK 18001 18000 5A 2F High byte of word Low byte of word GND
20-bit address
8088
Byte addressable and byte-swapping

Word: 5A2F
control signals from 8088
8088 signal classification

Memory locations
yy
yyy
Organization of 8088
Address bus (20 bits) AH BH CH AL BL CL DL SP BP SI DI ALU Data bus (16 bits) Segment register CS DS SS ES IP Data bus (16 bits) General purpose register 7
Execution Unit (EU)
DH
Bus control ALU EU control Flag register Instruction Queue External bus
Bus Interface Unit (BIU)

General Purpose Registers

15 8 7 0
AX BX
AH BH CH DH
AL BL CL DL
Accumulator Base Counter Data
Data Group
CX DX
SP
Stack Pointer Base Pointer Source Index Destination Index

3-21
Pointer and Index Group
BP SI DI
Arithmetic Logic Unit (ALU)

A
n bits
B
n bits
F 0 0 0 0 1 1 0 0 1 1 0 0
Y 0 A+ B 1 A -B 0 A -1 1 A and B 0 A or B 1 not A y y y
Carry Y= 0 ? A> B ? F
y y y Y
Signal F control which function will be conducted by ALU. Signal F is generated according to the current instruction. Basic arithmetic operations: addition, subtraction, yyyyy Basic logic operations: and, or, xor, shifting,yyyyy
Flag Register
Flag register contains information reflecting the current status of a microprocessor. It also contains information which controls the operation of the microprocessor.
15
0 OF DF IF TF SF ZF AF PF CF
Control Flags
IF: DF: TF: Interrupt enable flag Direction flag Trap flag
Status Flags
CF: PF: AF: ZF: SF: OF: Carry flag Parity flag Auxiliary carry flag Zero flag Sign flag Overflow flag
3-23
Instruction Machine Codes

Instruction machine codes are binary numbers
For Example: 1000100011000011
MOV Register mode
MOV AL, BL
Machine code structure

Opcode Mode Operand1 Operand2
Some instructions do not have operands, or have only one operand Opcode tells what operation is to be performed. (EU control logic generates ALU control signals according to Opcode) Mode indicates the type of a instruction: Register type, or Memory type Operands tell what data should be used in the operation. Operands can
be addresses telling where to get data (or where to store results)

EU Operation
1. Fetch an instruction from instruction queue 2. According to the instruction, EU control logic generates control signals. (This process is also referred to as instruction
decoding)
AH BH CH DH SP BP SI DI AL BL CL DL General purpose register
3. Depending on the control signal, EU performs one of the following operations:

An arithmetic operation A logic operation Storing a datum into a register Moving a datum from a register Changing flag register
ALU
ALU Data bus (16 bits)
EU control
Flag register
instruction 1011000101001010
3-25
Generating Memory Addresses

How can a 16-bit microprocessor generate 20-bit memory addresses?
Left shift 4 bits 16-bit register 0000 Offset FFFFF Addr1 + 0FFFF Offset Segment address 00000 Intel 80x86 memory address generation 1M memory space Segment (64K)
16-bit register
Addr1
20-bit memory address
3-26
Memory Segmentation
A segment is a 64KB block of memory starting from any 16-byte
boundary
For example: 00000, 00010, 00020, 20000, 8CE90, and E0840 are all valid segment addresses The requirement of starting from 16-byte boundary is due to the 4-bit left shifting
Segment registers in BIU

15 0
CS DS SS ES
Code Segment Data Segment Stack Segment Extra Segment

3-27
Memory Address Calculation

Segment addresses must be stored in segment registers Offset is derived from the combination of pointer registers, the Instruction Pointer (IP), and immediate values Examples
CS 3 IP + Instruction address 3 DS 1 4 8 4 2 A 0 1 4 SS 5 SP + Stack address 5 0 0 0 0 F F E 0 F F E 0 Segment address 0000
Offset Memory address
8 A B 4 4 2 6 0 2 2
2 3 0 0 DI + Data address 1 2 3
3-28
Fetching Instructions
Where to fetch the next instruction?
8088 CS IP 1234 0012 12352 Memory
12352
MOV AL, 0
Update IP
After an instruction is fetched, Register IP is updated as follows:
IP = IP + Length of the fetched instruction

For Example: the length of MOV AL, 0 is 2 bytes. After fetching this instruction, the IP is updated to 0014
3-29
Accessing Data Memory

There is a number of methods to generate the memory address when accessing data memory. These methods are referred to as Addressing Modes Examples:
Direct addressing: MOV AL, [0300H] DS Memory address 1 1 2 3 0 3 2 6 4 0 4 0 0 0 (assume DS=1234H)
Register indirect addressing: MOV AL, [SI] DS Memory address 1 1 2 3 4 0 0 3 1 0 2 6 5 0 (assume DS=1234H) (assume SI=0310H)
3-30
Reserved Memory Locations

Some memory locations are reserved for special purposes. Programs should not be loaded in these areas
FFFFF
Locations from FFFF0H to FFFFFH are used for system reset code
Reset instruction area Interrupt pointer table
FFFF0
Locations from 00000H to 003FFH are used for the interrupt pointer table
It has 256 table entries Each table entry is 4 bytes 256 v 4 = 1024 = memory addressing space From 00000H to 003FFH
003FF 00000
3-31
Interrupts
An interrupt is an event that occurs while the processor is executing a program The interrupt temporarily suspends execution of the program and switch the processor to executing a special routine (interrupt service routine) When the execution of interrupt service routine is complete, the processor resumes the execution of the original program Interrupt classification Hardware Interrupts
Caused by activating the processors interrupt control signals (NMI, INTR)
Software Interrupts
Caused by the execution of an INT instruction Caused by an event which is generated by the execution of a program, such as division by zero
8088 can have 256 interrupts

Minimum and Maximum Operation modes

Intel 8088 (8086) has two operation modes: Minimum Mode
8088 generates control signals for memory and I/O operations Some functions are not available in minimum mode Compatible with 8085-based systems
Maximum Mode
It needs 8288 bus controller to generate control signals for memory and I/O operations It allows the use of 8087 coprocessor; it also provides other functions
3-33

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EED4403 Microprocessor-Based Systems

Intel 8088 (8086) Microprocessor Structure

What are microprocessor-based systems?

Microprocessor System Design

What are microprocessors?

Control unit X Y ALU ACC

A simple microprocessor architecture

Microprocessor System Design

IBM 650, 1954 Http://history.acusd.edu/gen/recording/computer1.html http://www.cs.virginia.edu/brochure/museum.html http://www.columbia.edu/acis/history/650.html

Microprocessor System Design

Manchester University Experimental Transistor Computer Http://history.acusd.edu/gen/recording/computer1.html http://www.computer50.org/kgill/transistor/trans.html

Control logic Instruction decoder ALU I/O Reg. Program counter

Refresh logic System bus

Block diagram of Intel 4004

Evolution of Intel Microprocessors

Minimum transistor sizes (m)

Pentium 80386 8088 8080 80286 P II 80486

8088 80386 80286

Pentium P II P III P 4 80486

Clock frequencies (MHz)

P III Pentium P II 80386 80486 80286

Pentium 80386 8088 8080 80286 80486

100 10 1 8080 8088 0.1

1974 1979 1982 1985 1989 1993 1997 1999 2000

Microprocessor System Design

Other Commercial Microprocessors

Applications of Microprocessor-Based Systems

Timing & control

Block diagram of a computer

Microprocessor System Design

1.3 System block diagram

System bus (data, address & control signals) Parallel I/O

The Personal Computer

Timer logic (8253)

Processor (8086 trough Pentium

Coprocessor (8087 trough 80387

Interrupt logic (8259)

Applications of Microprocessor-Based Systems

I/O port Timer Interrupt USART A/D, D/A

Block diagram of a microcontroller

Applications of Microprocessor-Based Systems

A TI baseband chip for cellular phone applications

Programming of microprocessor-based systems

Microprocessor System Design

Overview & Review

 16-bit internal data bus and 8-bit

 Byte addressable and byte-swapping

control signals from 8088

8088 signal classification

Execution Unit (EU)

Bus Interface Unit (BIU)

General Purpose Registers

Accumulator Base Counter Data

Stack Pointer Base Pointer Source Index Destination Index

Pointer and Index Group

Arithmetic Logic Unit (ALU)

Microprocessor System Design

Instruction Machine Codes

Machine code structure

be addresses telling where to get data (or where to store results)

3. Depending on the control signal, EU performs one of the following operations:

ALU Data bus (16 bits)

16-bit internal data bus and 8-bit

Byte addressable and byte-swapping