By: Ms.

Nirmala Shinde

Contents
y Definition of microprocessor y Architecture of 8085 y System Bus, y Pin Configuration 8085 Microprocessor. y Addressing modes.

Definition
microprocessor is responsible for performing all the functions & commands of a computer. y Every s/w program & every h/w component of the computer is dependent upon the microprocessor. y The processor manipulates data through the s/w, and transfers information between the other h/w components of the computer, such as the memory and the keyboard.
y The

Definition
y The microprocessor, also known as the

central processing unit (CPU), is essentially what makes a computer work.

y The microprocessor forms the heart of the

computer, along with the memory.

Introduction to 8085
y Introduced in 1977. y It is 8-bit MP. y It is a 40 pin dual-in-line chip. y It uses a single +5V supplyfor its operations. y Its clock speed is about 3MHz.

Architecture of 8085

Three Units of 8085

y Processing Unit y Instruction Unit y Storage and Interface Unit

Processing Unit
y Arithmetic and Logic Unit y Accumulator y Status Flags y Temporary Register

Instruction Unit
y Instruction Register y Instruction Decoder y Timing and Control Unit

Storage & Interface Unit

y General Purpose Registers y Stack Pointer y Program Counter y Increment/Decrement Register y Address Latch y Address/Data Latch

Other Units
y Interrupt Controller y Serial I/O Controller y Power Supply

Accumulator
y It the main register of microprocessor. y It is also called register A. y It is an 8-bit register. y It is used in the arithmetic and logic operations. y It always contains one of the operands on which

arithmetic/logic has to be performed.

y After the arithmetic/logic operation, the contents of

accumulator are replaced by the result.

Temporary Register
y It is an 8-bit register. y It is used to store temporary 8-bit operand

from general purpose register.

y It is also used to store intermediate results.

Arithmetic & Logic Unit

y It performs various arithmetic and logic

operations.
y The data is available in accumulator and

temporary/general purpose registers.

y Arithmetic Operations:
y Addition, Subtraction, Increment, Decrement etc.

y Logic Operations:
y AND, OR, X-OR, Complement etc.

Status Flag
y Status Flags are set of flip-flops which are

used to check the status of Accumulator after the operation is performed.

D7 S D6 Z D5 X D4 AC D3 X D2 P D1 X D0 CY

X = Dont Care Condition

Status Flag
Flag S Z AC P CY Meaning Sign Flag Zero Flag Auxiliary Carry Flag Parity Flag Carry Flag

Status Flag
y Sign Flag (S)
y It tells the sign of result stored in Accumulator

after the operation is performed.

y If result is ve, sign flag is set (1). y If result is +ve, sign flag is reset (0).

Status Flag
y Zero Flag (Z)
y It tells whether the result stored in Accumulator

is zero or not after the operation is performed.

y If result is zero, zero flag is set (1). y If result is not zero, zero flag is reset (0).

Status Flag
y Auxiliary Carry Flag (AC)
y It is used in BCD operations. y When there is carry in BCD addition, we add

0110 (6) to the result.

y If there is carry in BCD addition, auxiliary carry

is set (1).
y If there is no carry, auxiliary carry is reset (0).

Status Flag
y Parity Flag (P)
y It tells the parity of data stored in Accumulator. y If parity is even, parity flag is set (1). y If parity is odd, parity flag is reset (0).

Program Status Word (PSW)

y The contents of Accumulator and Status

Flags clubbed together is known as Program Status Word (PSW).

y It is a 16-bit word.

Instruction Register
y It is used to hold the current instruction

which the microprocessor is about to execute.

y It is an 8-bit register.

Instruction Decoder
y It interprets the instruction stored in

instruction register.
y It generates various machine cycles

depending upon the instruction.

y The machine cycles are then given to the

Timing and Control Unit.

Timing And Control Unit

y It controls all the operations of

microprocessor and peripheral devices.

y Depending upon the machine cycles

received from Instruction Decoder, it generates 12 control signals:

y S0 and S1 (Status Signals). y ALE (Address Latch Enable).

Timing And Control Unit

y RD (Read, active low). y WR (Write, active low). y IO/M (Input-Output/Memory) y READY y RESET IN y RESET OUT y CLK OUT y HOLD and HLDA

General Purpose Register

y There are 6 general purpose registers, namely B, C,

D, E, H, L.
y Each of the them is 8-bit register. y They are used to hold data and results. y To hold 16-bit data, combination of two 8-bit

registers can be used.

y This combination is known as Register Pair. y The valid register pairs are:
y B C, D E, H L.

Program Counter
y It is used to hold the address of next

instruction to be executed.
y It is a 16-bit register. y The microprocessor increments the value of

Program Counter after the execution of the current instruction, so that, it always points to the next instruction.

Stack Pointer
y It holds the address of top most item in the

stack.
y It is also 16-bit register. y Any portion of memory can be used as

stack.

Increment/Decrement Register
y This register is used to increment or

decrement the value of Stack Pointer.

y During PUSH operation, the value of Stack

Pointer is incremented.
y During POP operation, the value of Stack

Pointer is decremented.

Address Latch
y It is group of 8 buffers. y The upper-byte of 16-bit address is stored in

this latch.
y And then it is made available to the

peripheral devices.
y The lower-byte of address and 8-bit of data

are multiplexed.

Address Latch
y It holds either lower-byte of address or 8-bits of

data.
y This is decided by ALE (Address Latch Enable)

signal.
y If ALE = 1 then
y Address/Data Latch contains lower-byte of address.

y If ALE = 0 then
y It contains 8-bit data.

Serial I/O Controller

y It is used to convert serial data into parallel an

parallel data into serial.

y Microprocessor works with 8-bit parallel data. y Serial I/O devices works with serial transfer of

data.
y Therefore, this unit is the interface between

microprocessor and serial I/O devices.

Interrupt Controller
y It is used to handle the interrupts. y There are 5 interrupt signals in 8085:
y TRAP y RST 7.5 y RST 6.5 y RST 5.5 y INTR

Interrupt Controller
y Interrupt controller receives these interrupts

according to their priority and applies them to the microprocessor.

y There is one outgoing signal INTA which is

called Interrupt Acknowledge.

Power Supply
y This unit provides +5V power supply to the

microprocessor.
y The microprocessor needs +5V power supply

for its operation.

System Bus
y The CPU sends various data values, instructions

and information to all the devices and components inside the computer.
y If you look at the bottom of a motherboard you'll

see a whole network of lines or electronic pathways that join the different components together.
y This network of wires or electronic pathways is

called the 'Bus'.

System Bus
y Types of Bus
y Data Bus y Address Bus y Control Bus

Data Bus
y A collection of wires through which data is

transmitted from one part of a computer to another is called Data Bus.

y Data Bus can be thought of as a highway on

which data travels within a computer.

y This bus connects all the computer

components to the CPU and main memory.

Data Bus
y The size (width) of bus determines how

much data can be transmitted at one time.

y E.g.:
y A 16-bit bus can transmit 16 bits of data at a

time.
y 32-bit bus can transmit 32 bits at a time.

Address Bus
y A collection of wires used to identify

particular location in main memory is called Address Bus.

y Or in other words, the information used to

describe the memory locations travels along the address bus.

Address Bus
y The size of address bus determines how many

unique memory locations can be addressed.

y E.g.:
y A system with 4-bit address bus can address 24 = 16

Bytes of memory.
y A system with 16-bit address bus can address 216 =

64 KB of memory.
y A system with 20-bit address bus can address 220 = 1

MB of memory.

Control Bus
y The connections that carry control information

between the CPU and other devices within the computer is called Control Bus.
y The control bus carries signals that report the

status of various devices.

y E.g.:
y This bus is used to indicate whether the CPU is

reading from memory or writing to memory.

Pin Diagram of 8085

X1 & X2 Pin 1 & Pin 2 (Input)

y These are also called

Crystal Input Pins.

y 8085 can generate clock

signals internally.
y To generate clock

signals internally, 8085 requires external inputs from X1 & X2.

RESET IN & RESET OUT Pin 36 (Input) & Pin 3 (Output)

y RESET IN:
y It is used to reset the

microprocessor.
y It is active low signal. y When the signal on this

pin is low for at least 3 clocking cycles, it forces the microprocessor to reset itself.

RESET IN & RESET OUT Pin 36 (Input) & Pin 3 (Output)

y Resetting the microprocessor:
y Clearing the PC and IR. y Disabling

all

interrupts

(except TRAP).
y Disabling the SOD pin. y All the buses (data, address,

control) are tri-stated.

y Gives HIGH output to RESET

OUT pin.

RESET IN & RESET OUT Pin 36 (Input) & Pin 3 (Output)

y RESET OUT:
y It is used to reset the peripheral

devices & other ICs on the circuit.

y It is an output active high signal. y The output on this pin goes high

whenever RESET IN is given low signal.

y The output remains high as long

as RESET IN is kept low.

SID & SOD Pin 4 (Input) & Pin 5 (Output)

y Serial Input Data (SID):
y It takes 1 bit input from serial

port of 8085.
y Stores the bit at the 8th position

(MSB) of the Accumulator.

y RIM

(Read

Interrupt

Mask)

instruction is used to transfer the bit.

SID & SOD Pin 4 (Input) & Pin 5 (Output)

y Serial Output Data (SOD):
y It takes 1 bit from Accumulator

to serial port of 8085.

y Takes the bit from the 8th

position (MSB) of the Accumulator.

y SIM (Set Interrupt Mask)

instruction is used to transfer the bit.

Interrupt Pins
y Interrupt
y It means interrupting the normal execution of the micro-

processor.
y When

microprocessor

receives

interrupt

signal,

it

discontinues whatever it was executing.

y It starts executing new program indicated by the interrupt

signal.
y Interrupt

signals are generated by external peripheral

devices.
y After execution of the new program, microprocessor goes

back to the previous program.

Sequence of Steps Whenever There is an Interrupt

y Microprocessor completes execution of current

instruction of the program.

y PC contents are stored in stack. y PC is loaded with address of the new program. y After executing the new program, the micro-

processor returns back to the previous program.

y It goes to the previous program by reading the top

value of stack.

Five Hardware Interrupts in 8085

y TRAP y RST 7.5 y RST 6.5 y RST 5.5 y INTR

Classification of Interrupts
y Maskable and Non-Maskable y Vectored and Non-Vectored y Edge Triggered and Level Triggered y Priority Based Interrupts

Maskable Interrupts
y Maskable interrupts are those interrupts which can

be enabled or disabled.
y Enabling and Disabling is done by software

instructions.
y List of Maskable Interrupts
y RST 7.5 y RST 6.5 y RST 5.5 y INTR

Non-Maskable Interrupts
y The interrupts which are always in enabled

mode are called non-maskable interrupts.

y These interrupts can never be disabled by

any software instruction.

y TRAP is a non-maskable interrupt.

Vectored Interrupts
y The interrupts which have fixed memory location

for transfer of control from normal execution.

y Each vectored interrupt points to the particular

location in memory.
y List of vectored interrupts
y RST 7.5 y RST 6.5 y RST 5.5 y TRAP

Vectored Interrupts
y The addresses to which program control

goes:

Name Vectored Address RST 7.5 003C H (7.5 x 0008 H) RST 6.5 0034 H (6.5 x 0008 H) RST 5.5 002C H (5.5 x 0008 H) TRAP 0024 H (4.5 x 0008 H)

y Absolute address is calculated by

multiplying the RST value with 0008 H.

Non-Vectored Interrupts
y The interrupts which don't have fixed

memory location for transfer of control from normal execution.

y The address of the memory location is sent

along with the interrupt.

y INTR is a non-vectored interrupt.

Edge Triggered Interrupts

y The interrupts which are triggered at

leading or trailing edge are called edge triggered interrupts.

y RST 7.5 is an edge triggered interrupt. y It is triggered during the leading (positive)

edge.

Level Triggered Interrupts

y The interrupts which are triggered at high

or low level are called level triggered interrupts.

y RST 6.5 y RST 5.5 y INTR

y TRAP is edge and level triggered interrupt.

Priority Based Interrupts

y Whenever there exists a simultaneous request at two or

more pins then the pin with higher priority is selected by the microprocessor.
y Priority is considered only when there are simultaneous

requests.
y Priority of interrupts:

Interrupt
TRAP RST 7.5 RST 6.5 RST 5.5 INTR

Priority
1 2 3 4 5

TRAP Pin 6 (Input)

y It is an non-maskable interrupt. y It has the highest priority. y It cannot be disabled. y It is both edge and level triggered. y It means TRAP signal must go

from low to high.

y And must remain high for a

certain period of time.

y TRAP is usually used for power

failure and emergency shutoff.

RST 7.5 Pin 7 (Input)

y It is a maskable interrupt. y It has the second highest priority. y It is positive edge triggered only. y The internal flip-flop is triggered

by the rising edge.

y The flip-flop remains high until it

is cleared by RESET IN.

RST 6.5 Pin 8 (Input)

y It is a maskable interrupt. y It has the third highest priority. y It is level triggered only. y The pin has to be held high for a

specific period of time.

y RST 6.5 can be enabled by EI

instruction.
y It can be disabled by DI

instruction.

RST 5.5 Pin 9 (Input)

y It is a maskable interrupt. y It has the fourth highest priority. y It is also level triggered. y The pin has to be held high for a

specific period of time.

y This interrupt is very similar to

RST 6.5.

INTR Pin 10 (Input)

y It is a maskable interrupt. y It has the lowest priority. y It is also level triggered. y It is a general purpose interrupt. y By general purpose we mean that

it can be used to vector microprocessor to any specific subroutine having any address.

INTA Pin 11 (Output)

y It stands for interrupt acknowledge. y It is an out going signal. y It is an active low signal. y Low output on this pin indicates

that microprocessor has acknowledged the INTR request.

Address and Data Pins

y Address Bus
y The address bus is used to send address to memory. y It selects one of the many locations in memory. y Its size is 16-bit.

y Data Bus
y It is used to transfer data between microprocessor

and memory.
y Data bus is of 8-bit.

AD0-AD7 Pin 19-12 (Bidirectional)

y These pins serve the dual purpose

of transmitting lower order address and data byte.

y During 1st clock cycle, these pins

act as lower half of address.

y In remaining clock cycles, these

pins act as data bus.

y The separation of lower order

address and data is done by address latch.

A8-A15 Pin 21-28 (Unidirectional)

y These pins carry the higher order of

address bus.
y The address is sent from

microprocessor to memory.
y These 8 pins are switched to high

impedance state during HOLD and RESET mode.

ALE Pin 30 (Output)

y It is used to enable Address

Latch.
y It indicates whether bus

functions as address bus or data bus.

y If ALE = 1 then
y Bus functions as address bus

y If ALE = 0 then
y Bus functions as data bus.

S0 & S1 Pin 29 & 33 (Output)

y S0 and S1 are called Status Pins. y They tell the current operation

which is in progress in 8085.

S0
0 0 1 1

S1
0 1 0 1

Operation
Halt Write Read Op-code Fetch

IO/M Pin 34 (Output)

y This pin tells whether I/O or

memory operation is being performed.

y If IO/M = 1 then
y I/O operation is being

performed.
y If IO/M = 0 then
y Memory operation is being

performed.

IO/M Pin 34 (Output)

y The operation being performed is indicated by S0

and S1.
y If S0 = 0 and S1 = 1 then
y It indicates WRITE operation.

y If IO/M = 0 then
y It indicates Memory operation.

y Combining these two we get Memory Write

Operation.

Table Showing IO/M S0, S1 & Corresponding Operations

Operation
Op-code Fetch Memory Read Memory Write I/O Read I/O Write Interrupt Ack. Halt

IO/M
0 0 0 1 1 1 High Impedance

S0
1 1 0 1 0 1 0

S1
1 0 1 0 1 1 0

RD Pin 32 (Output)
y RD stands for Read. y It is an active low signal. y It is a control signal used for Read

operation either from memory or from Input device.

y A low signal indicates that data on

the data bus must be placed either from selected memory location or from input device.

WR Pin 31 (Output)
y WR stands for Write. y It is also active low signal. y It is a control signal used for Write

operation either into memory or into output device.

y A low signal indicates that data on

the data bus must be written into selected memory location or into output device.

READY Pin 35 (Input)

y This pin is used to synchronize

slower peripheral devices with fast microprocessor.

y A low value causes the micro-

processor to enter into wait state.

y The microprocessor remains in wait

state until the input at this pin goes high.

HOLD Pin 38 (Input)

y HOLD pin is used to request the

microprocessor for DMA transfer.

y A high signal on this pin is a

request to microprocessor to relinquish the hold on buses.

y This request is sent by DMA

controller.
y Intel 8257 and Intel 8237 are two

DMA controllers.

HLDA Pin 39 (Output)

y HLDA stands for Hold Acknowledge. y The microprocessor uses this pin to

acknowledge the receipt of HOLD signal.

y When HLDA signal goes high,

address bus, data bus, RD, WR, IO/M pins are tri-stated.
y This means they are cut-off from

external environment.

HLDA Pin 39 (Output)

y The control of these buses goes to

DMA Controller.
y Control remains at DMA Controller

until HOLD is held high.

y When HOLD goes low, HLDA also

goes low and the microprocessor takes control of the buses.

VSS & VCC Pin 20 & 40 (Input)

y +5V power supply is connected

to VCC.
y Ground signal is connected to

VSS.

Addressing Modes of 8085

y To perform any operation, we have to give the

corresponding instructions to the microprocessor.

y In each instruction, programmer has to specify

3 things:
y Operation to be performed. y Address of source of data. y Address of destination of result.

Addressing Modes of 8085

y The method by which the address of source

of data or the address of destination of result is given in the instruction is called Addressing Modes.
y The term addressing mode refers to the way

in which the operand of the instruction is specified.

Types of Addressing Modes

y Intel 8085 uses the following addressing

modes:
y Direct Addressing Mode y Register Addressing Mode y Register Indirect Addressing Mode y Immediate Addressing Mode y Implicit Addressing Mode

Direct Addressing Mode

y In this mode, the address of the operand is

given in the instruction itself.

LDA 2500 H Load the contents of memory location 2500 H in accumulator.

y LDA is the operation. y 2500 H is the address of source. y Accumulator is the destination.

Register Addressing Mode

y In this mode, the operand is in general

purpose register.
MOV A, B Move the contents of register B to A.

y MOV is the operation. y B is the source of data. y A is the destination.

Register Indirect Addressing Mode

y In this mode, the address of operand is

specified by a register pair.

MOV A, M Move data from memory location specified by H-L pair to accumulator.

y MOV is the operation. y M is the memory location specified by y H-L register pair. y A is the destination.

Immediate Addressing Mode

y In this mode, the operand is specified within

the instruction itself.

MVI A, 05 H Move 05 H in accumulator.

y MVI is the operation. y 05 H is the immediate data (source). y A is the destination.

Implicit Addressing Mode

y If address of source of data as well as address

of destination of result is fixed, then there is no need to give any operand along with the instruction.
CMA Complement accumulator.

y CMA is the operation. y A is the source. y A is the destination.