MICROCONTROLLER

What is a microprocessor?
The microprocessor is the integration of a
number of useful functions.These functions are:

The ability to execute a stored set of instructions

to carry out user defined tasks.

General-purpose microprocessor.

Act as CPU for Computers.

No RAM, ROM, I/O on CPU chip itself

Example Intel’s x86, Motorola’s 680x0

 CPU Data Bus

General-
Purpose Serial
RAM ROM I/O Timer
Micro- COM
Port
processor Port

Address Bus

What is Microcontroller?
Microcontroller is a device which integrates a
number of the components of a microprocessor
system onto a single microchip.
So a microcontroller combines onto the same
microchip :
The CPU core
Memory (both ROM and RAM)
Some parallel digital I/O
Example Motorola’s 6811, Intel’s 8051, Zilog’s Z8
and PIC 16X,ATMEL 89S51,52 etc…
 Microprocessor vs Micro-controllers

Microprocessors
High end of market where performance matters
High power dissipation–high cost
Need peripheral devices to work
Mostly used in microcomputers.

Microcontollers
Targeted for low end of market where performance
does not matter
Low power dissipation –low cost
Memory plus I/O devices, all integrated into one
chip
Mostly used in embedded systems
 Embedded Systems

Embedded system means the processor is

embedded into that application.

An embedded product uses a microprocessor or

microcontroller to do one task only.

In an embedded system, there is only one

application software that is typically burned into
ROM.

Example printer, keyboard, video game player

Criteria in Choosing a Microcontroller
1. Meeting the computing needs of the task
efficiently and cost effectively

 Speed, the amount of ROM and RAM, the number

of I/O ports and timers, size, packaging, power
consumption
 Cost per unit

2.Availability of software development tools

assemblers, debuggers, C compilers, emulator,
simulator, technical support
3.Wide availability and reliable sources of the
microcontrollers.
 Introduction to Microcontroller
The microcontroller is a very common component in
modern electronic systems. Its use is so widespread that it
is almost impossible to work in electronics without coming
across it. Microcontroller are used in a wide number of
electronic systems such as:

Engine management systems in automobiles.

Keyboard of a PC.
Electronic measurement instruments (such as digital
multimeters, frequency synthesisers, and oscilloscopes)
Printers,Mobile phones.
Televisions, radios, CD players, tape recording
equipment.
 Security alarm systems, fire alarm systems, and
building services systems.
 Special-purpose Applications.

Features of 8051
ROM - 4K bytes
RAM - 128 bytes
Timer - 2
I/O pins - 32
Serial port - 1
Interrupt sources - 6

 8051 is based on CISC architecture.

 It is based on Harvard architecture. So, it has
separate program and data memory.
 Comparison of 8051 Family Members
Features 8051 8052 8031
ROM 4K 8K 0K
RAM 128 256 128
Timers 2 3 2
I/O pins 32 32 32
Serial port 1 1 1
Interrupt Sources 6 8 6
8051 from Atmel
Part no ROM RAM I/O pins Timers Interrupt Vcc Packaging
AT89C51 4K 128 32 2 6 5V 40
AT89LV51 4K 128 32 2 6 3V 40
AT89C1051 1K 64 15 1 3 3V 20
AT89C2051 2K 128 15 2 6 3V 20
AT89C52 8K 128 32 3 8 5V 40
AT89LV52 8K 128 32 3 8 3V 40

“C” in the part no indicates CMOS

 Architecture
Based on the instruction set used:
CISC
RISC
CISC
Complex Instruction Set Controller.

It invariably employ a microcode for decoding the

instructions and generate the necessary control
signals for performing the intended operation.

When an instruction is fetched from memory, it is

compared with the existing bit pattern, when match
is found it generates the associated control signals
to ALU and registers.
It takes good amount of time to decode the
meaning of complex instructions which perform
more than one operation.
Also microcode requires more number of
transistors that are used in fabricating the CISC
architecture based processors.
RISC
Reduced Instruction Set Controller.
These are fast at numerical computations required
in science, graphics and engineering applications.
The total number of transistors used for the design
of RISC is half the number used in CISC.
This reduced number of transistors reduces the
power consumption.
 Computer Architecture
Depending on how external memory is connected to
the processors:
Von-Neumann machine.
Harvard machine.
Von-Neumann machine
It has 3 hardware subsystems; a CPU, a main
memory system and an I/O system.
It uses stored program concept i.e., the program
and data are stored in the same memory unit.
It has a single path between the main memory
system and the control unit of the CPU.Because the
common path is used to access both the program as
well as the data, there is possibility of congestion on
the bus.This situation is called Von Neumann
 Harvard machine
It uses separate memories for storing the program
and data.

To connect these separate memories, it uses a

separate set of address, data and control lines.

As separate memories and buses are used,

simultaneous access to the memory is possible
without any congestion over the bus, which in turn
increases the performances.

It increases the cost of the system as separate

memories & separate buses are used.
 Block Diagram of 8051
External interrupts
On-chip Timer/Counter Counter
Interrupt ROM for Inputs
On-chip Timer 1
Control program
code RAM Timer 0

CPU

Bus Serial
4 I/O Ports
OSC Control Port

P0 P1 P2 P3 TxD RxD
Address/Data
 Registers in 8051
In CPU, registers are used to store information
temporarily. That information could be a byte of data
to be processed, or an address pointing to the data
to be fetched. 8051 have 8-bit registers
D7 D6 D5 D4 D3 D2 D1 D0
MSB LSB

The most widely used registers are A

(accumulator), B, R0-R7,DPTR (Data Pointer), PC
(Program Counter). All the registers except DPTR
and the program counter are 8 bits. DPTR and PC
are 16 bits.
 DPTR

PC

Some 8051 16-bit Registers

Some 8051 8-bit Registers

 Program Counter (PC)
PC points to the address of the next
instruction to be executed. As the CPU fetches the
opcode from the program ROM, the PC is
incremented to point to the point to the next
instruction. This means that the 8051 can access
program address 0000-FFFFH, a total of 64Kbytes of
code. It is also called instruction pointer

Flag Bit
8051 has a flag register to indicate arithmetic
conditions such as carry bit. The flag register of
8051 is called Program Status Word (PSW) register.
 PSW (Program Status Word) Register

CY PSW.7 Carry Flag

AC PSW.6 Auxiliary Carry Flag
F0 PSW.5 Available to the user for general purpose
RS1 PSW.4 Register Bank selector bit 1
RS0 PSW.3 Register bank selector bit 0
OV PSW.2 Overflow flag
--- PSW.1 User-definable bit
P PSW.0 Parity flag.(odd/even no of 1 bit in the accumulator)

RS1 RS0 Register bank Address

0 0 0 00H-07H
0 1 1 08H-0FH
1 0 0 10H-17H
1 1 1 18H-1FH
Its an 8 bit register.

Although it is an 8 bit register, only 6 bits of it are

used.The two unused bits are user definable flags.

Four bits are called conditional flags, they

indicate some conditions that result after an
instruction is executed.

These 4 are CY (carry), AC (Auxiliary Carry), P

(Parity) and OV (Over Flow).

The bits PSW.3 and PSW.4 are designated as RS0

and RS1, respectively are used to change the bank
registers.
CY flag:- This flag is set when there is a carry out
from the D7 bit. This flag bit is affected after an 8-bit
addition or subtraction.

AC flag :- If there is a carry from D3 to D4 during

ADD or SUB operation, this bit is set; otherwise
cleared.

P flag :- It reflects the number of 1’s in the A

(accumulator) register only. If A register contains an
odd number of 1’s, then P=1.If its even, then P=0.

OV Flag :- This is set whenever the result of a signed

number operation is too large, causing the high
order bit to overflow into sign bit.
Examples:

1)38h+2Fh=67

0001 1100
+0010 1111
0110 0111

CY=0no carry beyond D7.

AC=1carry from D3 to D4.

P=1 since accumulator has an odd number of 1’s.

8051 register banks and stacks
7F

Scratch Pad RAM

30
2F

Bit-Addressable RAM
20
1F Register Bank 3
18
17
10 Register Bank 2
0F
Register Bank 1(Stack)
08
07
Register Bank 0
00
 8051 register banks and stacks
128 bytes of RAM
Address range from 00-7Fh
128bytes are divided into 3 different groups.

32 bytes (00h-1Fh)Register banks

and stacks.

16bytes (20h-2Fh) bit addressable

read/write
memory.

80bytes (30h-7Fh)scratch pad area.

 Register banks in 8051

32 bytes are set for register banks and stack.32

bytes are divided into 4 banks of registers in which
each bank has 8 registers, R0-R7.

RAM location Register bank

00-07 0
08-0F 1
10-17 2
18-1F 3
 Stack in 8051
It is a section of RAM.
Stack is used to store information temporarily.
The information could be data or address.
CPU needs this storage area since there are only a
limited number of registers.
How stack is accessed?
Since stack is a section of RAM, there must be
register inside the CPU to point to it.
The register used to access the stack is called
Stack Pointer (SP).
SP is 8 bits wide. It can take values 00-FFh.
When powered up SP contains value 07.
Storing of a CPU register in stack is called PUSH
and pulling the contents is called POP.
 Pin description of 8051

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0
P1.2 3 38 P
) 0.1(AD1)
P1.3
P1.4
4
5
8051 37
36
P0.2(AD2
P
) 0.3(AD3)
P1.5 6 (8031) 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14
(T1)P3.5 15 26 )P2.5(A13
(WR)P3.6 16 25 )P2.4(A12
(RD)P3.7 17 24 )P2.3(A11
XTAL2 18 23 P ) 2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
The voltage source is +5V.

RST pin 9

It is an input pin and is active high.

The high pulse must be high at least 2
machine cycles.

It is a power-on reset.

Upon applying a high pulse to RST, the

microcontroller will reset and all values in
registers will be lost.

Reset values of some 8051 registers

 Reset value of 8051

Register Reset Value

PC 0000
ACC 0000
B 0000
PSW 0000
SP 0007
DPTR 0000

RAM are all zero.

The 8051 has an on-chip oscillator but requires an
external clock to run it.
A quartz crystal oscillator is connected to inputs
XTAL1 and XTAL2.
It also needs 2 capacitors of 30pF value.
One side of each capacitor is connected to the
ground as shown below:
C2
XTAL2
30pF

C1
XTAL1
30pF

GND
 Addressing Modes
The CPU can access data in various ways. The
data could be in a register or in memory or be
provided as an immediate value. These various ways
of accessing data are called addressing modes.
Total 5 addressing modes:

1)Immediate
2)Register
3)Direct
4)Register indirect
5)Indexed
 Immediate addressing mode
Ex:
MOV A,#25h ;load 25h into A
Immediate data must be preceded by the pound
sign “#”.
Although DPTR is 16 bit, it can be accessed as two
8-bit registers, DPH and DPL.

Ex:
MOV DPTR, #2550h
is same as,
MOV DPL, #50h
MOV DPH,#25h
 Register Addressing Modes
Ex:
MOV A, R0 ;copy contents of R0 into A

Direct addressing Mode

Ex:
MOV R0,40h ;save the contents of RAM location
40h in R0

MOV 56h,A ;save the contents of A in RAM

location 56h.

The ‘#’ symbol distinguishes between the direct

addressing and immediate addressing mode.
 Register Indirect addressing Mode

Here register is used as a pointer to the data.

If the data is inside CPU, only registers R0 and R1 are
used for this purpose.

When R0 and R1 are used as pointers, i.e., when they

hold the address of RAM, they must be preceded by “@”
sign.
Ex:
MOV A,@R0 ;move contents of RAM location whose
address is held by R0 into A.
MOV @R1,B ;move contents of B into RAM location
whose address is held by R1.
 Indexed addressing mode
It is used in accessing data elements located in the
program ROM space of 8051.
Instructions for this purpose is
MOVC A,@A+DPTR.
Checksum byte
To ensure the data integrity of ROM contents every
system must perform the checksum byte
calculation. The process of checksum will detect any
corruption of the contents of ROM.

One of the causes of ROM corruption is current

surge, when the system is turned on or during
operation.
To ensure data integrity in ROM, the checksum
process uses what is called checksum byte.

Checksum byte is the extra byte that is tagged to

the end of a series of bytes of data.

To calculate checksum byte of a series of bytes

of data, the following steps can be taken:

1.Add the bytes together and drop the carries.

2.Take the 2’s compliment of the total sum; this is

the checksum byte, which becomes the last byte of
the series.
Assume that we have 4bytes of hexadecimal
data:25H,62H,3FH and 52H

Solution
25H
+ 62H
+ 3FH
+ 52H
118H

Dropping the carry, we have 18H.

Take 2’s Compliment of it is E8H.

Therefore the checksum byte is E8H.

 Reasons for writing programs in C
instead of Assembly
It is easier and less time consuming to write in C
than Assembly.

C is easier to modify and update.

You can use available in-function libraries.

C code is portable to other microcontrollers with

little or no modification.
 C data types for 8051
Unsigned char

8-bit datatype.
value range from 0-255(00-FFh).

Signed char

8-bit datatype.
D7 of D7-D0 represent sign(-ve or +ve).
We have 7 bits for value of signed number.
Range from -128 to 127.
Default is signed value.
Unsigned int

16bit datatype.
value in a range of 0-65535.
used to define 16-bit memory address.
8051 is 8-bit microcontroller, so int datatype take
2bytes of RAM.

Signed int

16 bit datatype.

Uses MSB (D15 of D15-D0) to represent sign(-ve or
+ve).
15 bit for magnitude.
Value range from -32768 to 32767.
sbit (single bit)

Keyword used to access single bit addressable

registers.

Allows access to the single bits of the SFR

registers.

bit and sfr

bit datatype allows to access single bit of bit

addressable memory space of RAM 20-2Fh.

sfr is used to access byte size SFR registers i.e.,

memory space 80-FFh.
 Time Delay
There are two ways to create a time delay 8051:

1.Using a simple loop

2.Using the 8051 timers

8051 Timers

Both Timer 0 and Timer 1 are 16 bits wide.

Since the 8051 has an 8-bit architecture, each 16-bit
timer is accessed as 2 separate registers of low byte
and high byte.
 Timer 0 Register
The 16-bit registers of Timer 0 are accessed as
low byte and high byte. The low byte is called TL0
(Timer 0 low byte) and the high byte register is
called TH0 (Timer 0 high byte). These registers can
be accessed like any other register, such as
A,B,R0,R1, etc.

TH0 TL0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
 Timer 1 register
Timer 1 is also 16 bit register, and its 16-bit
register is split into two bytes, referred to as
TL1(Timer 1 low byte) and TH1 (Timer 1 high byte).
These registers are accessible in the same way as
Timer 0.

TH1 TH0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
 TMOD (Timer mode) register

Both Timers 0 and 1 use the same register,

called TMOD, to set various timer operation modes.
TMOD is an 8-bit register in which the lower 4 bits
are set aside for Timer 0 and upper 4 bits for Timer
1.

In each case, the lower 2 bits are used to set

the timer mode and the upper 2 bits to specify the
operation.
MSB LSB
GATE C/T M1 M0 GATE C/T M1 M0
Timer 1 Timer 0
 GATE
Every timer has a means of starting
and stopping. Some do this by software, some by
hardware and some by both.

If GATE=0, if we use software for this purpose.

If GATE=1, if we use external hardware for this
purpose.
C/T

Used to select Timer/Counter operation.

Set (1) Counter.

Cleared(0) Timer.
 M1 & M2

These are modes bits used in

order to select the different operating modes of the
timer.

M1 M0 Mode Operating Mode

0 0 0 13-bit timer mode
0 1 1 16-bit timer mode
1 0 2 8-bit auto-reload
1 1 3 Split timer mode
 TCON register
8-bit addressable register.

TR0 and TR1 flags used to turn on or turn off the

timer are part of TCON (Timer Control) register.
MSB LSB

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

7 6 5 4 3 2 1 0

BIT SYMBOL FUNCTION

TCON.7 TF1 Timer 1 overflow flag
TCON.6 TR1 Timer 1 run control bit
TCON.5 TF0 Timer 0 overflow flag
TCON.4 TR0 Timer 0 run control bit
 Clock source for timer
The crystal frequency attached to
the 8051 is the source of the clock for the timer. The
frequency of the timer is always 1/12th the frequency
of crystal attached to 8051.
Mode 1
It is a 16-bit timer; it allows values of 0000 to
FFFFH to be loaded into timer’s registers TL and TH.
After TL and TH are loaded with 16-bit initial value,
the timer must be started by setting TR0 for timer 0
and TR1 for timer 1.
After the timer is started, it starts to count up. It
counts up until it reaches its FFFFH. When it rolls
over from FFFFH to 0000, it sets high a flag bit called
TF (timer flag).
Now stop the timer bit by clearing TR0 and TR1
respectively.
Each timer is having its own flag TF0 for T0 and
TF1 for T1.
After the timer reaches its limit and rolls over, in
order to repeat the process reload TH and TL with
original value and TF must be reset to 0.

Finding the values to be loaded into timer

1)Divide the desired time delay by 1.085micros.Take
the result as n.
2)Subtract n from 65536 (65536-n).
3)Convert the result to hex, where yyxx is the initial
hex value to be loaded into timer’s register.
4)Set TL=xx, TH=yy.
Example:

Assume that XTAL=11.0592 MHz.

We want 5ms delay

Solution:

(5ms / 1.085 micro sec) = 4608 clocks

(65536 – 4608) = 60928 = EE00H

Therefore, we have

TH=EE
TL=00
 XTAL TF
/12 TH TL
Oscillator
TR
TF goes high Overflow
C/T=0 When FFFF=0 flag

Mode 0
Its exactly similar to mode1 except that it is a 13 bit
timer instead of 16bit.

Hold values between 0000-1FFFH in TH and TL.

Therefore, when the timer reaches its maximum of

1FFFH it rolls over to 0000 and TF is raised.
 Mode 2
8-bit timer allows values from 00-FFH to be loaded
to TH.
After TH is loaded with 8-bit value, the 8051 will
give a copy of it to TL.
Then the timer is started. After timer is started, it
starts count by incrementing the TL register.
It counts up until it reaches FF H. When it rolls from
FFH to 00H, TF is set; TF0 for timer 0 and TF1 for
Timer 1.
TL is reloaded automatically with the original value
kept by TH register.
To repeat the process, simply clear TF and let it go
without reloading the original value by programmer.
Here TH is unchanged. It holds the copy of the
original value.
 XTAL Overflow
/12 TL TF
Oscillator flag
TR Reload
C/T=0 TH TF goes high
When FF=0

Mode 3
Timer mode 3 is a split-timer mode.

When Timer 0 is placed in mode 3, it essentially

becomes two separate 8-bit timers. That is to say,
Timer 0 is TL0 and Timer 1 is TH0.

Both timers count from 0 to 255 and overflow back

to 0.
 Counter

If C/T of TMOD is 1, it is counter, it takes its pulses

from outside the 8051.

The counter counts up as pulses are fed from T0

and T1.

In T0, P3.4 provides clock pulse and counter

counts up for each clock pulse coming from that pin.

For T1, each pulse coming in P3.5 makes the

counter count up.
 Types of data transfer
Two ways of transferring data:
Parallel
Serial
In parallel data transfer, often 8 or more lines
(wire conductors) are used to transfer data to that is
only a few feet away.

Ex: printers, hard disk

Each uses cables with many wire strips.

Although in such cases a lot of data can be
transferred in a short amount of time by using many
wires in parallel, the distance cannot be great.
To transfer to a device located many meters away,
the serial method can be used.
In serial communication, the data is send one bit at
a time.
Basics of Serial Communication
If data is to be transferred on the telephone line, it
must be converted from 0s and 1s to audio tones,
which are sinusoidal shaped signal. This conversion
is performed by a peripheral device called as
MODEM=modulator/demodulator.
Serial data communications uses two methods
1.Synchronous method transfers a block
of data (character) at a time.
2.Asynchronous method transfers a
single byte at a time.
 Half and Full duplex transmission
In data transmission if the data can be transmitted
and received, it is a duplex transmission.
Serial Transfer Parallel Transfer
D0

Sender Receiver Sender

Receiver

D7

Simplex Transmitter Receiver

Transmitter Receiver
Half Duplex Transmitter
Receiver

Transmitter Receiver
Full Duplex
Receiver Transmitter
 Asynchronous serial communication
and data framing
Start and Stop bits
Asynchronous serial communication is widely
used for character-oriented transmission, while
block-oriented data transfer uses synchronous
method.
In asynchronous method, each character is
placed between start and stop bits. This is called
framing.
Start bit is always one bit and it is a low bit
Stop bit can be one or two bits and it is a high bit
stop 0 0 0 1 0 1 0 1 start
space
bit bit
Goes out last D7 D0 Goes out first
 Data transfer rate
The rate of data transfer in serial data
communication is stated in bps (bits per second) or
called as baud rate.
Ex: IBM PC could transfer data at rates of 100 to
9600bps.
It must be noted that in asynchronous serial data
communication, the baud rate is generally limited to
100,000bps.
RS232 Standards
To allow compatibility among data communication
equipment made by various manufacturers, an
interfacing standard called RS232 was set by the
Electronics Industries Association (EIA) in 1960.
Many types like RS232A,RS232B,RS232C
This standard is used in PCs and numerous types
of equipment.
This standard was set long before the advent of
TTL logic family, its input & output voltage levels are
not TTL compatible.

In RS232 1=(-3 to -25V)

While 0=(+3 to +25V)

For this reason to connect any RS232 to a MC

system we must use voltage converters such as
MAX232 to convert the TTL logic levels to the RS232
voltage levels, and vice versa.

MAX232 IC chips are commonly referred to as line

drivers.
Pin Description of RS232
Pin Description of MAX232
 Baud Rate in the 8051
The 8051 transfers and receives data serially at
many different baud rates.
The baud rate in the 8051 is programmable. This is
done by Timer 1.
The 8051 divides the crystal frequency by 12 to get
the machine cycle frequency.
I.e. M/C Frequency = (11.0592MHz/12 = 921.6KHz)
The 8051 serial communication UART circuitry
divides the machine cycle frequency of 921.6KHz by
32 once more it is used by Timer 1 to set the baud
rate.
(921.6 / 32) = 28,800Hz this is the value used to
set the baud rate in Timer 1,Mode 2(8-bit auto-
reloaded mode).
 Timer 1 TH1 Register Values for
Various Baud Rates
Baud Rate TH1(Decimal) TH1(Hex)

9600 -3 FD

4800 -6 FA

2400 -12 F4

1200 -24 E8

28,800 / 3 = 9600 where -3 = FD (hex) is loaded into

TH1
 SBUF register
SBUF is an 8-bit register used for serial
communication in the 8051.
To transfer a byte of data via the TxD line, it must
be placed in the SBUF register.
Similarly, SBUF hold a byte of data when it is
received by the 8051’s RxD line.
SBUF can be assed by any other register in 8051.
The moment a byte is written into SBUF, it is framed
with a start & stop bits & transferred serially via TxD
pin.
Similarly, When the bits are received serially via
RxD, the 8051 deframes it by eliminating the start
and stop bits, making a byte of data received, and
placing it in the SBUF.
 SCON (Serial Control) register
It is an 8-bit register used to program the start bit,
stop bit, and data bits of data framing, among other
things.
SM0 SMI SM2 REN TB8 RB8 TI RI

SM0 SCON.7 Serial port mode specifier

SM1 SCON.6 Serial port mode specifier
SM2 SCON.5 Used for multiprocessor
communication. (make it as 0)
REN SCON.4 Set / Cleared by SW to enable /
disable reception.
TB8 SCON.3 Not widely used
RB8 SCON.2 Not widely used
TI SCON.1 Transmit interrupt flag.
RI SCON.0 Receive interrupt flag.
Make SM2, TB8, and RB8 = 0.
SM0 SM1
0 0 Serial Mode 0
0 1 Serial Mode 1,
8-bit data, 1 stop bit, 1 Start bit
1 0 Serial Mode 2
1 1 Serial Mode 3

We are not using 8051 in a multiprocessor

environment so make SM2 = 0.
REN (Receive Enable) = 1, it allows the 8051 to
receive data on the RxD pin of the 8051 also for
transferring the data through TxD.
REN = 0, receiver is disabled.
TB8(transfer bit 8) is used only for mode 2 & 3.
Make TB8 as 0.
RB8(receiver bit 8) in serial mode 1, this bits gets a
copy of stop bit when the 8-bit data is received.
TI (transmit interrupt) bit is set after transfer of 8-
bit of character.
RI (receive interrupt) bit is set after receiving of 8-
bit of character.

Doubling the baud rate of 8051

There are 2 ways to increase the baud rate of
data transfer in the 8051

1.Use a higher-frequency crystal

2.Change a bit in the PCON (Power Control) register
 D7 D0

SMOD --- --- --- GF1 GF0 PD IDL

Baud rate for SMOD = 0

Machine cycle frequency
= 11.0592 MHz / 12 = 921.6 KHz
And

921.6 KHz / 32 = 28,800 Hz since SMOD = 0

Baud rate for SMOD = 1
Machine cycle frequency
= 11.0592 MHz / 12 = 921.6 KHz
And

921.6 KHz / 16 = 57,600 Hz since SMOD = 1

Baud rate comparison for SMOD = 0 &
SMOD = 1
SMOD = 1 SMOD = 0 TH1(Decimal) TH1(Hex)

19,200 9,600 -3 FD

9,600 4,800 -6 FA

4,800 2,400 -12 F4

2,400 1,200 -24 E8

 Interrupts Programming
A single microcontroller can serve several
devices. There are 2 ways to do that.i.e Interrupt and
Polling.
Interrupt Method
In this method, whenever any devices needs its
service, the device notifies the MC by sending it an
interrupt signal.

Upon receiving an interrupt signal, the MC

interrupts whatever it is doing and serves the
device. The program associated with the interrupt is
called interrupt service routine (ISR) or interrupt
handler.
 Polling Method
In this method MC continuously monitors the
status of a given devices; when the status condition
is met it perform the service.
It is not a efficient use of MC
In interrupt method according to Priority the MC
will service.
In polling method cannot assign priority since it
checks all devices in a round-robin fashion.
Interrupt Service Routine
For every interrupt, there must be an interrupt
service routine (ISR), or Interrupt Handler.

When an interrupt is invoked, the microcontroller

runs a interrupt service routine.
For every interrupt , there Is a fixed location in
memory that holds the address of its ISR.
The group of memory location set aside to hold the
address of ISRs is called the interrupt vector table.
Interrupt Vector Table for 8051
Interrupt ROM Location (Hex) Pin Flag Clearing
Reset 0000 9 Auto
External HW Interrupt 0(INT0) 0003 P3.2(12) Auto
Timer 0 Interrupt (TF0) 000B Auto
External HW Interrupt 1(INT1) 0013 P3.3(13) Auto
Timer 1 Interrupt (TF1) 001B Auto
Serial COM Interrupt (RI &TI) 0023 Programmer
clear it
 Steps to executing an interrupt
1.It finishes the instruction it is executing & saves
the address of the next instruction (PC) on the stack.

2.It also saves current status of all interrupts

internally (i.e. not on the stack)

3.It jumps to a fixed location in memory called

interrupt vector table that hold the address of the
interrupt service routine.
4.The MC gets the address of the ISR from the
interrupt vector table & jumps to it. It starts to
execute the interrupt service subroutine until it
reaches the last instruction of subroutine, which is
RETI (return from interrupt).
5.Upon executing the RETI instruction, MC return to
home by taking the address from stack by popping
the top 2 byte of the stack into the PC. Then it starts
to execute from that address.

Enabling & Disabling an Interrupt

Upon reset all interrupts are disabled (masked),

meaning that none will be responded to MC if
interrupt is activated.

So interrupt must be enabled by SW to be used by

MC.
 Steps in Enabling an Interrupt
D7 D0
EA --- ET2 ES ET1 EX1 ET0 EX0

EA IE.7 EA=0 (Disables), EA=1 (Enabled)

--- IE.6 Reserved
ET2 IE.5 Enables or Disables Timer 2 overflow or capture interrupt
ES IE.4 Enables or Disables the serial port interrupt
ET1 IE.3 Enables or Disables Timer 1 overflow interrupt
EX1 IE.2 Enables or Disables External interrupt 1
ET0 IE.1 Enables or Disables Timer 0 overflow interrupt
EX0 IE.0 Enables or Disables External interrupt 0

Roll-Over Timer Flag and Interrupt

In polling TF, we have to wait until the TF is raised.
The problem with this method is that the MC is tied
down while waiting for TF to be raised, and cannot
do any thing else.
Using interrupts solves this problem and avoid
tying down the controller.
Programming Timer Interrupt
 Programming External Hardware
Interrupts

Two External interrupt

INT0:Interrupt vector Table location 0003H

INT1:Interrupt vector Table location 0013H

It is enabled & disabled using the IE register.

There are 2 types of activation for hardware

interrupts.
1.Level Triggered
2.Edge Triggered
 Level-Triggered Interrupt
In this mode, INT0 & INT1 pins are normally high
(just like all I /O port pins) & if a low level signal is
applied to them, it triggers the interrupt. This is
called as level triggered interrupt.

If the low level interrupt signal is not removed

before the ISR is finished it is interpreted as another
interrupt & the 8051 jumps to the vector table to
execute the ISR again.

Therefore to ensure the activation of the hardware

interrupt at the INTn pin, make sure that the duration
of the low level signals is around 4 machine cycles,
but not more.(INT0 have highest priority than INT1)
 Edge-Triggered Interrupts
If we want to make INT0 & INT1 as edge triggered
interrupt we must program the bits of TCON register.
MSB LSB

TF1 TR1 TF1 TR0 IE1 IT1 IE0 IT0

7 6 5 4 3 2 1 0

BIT SYMBOL FUNCTION

TCON.7 TF1 Timer 1 overflow flag
TCON.6 TR1 Timer 1 run control bit
TCON.5 TF0 Timer 0 overflow flag
TCON.4 TR0 Timer 0 run control bit
TCON.3 IE1 External interrupt 1 edge flag
TCON.2 IT1 Interrupt 1 type control bit
TCON.1 IE0 External interrupt 0 edge flag
TCON.0 IT0 Interrupt 0 type control bit
IT0 & IT1 or bits D0 & D2 of the TCON register
determine whether the interrupt is level triggered or
edge triggered.

By default IT0 & IT1 is 0 means that it is a level

triggered interrupt.

When this pins become high (1) then it is a edge

triggered interrupt.

In edge triggered interrupt a high to low signal is

given to the interrupt pins to do the interrupt
function (Ex: LED).

If we want the interrupt function to be executed

again give a high to low signal to interrupt pin.
In level triggered interrupt as long as INTn is kept
at a low level the interrupt function (LED) is kept in
the on state.

But for edge triggered interrupt to turn on the LED

again the INTn pulse must be brought back high &
then forced low to create a falling edge to activate
the interrupt.

In edge triggered interrupt the external source

must be held high for at least one machine cycle to
ensure that the transition is seen by the
microcontroller.
Programming the Serial communication Interrupt
 Setting Interrupt Priority table with the IP
Register
D7 D0
--- --- PT2 PS PT1 PX1 PT0 PX0

Priority bit =1 assigns high priority. Priority bit=0 assigns low priority

--- IP.7 Reserved

--- IP.6 Reserved
PT2 IP.5 Timer 2 priority bit
PS IP.4 Serial port interrupt priority bit
PT1 IP.3 Timer 1 interrupt priority bit
PX1 IP.2 External interrupt 1 priority bit
PT0 IP.1 Timer 0 interrupt priority bit
PX0 IP.0 External interrupt 0 priority bit
 Interrupt Programming in C
8051/8052 Interrupt Numbers in C
Interrupt Name Numbers used by 8051 C

External Interrupt 0 INT0 0

Timer Interrupt 0 TF0 1

External Interrupt 1 INT1 2

Timer Interrupt 1 TF1 3

Serial Communication RI + TI 4

Timer 2 (8052 only) TF2 5

 LCD Interfacing
In recent years the LCD is finding widespread
use replacing LEDs (seven-segment LEDs or other
multisegment LEDs). This is due to the following
reasons.
The declining prices of LCDs.
The ability to display numbers, characters, and
graphics. This is in contrast to LEDs, Which are
limited to numbers and a few characters.

Incorporation of a refreshing controller into the

LCD, thereby relieving the CPU of the task of
refreshing the LCD.

Ease of programming for characters and graphics.

Block Diagram & Pin Description
There are two very important register inside the
LCD. The RS pin (Input pin) is used for their
selections as follows.

If RS=0,the instruction command code register is

selected, allowing the user to send a command such
as clear display, cursor at home, etc…

If RS=1 the data register is selected, allowing the

user to send data to be displayed on the LCD.

VSS = Ground

VCC = +5v Power supply

VEE = Power supply to control contrast
R / W (Input pin) = 0 for write & 1 for read
E (I /O pin) for enable

DB0 – DB7 (I / O Pin)

Display capacity of 16 characters X 2 line,20 X 1,

20X2, 20X4, 40X2 etc..

The 8-bit data pin, D0 – D7 are used to send

information to LCD or read the contents of the LCD’s
internal registers.

To display letters & numbers, we send ASCII codes

for the letter A – Z, a – z & 0 – 9 to these pins while
making RS = 1.
 LCD Command Codes
Code (Hex) Command to LCD Instruction Register
1 Clear display screen
2 Return home
4 Decrement cursor (shift cursor to left)
6 Increment cursor (shift cursor to right)
5 Shift display right
7 Shift display left
8 Display off, Cursor off
A Display off, cursor on
C Display on, Cursor off
E Display on, Cursor blinking
F Display on, Cursor blinking
10 Shift cursor position to left
14 Shift cursor position to right
18 Shift the entire display to the left
1C Shift the entire display to the right
80 Force cursor to beginning of 1st line
C0 Force cursor to beginning of 2nd line
38 2 lines and 5x7 matrix
 Keyboard Interfacing
VCC

4.7K

3 2 1 0 4.7K
D0

D1 7 6 5 4

B A 9 8
D2

D3 F E D C

Port 1
(Out)
Row D3 D2 D1 D0
Port 2
(In)
Column
Keypad are the mostly used input devices of the
8051/52.Keypad is organized in a matrix of rows and
columns.

The MCU accesses both rows and columns

through ports; therefore, with two 8-ports, an 8X8
matrix of keys can be connected to a
microcontroller.

When a key is pressed, a row and a column make a

contact; otherwise, there is no connection between
rows and columns.
It is the function of program stored in the EPROM
of the microcontroller to scan the keys continuously,
identify, which one has been activated.
 Grounding rows & reading the
columns
To detect the pressed key, the MC grounds all
rows by providing 0 to the output latch, then it reads
the columns. If the data read from the column is D3 –
D0 = 1111, no key has been pressed.

If no key has been pressed, reading the input port

will yield 1s for all columns since they are all
connected to high (VCC).

If all rows are grounded & a key is pressed, one of

the columns will have 0 since the key pressed
provides the path to ground.
If one of the columns bit has a zero (i.e. D0 to D3 =
1101) this means that a key press has occurred this
means a key in the D1 column has been pressed.

Then the MC start to identifying the key. starting

up with the top row, the MC ground it by providing a
low to row D0 only.

The MC read the columns if it is all 1s then no key

pressed in that row. so it check the 2nd row by
grounding it.
 Interfacing to External Memory
When connecting multiple devices to a
microcontroller, the address and data lines of each
device were conventionally connected individually.
This would take up precious pins on the
microcontroller, result in a lot of traces on the PCB,
and require more components to connect everything
together. This made these systems expensive to
produce and susceptible to interference and noise.
To solve this problem, Philips developed Inter-IC
bus, or I2C, in the 1980s. I2C is a low-bandwidth,
short distance protocol for on board
communications.
All devices are connected through two wires: serial
data (SDA) and serial clock (SCL).
Figure 1: Sample I2C Implementation.
Regardless of how many slave units are attached to the I2C bus, there are only two signals connected to
all of them. Consequently, there is additional overhead because an addressing mechanism is required for
the master device to communicate with a specific slave device.

Because all communication takes place on only

two wires, all devices must have a unique address
to identify it on the bus. Slave devices have a
predefined address.
 Theory of Operation
I2C has a master/slave protocol. The master
initiates the communication. The sequences of
events are:
 The Master device issues a start condition. This
condition informs all the slave devices to listen on
the serial data line for instructions.
 The Master device sends the address of the target
slave device and a read/write flag.
 The Slave device with the matching address
responds with an acknowledgement signal.
 Communication proceeds between the Master and
the Slave on the data bus. Both the master and
slave can receive or transmit data depending on
whether the communication is a read or write.
The transmitter sends 8-bits of data to the receiver
which replies with a 1-bit acknowledgement.
When the communication is complete, the master
issues a stop condition indicating that everything is
done.

Figure 2: I2CCommunication Protocol

Since there are only two wires, this protocol includes the extra overhead of an addressing
mechanism and an acknowledgement mechanism
Features
I2C has many features other important features worth mentioning. It
supports multiple data speeds:
standard (100 kbps),
fast (400 kbps) and
high speed (3.4 Mbps) communications.
Built in collision detection,
10-bit Addressing, Mutli-master support, Data broadcast (general call).
 Benefits and Drawbacks

Since only two wires are required, I2C is well

suited for boards with many devices connected on
the bus. This helps reduce the cost and complexity
of the circuit as additional devices are added to the
system.

Due to the presence of only two wires, there is

additional complexity in handling the overhead of
addressing and acknowledgments. This can be
inefficient in simple configurations and a direct-link
interface such as SPI might be preferred.
(EEPROM) AT24C02A
 ADC
ADC are among the most widely used devices for
data acquisition. Digital computers use binary
(discrete) values, but in the physical world
everything is analog (continuous). Temperature,
Pressure (wind or Liquid), humidity, & velocity are
few examples.

A physical quantity is converted into electrical

(voltage, current) signals using a device called a
transducer (Sensors).

Sensor converts the temperature, pressure etc..

Into its corresponding voltage (or current). like this
way ADC works.
An ADC has n-bit where n can be 8, 10, 12, 16 or
even 24 bits. The highest resolution ADC provides a
smaller step size, where step size is the smallest
change that can be discerned by an ADC.
Conversion time should be less.
Resolution Vs Step Size for ADC
N-bit Number of Steps Step Size (mV)

8 256 5 / 256 = 19.53

10 1024 5 / 1024 = 4.88

12 4096 5 / 4096 = 1.2

16 65563 5 / 65536 = 0.076

 ADC0804 Chip
+5V

20
VCC
10K 6 Vin (+)
POT 7 18
Vin (-) D0
8 17
A GND D1
16
9 Vref / 2 D2 15
D3 14
CLK R D4 LEDs
19
10K D5 13
4 CLK in D6 12
D7 11
150 pF 1 CS
2
RD WR 3 Normally
10 5
D GND Open
INTR START
 Vref / 2 Relation to Vin Range (ADC0804)
Vref / 2 (V) Vin (V) Step size (mV)

Not connected 0 to 5 5 / 256 = 19.53

2.0 0 to 4 4 / 255 = 15.62

1.5 0 to 3 3 / 256 = 11.71

1.28 0 to 2.56 2.56 / 256 = 10

Read & write Timing for ADC0804

CS

WR Note: CS is set to low for both RD & WR pulses

D0 – D7 Data out

INTR Start conversion End conversion

RD
 DAC
EX: binary weighted & R /2R ladder.