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N Type Metal Oxide

Semiconductors
Group Members

 Adnan Irshad Reg : IT171035


 Arish Ali Reg : IT171052
 Muhammad Zeeshan Reg : IT171012
 Ahmad Sarvar Reg : IT171013
 Hamza Shoukat Reg : IT171003
 Mohsin Ali Reg : IT171036
Presentation’s Outline

 Introduction to CMOS to understands NMOS


 NMOS
 NMOS Structure
 NMOS Regions
 Impacts of Width and Length on NMOS
 Purpose of NMOS
 Comparison of NMOS with PMOS
 Summary
Introduction to CMOS

 The term CMOS stands for “Complementary Metal Oxide Semiconductor”.


 CMOS technology is one of the most popular technology in the computer chip
design industry.
 Complementary Metal Oxide Semiconductor transistor consists P-channel MOS
(PMOS) and N-channel MOS (NMOS).
 In CMOS, NMOS transistor used to control the high level(1) connection to ground at
low level(0).
CMOS Diagram To Understand NMOS
NMOS

 NMOS stands for “n-type Metal Oxide Semiconductor”. It is pronounced as en-moss.


 It is a type of semiconductor that charges negatively. So that transistors are turned
ON/OFF by the movement of electrons.
 NMOS is a four terminal device and operates at the high logic. D
 The NMOS transistor works on the base of G’s value which is called Gate.

G B
S
NMOS Structure
 The NMOS is fabricated on a p-type substance, which is a single-crystal silicon wafer
that provides physical support for the device.
Two heavily doped n-type regions, are created in the substrate, indicated in the figure as:
 n+ Source (‘S’)
 n+ Drain (‘D’)
 A layer of Silicon Dioxide (SiO2) which is good insulator with thickness
is placed on the top of the substrate. Gate
Body Source Drain
G
 The Gate is heavily doped material B S D
IG=0
called polysilicon(Poly).
 L is the length between the Source(S) ID=IS
IS
and Drain(D). Metal
oxide
 The Body(B) of NMOS is connected to the
n+ n+
lowest voltage. L W
P-Substrate
NMOS Physical Structure

Cross-Section. Typically L = 0.1 to 3 mm, W = 0.2 to 100 mm, and the thickness of the oxide layer (tox)
is in the range of 2 to 50 nm.
NMOS V-I Characteristics

 Basically we have two regions: the Triode/Linear region at smaller VDS and the saturation region
at higher VDS but Cut-Off and Deeply Triode regions also occurs in NMOS.

 ID=Drain Current , IDS=Drain Source Current , VDS=Drain Source Voltage , VGS=Gage Source Voltage

ID Linear/Triode Region Regions

IDS ID for VGS = maximum


Saturation
(VDD) Region
VDS < VGS - VTH VDS > VGS - VTH
If VGS = 0. Linear/Triode Region Saturation Region

VDS VGS > VTH


VDS << Vo
VDD Cut-off Region
Deeply Triode Region
Arish Ali
Linear / Triode Region

 If the gate voltage is above threshold, but the source to drain voltage is small,
the charge under the gate is uniform, and carries current much like a resistor.
 We call the boundary between the regions VDSat.

ID
VGS > VTH AND VDS < VGS - VTH Linear/Triode Region VGS
- + gate
drai
sourc n
e oxide insulator
n n
P
VDS
VDSat
Linear / Triode Region

Gate
 If VGS > VTH and VDS < VGS - VTH , then Source
G
Body Drain
S IG=0
B D
ID = kn {2( VGS – VTH )VDS – VDS . VDS } I ID=IS
S
 Here Kn is the conduction parameter.
Metal
oxide
kn = µn Cox W/2L n+ L n+ W
P-Substrate
 µn = Electron Mobility in the channel
 Cox = The Capacitance of Silicon Diode
 W = Width of channel

 L = Distance between Source(S) and Drain(D).


Saturation Region

 When the voltage from the source to the drain gets high enough, the channel
gets “pinched” In the pinch region.
 The carriers move very fast, but the current is determined by the triangular
region, which does not change much as the drain voltage is changed, so the
current saturates. Saturation Region
ID
 We call the boundary between the regions VDSat. VGS
- + gate
drain
sourc
e oxide insulator
n n
P
VDS
VDSat
Saturation Region

 If VGS > VTH AND VDS > VGS - VTH , then

ID = kn {( VGS – VTH ). ( VGS – VTH )}

 Here Kn is the conduction parameter.

kn = µn Cox W/2L

 𝑉DS = Drain Source Voltage 𝑉D- 𝑉s


 𝑉 GS = Gate Source Voltage 𝑉G- 𝑉s

 𝑉 TH = Thresh Voltage
Muhammad Zeeshan
Cut-off Region Region

 If VGS < VTH then, The cut-off Mode Occurs.

 The Sub-threshold or cut-off mode whenever VGS < VTH .


 where VTH is the threshold voltage. In this mode the device is essentially off,
and in the ideal case there is no current flowing through
the device.
NMOS As Resistor

 If VDS is very small then the drain source terminal


functions as Resistor.
kn {( VGS – VTH ). ( VGS – VTH )}

 For the very small 𝑉 DS the current equation will be as.

RON = 𝑉DS / 𝐼 D

RON = 1 / kn( VGS – VTH )


NMOS As Resistor

 When the voltage applied between drain and source, VDS, is kept very small. The device operates as a
linear resistor whose value is controlled by VGS.
Ahmad Sarvar
Impacts of length and Width on NMOS

Gate Length
 The gate length, L, is the distance the electrons have to travel. It is generally set at the
minimum value (e.g. .18 micron) for nearly all logic transistors
 As the gate length gets shorter, the gate capacitance gets smaller
 As the gate length gets shorter, Gate
Body Source G Drain
the current drive of the transistor B S IG=0 D
also gets larger.
ID=IS
 However, leakage current also increases. IS
Metal
oxide

n+ n+
L W
P-Substrate
Impacts of length and Width on NMOS

Gate Width
 The gate width, W, is determined by the circuit designer.
 One uses a wider gate to get more current (and thus charge a capacitor faster).
 For example doubling W is the same
Gate
as putting two equal-sized transistors Body Source G Drain
B S IG=0 D
in parallel, and thus doubles the current
at any given voltage. ID=IS
IS
Metal
oxide

n+ n+
L W
P-Substrate
Purpose of NMOS

 NMOS is fast than PMOS.


 NMOS is used as a Switching and Amplification.
 We use it where we have to discharge the some load.
 The NMOS switching is great for discharging a node to ground. When VIN
goes high (VDD ) then VOUT goes from VDD to ground. When it reaches
VDD /2 we call that time the stage delay.
 NMOS is used to built CMOS devices.
 In CMOS devices NMOS is used as NOT Gate.
Hamza Shoukat
Comparison of NMOS with PMOS

NMOS PMOS
 In a PMOS free charges which move from end-
 An NMOS the n-type semiconductor, so the
charges free to move along the channel are to-end are positively charged (holes).
negatively charged (electrons).  In this device the gate controls hole flow from
 In this device the gate controls electron flow source to drain.
from source to drain.
gate
source N-MOS drain source P-MOS drain

oxide insulator
n n p p
P n-type Si
Comparison of NMOS with PMOS

NMOS PMOS

D S

G B G B
S

D
NMOS-Circuit PMOS-Circuit
Comparison of NMOS with PMOS
NMOS PMOS
“Body” – p-type “Body” – n-type
Source – n-type Source – p-type
Drain – n-type Drain – p-type
VGS – positive VGS – negative
VT – positive VT – negative
VDS – positive VDS – negative
ID – positive (into drain) ID – negative (into drain)

NMOS V-I Characteristics PMOS V-I Characteristics


ID ID
VGS=3V VGS= 3V
1 mA 1 mA

(for IDS = (for IDS =


1mA) VGS=0 -1mA) VGS=0

VDS VDS
2 4 1 2 3 4
1 3
Mohsin Ali
Summary

 NMOS
 NMOS is the four terminal electronic device. It is a type of semiconductor that
charges negatively. So that transistors are turned ON/OFF by the movement of
electrons.
 Working
 NMOS is works on the basis of G’s value it is used in CMOS as a inverter.
 Regions
 NMOS have four regions. Which are:
1. Linear / Triode Region
2. Saturation Region
3. Cut-off Region
4. As Resistor Region
Summary

 VGS > VTH and VDS < VGS − VTH : The Linear Region
 The second mode of operation is the linear region when VGS > VTH and
VDS < VGS − VTH. Where the current remains uniform.

ID = kn {2( VGS – VTH )VDS – VDS . VDS }

 VGS > VTH and VDS > VGS − Vt: The Saturation Mode
 The saturation mode occurs when VGS > VTH and VDS > VGS − VTH. In this mode the
switch is on and conducting, however since drain voltage is higher than the gate
voltage, part of the channel is turned off.

ID = kn {( VGS – VTH ). ( VGS – VTH )}


Summary

 The sub-threshold or cut-off mode; VGS < Vt:


 where Vt is the threshold voltage. In this mode the device is essentially off, and
in the ideal case there is no current flowing through the device.

 NMOS As Resistor
 If VDS is very small then NMOS works as Resistor.

RON = 𝑉 DS / 𝐼 D
RON = 1 / kn( VGS – VTH )
Any Question !!!!

Thanks!

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