Counters

Counters Fall 2017

 Overview

° Counters are important components in computers

• The increment or decrement by one in response to input

° Two main types of counters

• Ripple (asynchronous) counters
• Synchronous counters

° Ripple counters
• Flip flop output serves as a source for triggering other flip flops

° Synchronous counters
• All flip flops triggered by a clock signal

° Synchronous counters are more widely used in

industry.

Counters Fall 2017

 Counters

° Counter: A register that goes through a prescribed

series of states
° Binary counter
• Counter that follows a binary sequence
• N bit binary counter counts in binary from n to 2n-1

° Ripple counters triggered by initial Count signal

° Applications:
• Watches
• Clocks
• Alarms
• Web browser refresh

Counters Fall 2017

 Binary Ripple Counter

° Reset signal sets all outputs

to 0
° Count signal toggles output
of low-order flip flop
° Low-order flip flop provides
trigger for adjacent flip flop
° Not all flops change value
simultaneously
• Lower-order flops change first

° Focus on D flip flop

implementation

Counters Fall 2017

 Another Asynchronous Ripple Counter

° Similar to T flop example on previous slide

Counters Fall 2017
 Asynchronous Counters

° Each FF output drives the CLK input of the next

FF.
° FFs do not change states in exact synchronism
with the applied clock pulses.
° There is delay between the responses of
successive FFs.
° Ripple counter due to the way the FFs respond
one after another in a kind of rippling effect.
A3 A2 A1 A0
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
1 0 0 0
1 0 0 1

Counters Fall 2017

 Synchronous counters

° Synchronous(parallel)
counters
• All of the FFs are triggered
simultaneously by the clock
input pulses.
• All FFs change at same time

° Remember
• If J=K=0, flop maintains value
• If J=K=1, flop toggles

° Most counters are

synchronous in computer
systems.
° Can also be made from D
flops
° Value increments on
positive edge

Counters Fall 2017

 Synchronous UP/Down counters

° Up/Down Counter can either

count up or down on each
clock cycle
° Up counter counts from 0000
to 1111 and then changes
back to 0000
° Down counter counts from
1111 to 0000 and then back
to 1111
° Counter counts up or down
each clock cycle
° Output changes occur on
clock rising edge

Counters Fall 2017

 Counters with Parallel Load

Clear Clk Load Count Function

0 X X X Clear to 0
1 ↑ 1 X Load inputs
1 ↑ 0 1 Count
1 ↑ 0 0 No Change

Function Table
° If Clear is asserted (0), the
counter is cleared
° If Load is asserted data
inputs are loaded
° If Count asserted counter
value is incremented

Counters Fall 2017

 Binary Counter with Parallel Load and Preset
• Presettable parallel counter with
asynchronous preset.

If PL’ = 0, load P into flops

Counters Fall 2017
 Binary Counter with Parallel Load and Preset
• Commercial version of binary counter

Counters Fall 2017

 Summary

° Binary counters can be ripple or synchronous

° Ripple counters use flip flop outputs as flop triggers
• Some delay before all flops settle on a final value
• Do no require a clock signal

° Synchronous counters are controlled by a clock

• All flip flops change at the same time

° Up/Down counters can either increment or decrement a

stored binary value
• Control signal determines if counter counts up or down

° Counters with parallel load can be set to a known value

before counting begins.

Counters Fall 2017

 Shift Registers

Counters Fall 2017

 Overview

° Multiple flip flops can be combined to form a data

register
° Shift registers allow data to be transported one bit at a
time
° Registers also allow for parallel transfer
• Many bits transferred at the same time

° Shift registers can be used with adders to build

arithmetic units
° Remember: most digital hardware can be built from
combinational logic (and, or, invert) and flip flops
• Basic components of most computers

Counters Fall 2017

 Register with Parallel Load

° Register: Group of Flip-Flops

° Ex: D Flip-Flops
° Holds a Word (Nibble) of Data
° Loads in Parallel on Clock
Transition
° Asynchronous Clear (Reset)

Counters Fall 2017

 Shift Registers

° Cascade chain of Flip-Flops

° Bits travel on Clock edges
° Serial in – Serial out, can also have parallel load /
read

Counters Fall 2017

 Serial Transfer of Data

° Transfer from register X to register Y (negative

clock edges for this example)

Counters Fall 2017

 Serial Transfer
° Data transfer one bit at a time
° Data loopback for register A

Time Reg A Reg B

T0 1011 0011
T1 1101 1001
T2 1110 1100
T3 0111 0110
T4 1011 1011

Counters Fall 2017

 Parallel versus Serial

° Serial communications is defined as

• Provides a binary number as a sequence of binary digits, one
after another, through one data line.

° Parallel communications
• Provides a binary number through multiple data lines at the
same time.

Counters Fall 2017

 Shift register application

° Parallel-to-serial conversion for serial transmission

parallel outputs

parallel inputs

serial transmission

Counters Fall 2017

 Serial Addition (D Flip-Flop)

° Slower than
parallel
° Low cost
° Share fast
hardware on
slow data
° Good for
multiplexed
data

Counters Fall 2017

 Universal Shift Register

° Clear
° Clock
° Shift
• Right
• Left
° Load
° Read
° Control

Counters Fall 2017

 Universal Shift Register

° Clear
° Clock
° Shift
• Right
• Left
° Load
° Read
° Control

Counters Fall 2017

 Summary

° Shift registers can be combined together to allow for

data transfer
° Serial transfer used in modems and computer
peripherals (e.g. mouse)
° D flip flops allow for a simple design
• Data clocked in during clock transition (rising or falling edge)

° Serial addition takes less chip area but is slow

° Universal shift register allows for many operations
• The register is programmable.
• It allows for different operations at different times

° Next time: counters (circuits that count!)

Counters Fall 2017