USART

 UART = Universal Asynchronous Receiver/Transmitter

 It is commonly referred as serial port

 It is a peripheral for point-to-point communication between

two devices

 Communication occurs in serial, i.e. one bit at time Two

communication PINs: RX and TX.
USART
Universal Synchronous / Asynchronous Receiver / Transmitter
Serial Communications Interface (SCI)
PC serial port / modem
Transmit
Parallel  serial
Data byte as 8 serial bits
Receive
Serial  parallel
Assemble 8 bits as data byte
Modes
Asynchronous
Full duplex — simultaneous transmit + receive
Synchronous
Half duplex — transmit or receive
Master — synchronize data to internal clock
Slave — synchronize data to external clock

Embedded Systems — Hadassah College — Spring 2012 PIC Microcontroller Dr. Martin Land 2
USART

 The following parameters must be set in the UART hardware:

 transmission speed, in bps = Bit Per Second or baud

 number of bits per character, usually 8

 presence/absence of parity bit, usually absent

 number of stop bits, usually 1

 A setting 19200,8,N,1 means:

 speed = 19200 bit-per-second;

 bits = 8;
 parity = None;
 stop bits = 1
USART – Transmission basics
 When no transmission, the line is set to Logical “1”

 Then the software triggers the transmission of a byte

(e.g. “C”, hexcode 43, binary 0100 0011)

 First a Logical “0” is transmitted, called start bit

 Then the byte is transmitted LSB first

 An additional parity bit may follow (not in the example); it

used for error checking

 One or two stop bits (Logical “1”) ends the transmission

USART Transmit Operation
Data
Byte  TXREG  framing TSR  bit FIFO  TX pin
Framing — add start bit / parity bit

Interrupt on empty TXREG

TSR full / empty Port Enable

Parity bit
Transmit Speed

Embedded Systems — Hadassah College — Spring 2012 PIC Microcontroller Dr. Martin Land 5
USART Receive Operation
Data
RX pin  bit FIFO  RSR  RCREG  byte
Framing
Identify data between stop bits
Check for parity error Overrun Error Framing Error
Continuous Receive Enable

Sample + FIFO
Parity bit

Port Enable

RCREG full

Embedded Systems — Hadassah College — Spring 2012 PIC Microcontroller Dr. Martin Land 6
USART

 PIC’s hardware USART,

 The three registers are

 TXSTA,
 RCSTA and
 SPBRG.

 The SPBRG is used to calculate the baud rate of the transmissions.

USART – TRANSMIT STATUS AND CONTROL REGISTER
USART – RECEIVE STATUSAND CONTROL REGISTER
USART

We will only look at four bits from TXSTA and 1 bit on RCSTA.

 Bit TXEN (bit 5) on TXSTA enables or disables transmission,

 SYNC ( bit 4) sets asynchronous or synchronous mode while BRGH

(bit 2) sets high speed or low speed mode.

 The formula used to compute for the baud rate is different in high
speed or low speed mode shown below:
 X is the contents of the register SPBRG
USART - EXAMPLE

A baud rate of 9600 using a 4 MHz oscillator at high speed and

asynchronous mode will have SPBRG = 25 as shown:

 TRMT (bit 1) is a flag that sets if the data has been sent.

 SPEN (bit 7) of the RCSTA register enables RC6 and RC7 as serial port
pins. This is the bit you need to set to enable serial communication.

 The data to be transmitted must be placed inside the TXREG register

while the data received is placed inside the RCREG register.
USART - EXAMPLE
THANK YOU