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Udayana University
Summarized by:
Rizki Anugrah Wibowo 1004405117
I Made Agung Pranata 1204405030
Made Danu Widana 1204405033
I Kadek Arya Wiratama 1204405038
Ketut Alit Sukertha Winaya 1204405043
Bhrama Sakti Karenda Putra 1204405082
Outlines
OFFSET OUTPUT A 1 8 V+
NULL
1 8 N.C.
OFFSET V 4 + 5 +IN B
V 4 5 NULL
+ • + terminal : Source
V o
• – terminal : Ground
~ Vi • 0o phase change
+
V
o • + terminal : Ground
• – terminal : Source
• 180o phase change
~
V i
Double-Ended Input
• Differential input
+
V d V o • Vd V V
~ • 0o phase shift change
between Vo and Vd
~ V1 V 2
~
V 2
V 1
Ans: (A or B) ?
(A) (B)
Distortion
+V =+5V cc
+5V
+
V
o
V d 0
5V
V =5V cc
amplified
• Output voltage is ideally zero V i ~
due to differential voltage is
zero
• Practically, a small output
signal can still be measured
Note for differential circuits:
Opposite inputs : highly
amplified
Common inputs : slightly
amplified
Common-Mode Rejection
Common-Mode Rejection Ratio (CMRR)
Differential voltage input :
Noninverting
Vd V V Input +
Output
Common voltage input : Inverting
1 Input
Vc (V V )
2 Common-mode rejection ratio:
Gd G
Output voltage : CMRR 20 log 10 d (dB)
Gc Gc
Vo Gd Vd GcVc
Note:
When Gd >> Gc or CMRR
Gd : Differential gain Vo = GdVd
Gc : Common mode gain
CMRR Example
What is the CMRR?
100V + 100V +
80600V 60700V
20V 40V
Solution :
(Voltage Gain)
Sol: ? Hz
Gd
Since f1 = 10 MHz 0.707Gd
By using GB production equation
f1 = Gd fc
fc = f1 / Gd = 10 MHz / 20 V/mV 10MHz
= 10 106 / 20 103 1
= 500 Hz
0 fc f1
(frequency)
Ideal Vs Practical Op-Amp
Analysis Method :
Two ideal Op-Amp Properties:
(1) The voltage between V+ and V is zero V+ = V
(2) The current into both V+ and V termainals is zero
Vi Vi Vo Vo Rf
0 or 1
Ra Rf Vi Ra
v+ v+
vi + vi +
vo R1 v-
vo
v-
R2
Ra Rf Ra Rf
Noninverting amplifier Noninverting input with voltage divider
Rf Rf R2
vo (1 )vi vo (1 )( )vi
Ra Ra R1 R2
v+ v+
vi + vi +
vo R1
v-
v
o
v- R
2
Rf R
Less than unity gain
f
Voltage follower
vo vi vo
R2
vi
R1 R2
Inverting Amplifier
Ra Rb Rc j a R j
Inverting Integrator
Now replace resistors Ra and Rf by complex Zf
components Za and Zf, respectively, therefore Za
Zf
Supposing Vo Vin V o
Za
(i) The feedback component is a capacitor C, V ~ in +
i.e., 1
Zf
jC
(ii) The input component is a resistor R, Za = R
Therefore, the closed-loop gain (Vo/Vin) become: C
1 R
vo (t )
RC vi (t )dt
where vi (t ) Vi e jt V
o
R
C
0
to t1 t2 V
i V
o 0
+
to t1 t2
dV
vo i RC
dt
Non-ideal case (Inverting Amplifier)
Rf Practical op-amp
Ra +
Zin Zout
V o Vin
~
Vout
Vin ~ + AVin
Equivalent Circuit
Rf 3 categories are considering
Ra Close-Loop Voltage Gain
V in Input impedance
R R
V V o Output impedance
+ +
-AV
Close-Loop Gain
Applied KCL at V– terminal, Rf
Vin V V Vo V V
Ra
0 in
R R
Ra R Rf V V
o
Vin R R f Ra R f Ra R ARa R V R
Vo
Ra ARa R R f
The Close-Loop Gain, Av
Vo AR R f
Av
Vin R R f Ra R f Ra R ARa R
Close-Loop Gain
When the open loop gain is very large, the above equation become,
Rf
Av ~
Ra
V R f Ro
R R
if 1 A V
+
-AV
Input Impedance
Finally, we find the input impedance as,
1
1 1 A
R ( R f Ro )
Rin Ra Rin Ra
R R f Ro
R f Ro (1 A) R
Since, R f Ro (1 A) R , Rin become,
( R f Ro )
Rin ~ Ra
(1 A)
Again with R f Ro (1 A)
Rin ~ Ra