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Figure 5.1: Physical structure of the enhancement-type NMOS transistor: (a) perspective view, (b) cross-
section. Note that typically L = 0.03um to 1um, W = 0.1um to 100um, and the thickness of the oxide
layer (tox) is in the range of 1 to 10nm.
two n-type doped
5.1. Device Structure regions (drain, source)
and Operation
layer of SiO2 separates
source and drain
v
(eq5.7) iD C oxWvOV n DS in A
charge per unit
L
length of electron
n -channel drift velocity
Oxford University Publishing in C / m in m2 / Vs
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
5.1.4. Applying
a Small vDS
W
(eq5.7) iD nC ox vOV vDS in A
L
vDS 1
(eq5.8a) rDS in
iD W
nCox vOV
process
L
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transconductance aspect
parameter
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
ratio
5.1.4. Applying a Note that this vOV represents
the depth of the n-channel -
Small vDS what if it is not assumed to
be constant? How does this
equation change?
Note
Q: that
What thisdo
is we
one note
VERY from equation (5.7)?
IMPORTANT
A: For equation in of v , the n-channel acts like a
small values DS
Chapter 5.
variable resistance whose value is controlled by vOV.
W
(eq5.7) iD nC ox vOV vDS in A
L
vDS 1
(eq5.8a) rDS in
iD W
nCox vOV
process
L
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transconductance aspect
parameter
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
ratio
5.1.4. Applying a
Small vDS
1/rDS
Q vOV 12 vDS L
Figure 5.6(a): For a MOSFET with vGS = Vt + vOV application of vDS causes the voltage drop along the
channel to vary linearly, with an average value of vDS at the midpoint. Since vGD > Vt, the channel still
exists at the drain end. (b) The channel shape corresponding to the situation in (a). While the depth of
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Microelectronic Circuitsthe channel
by Adel atKenneth
S. Sedra and the source is still proportional to vOV, the drain end is not.
C. Smith (0195323033)
Q: How can this non-
linearity be explained?
W
step #4: Define iDS (eq5.7) iD nC ox vOV 2 vDS vDS 1
L
in terms of vDS
and vOV.
W
n C ox v OV 2 vDS vDS
1
if vDS vOV
iD is dependent on the L
(eq5.7) iD W
apparent vOV (not vDS n C ox v OV 2 vDS vDS
1
otherwise
L
inherently) which does not if vDS vOV then vDS vOV
change after vDS > vOV
W
n C ox v OV 2 v DS v DS
1
if vDS vOV
L
(eq5.14) iD in A
1 W 2
n ox vOV
C otherwise
2 L
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triode vs. saturation region
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
saturation occurs
once vDS > vOV
W
triode: n C ox v OV 2 vDS vDS
1
if vDS vOV
(eq5.14) iD L in A
saturation: 1 nC ox W vO2 V otherwise
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Microelectronic Circuits by Adel S.
Oxford University
2
Kenneth C. Smith (0195323033) L
pinch-off does not mean
5.1.6. Operation for blockage of current
vDS >> vOV
Figure 5.9(a): Physical structure of the PMOS transistor. Note that it is similar to the NMOS transistor
shown in Figure 5.1(b), except that all semiconductor regions are reversed in polarity. (b) A negative
voltage vGS of magnitude greater than |Vtp| induces a p-channel, and a negative vDS causes a current iD
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. to flow
Smith from source to drain.
(0195323033)
5.1.7. The p-Channel
MOSFET
Figure 5.9(a): Physical structure of the PMOS transistor. Note that it is similar to the NMOS transistor
shown in Figure 5.1(b), except that all semiconductor regions are reversed in polarity. (b) A negative
voltage vGS of magnitude greater than |Vtp| induces a p-channel, and a negative vDS causes a current iD
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. to flow
Smith from source to drain.
(0195323033)
5.1.7. The p-Channel
MOSFET
Figure 5.11 (a): Circuit symbol for the n-channel enhancement-type MOSFET. (b) Modified circuit symbol with
an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n
channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect
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Microelectronic Circuits by Adel S. Sedra andof the body
Kenneth C. Smithon device operation is unimportant.
(0195323033)
5.2.2. The iD-vDS
Characteristics
2 L
this relationship provides
basis for application of
MOSFET as amplifier
Figure 5.14: The iD-vGS characteristic of an NMOS transistor operating in the saturation region. The iD-vOV
characteristic can be obtained by simply re-labeling the horizontal axis, that is, shifting the origin to the point
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vGS = Vtn.
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
5.2.2. The iD-vGS
Characteristic
1 W 2
(eq5.17) iD nCox vOV in A
2 L
1 W 2
(eq5.23) iD nC ox vOV 1 vDS in A
2 L
valid when vDS vOV
Q: What is ?
A: A device parameter with the
units of V -1, the value of which
depends on manufacturer’s
design and manufacturing
process.
much larger for newer tech’s
Figure 5.17 demonstrates the effect
of channel length modulation on Figure 5.17: Effect of vDS on iD in the
vDS-iD curves saturation region. The MOSFET
parameter VA depends on the process
In short, we can draw a straight
technology and, for a given process, is
line between VA and saturation.
proportional to the channel length L.
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
5.2.5. Characteristics of
the p-channel MOSFET
Characteristics of the p-
channel MOSFET are
similar to the n-channel,
however with many signs
reversed.
Please review section
5.2.5 from the text, with
focus on table 5.2.
Refer to textbook…
Problem Statement:
Design the circuit in Figure
5.23 to establish a drain
voltage of 0.1V. What is
the effective resistance
between drain and source
at this operating point?
Let Vtn = 1V and k’n(W/L) =
1mA/V2.
Figure 5.23: Circuit for Example
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5.5.
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
Example 5.6: MOSFET
1 2
(eq5.32) vDS VDD kn vGS Vt RD
2
iD
2kn RDVDD 1 1
(eq5.33) VGS B Vt
kn RD
1 2
(eq5.34) VDS VDD kn VGS Vt RD
2
Q: How can we linearize VTC? Vsource ID RD
A: Appropriate biasing
technique
A: Dc voltage vGS is
selected to obtain
operation at point Q on
segment AB
Q: How do we choose vGS?
A: Will discuss shortly…
Figure 5.28: biasing the MOSFET
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
segment AB of VTC
5.4.3. Biasing the MOSFET
to Obtain Linear
Amplification this equation is simply ohm's law
1 2
(eq5.34) VDS VDD kn VGS Vt RD
2
bias point / dc operating pt. Vsource ID RD
(eq5.37) Av knVOV RD
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
5.4.4. Small-Signal
Gain
VDD
max ID RD
max Av 10VDD
VOV /2
0.1V
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
Example 5.9:
MOSFET Amplifier
Figure 5.32: Operation of the MOSFET in Figure 5.29(a) as a switch: (a) Open,
corresponding to point A in Figure 5.31; (b) Closed, corresponding to point C in
Figure 5.31.Oxford The closure resistance is approximately equal to rDS because VDS is
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smithusually
(0195323033)very small.
5.4.6. Locating the
Bias Point Q
gain is low
gain is high
1 1
(eq5.40) ID kn VGS Vt knVOV
2 2
2 2
(eq5.41) VDS VDD RD ID
1
n GS t
2
Note that this differs from previous iD k V V
(eq5. 43) 2
analyses - because of attempt to 1 2
isolate the effect of v C. Smith
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from VGS. kn VGS Vt vgs knvgs
Microelectronic Circuits by Adel S. Sedra and Kennethgs (0195323033) 2
Note that to minimize nonlinear
Q: What is effect of distortion, vgs should be kept small.
vgs on iD?
½knvgs2 << kn(VGS-Vt)vgs
vgs << 2(VGS-Vt)
step #3: Classify terms. vgs << 2vOV
dc bias current (ID).
linear gain – is desirable.
nonlinear distortion – is undesirable, because rep.
distortion.
1 1 2
(eq5.43) iD kn VGS Vt kn VGS Vt vgs knvgs
2
2 2
linear
dc bias current ID gain nonlinear
term distortion
term
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
Q: What is effect of
vgs on iD?
1 1 2
(eq5.43) iD kn VGS Vt kn VGS Vt vgs knvgs
2
2 2
linear
dc bias current ID gain nonlinear
term distortion
term
vgs
(eq5.47) MOSFET transconductance gm kn VGS Vt
id
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
Figure 5.35: Small-signal operation of the MOSFET amplifier.
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
5.5.3. The Voltage
Gain
action: solve for gain
vds
Figure 5.34: Conceptual circuit utilized (eq5.51) Av gm RD
to study the operation of the MOSFET
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vgs
as aCircuits
Microelectronic small-signal amplifier.
by Adel S. Sedra and Kenneth C. Smith (0195323033)
5.5.3. The Voltage
Gain
Figure 5.37: Small-signal models for the MOSFET: (a) neglecting the dependence of
iD on vDS in saturation (the channel-length modulation effect) and (b) including the
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Microelectronic Circuits by Adel S. Sedra andeffect
Kenneth C. of
Smithchannel
(0195323033) length modulation
More Observations
vds
Small signal parameters (eq5.51) Av gm RD
vgs
(gm, ro) both depend on
vds
dc bias point (eq5.54) Av gm RD ||ro
vgs
If channel-length
more accurate, b/c does consider
modulation is considered, channel length modulation
2ID
Observations from (5.47) (eq5.40) VOV
kn W / L
gm is proportional to square
root of dc bias current (ID)
For given ID, gm is proportional W
(eq5.55) gm kn VOV
to (W/L)1/2 L
action: substitute for
This behavior is sharp contrast to VOV as defined above
the bipolar junction transistor
W 2ID
(BJT). (eq5.56) gm kn
L knW / L
For which, gm is proportional to
action: simplify
gm alone (not size or
geometry). (eq5.56) gm 2kn W / L ID
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
5.5.6. The
Transconductance gm
2ID
(eq5.56) gm VOV
V V 2
GS t
action: simplify
Figure 5.38: The slope of the tangent at
2ID 2ID
(eq5.57) gm the bias point Q intersects the vOV axis
Oxford University Vt VOV
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
at 1/2VOV. Thus gm = ID/(1/2VOV).
5.5.6: The
Transconductance gm
Through circuit
transformation, it is
possible to develop
alternative circuit models
T-Equivalent-Ckt Model
is shown to right.
Figure 5.40: Development of the T equivalent-circuit model for the MOSFET. For
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Microelectronic Circuitssimplicity,
by Adel S. Sedra andro hasC.been
Kenneth omitted; however, it may be added.
Smith (0195323033)
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
Summary
The CG amplifier has a low input resistance and thus it alone has
limited and specialized applications. However, its excellent high-
frequency response makes it attractive in combination with the CS
amplifier.
The source follow has (ideally) infinite input resistance, a voltage
gain lower than but close to unity, and a low output resistance. It
is employed as a voltage buffer and as the output stage of a
multistage amplifier.
A key step in the design of transistor amplifiers is to bias the
transistor to operate at an appropriate point in the saturation
region.
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)