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Part A: Overview of Snubber Circuits for Hard-Switched
Converters
Function: Protect semiconductor devices by: Types of Snubber Circuits
Vd Df Cs
t
- Sw v (t)
Df Vd
Diode voltage
di L
L = stray inductance without snubber L
d t
Sw closes at t = 0
Rs - Cs = snubber circuit
diL
Diode breakdown i f V d + L > BV BD
dt
Need for Snubbers with Controlled Switches
Step-down converter
L1
L 2
I o L1 , L , L = stray inductances
2 3
V
d
i L = L1 + L + L
sw + 2 3
Sw vsw
L 3 -
idealized
i sw s witching
t t 5 loci
6
t o turn-off
Overvoltage at turn-off
t1 due to stray inductance
turn-on
Overcurrent at turn-on due to
diode reverse recovery
t
4 t3 vsw
Vd
Overvoltage Snubber
Step-down converter with t f i = s wit ch cur rent fall t ime ; kV d = overvo lta ge o n Sw
overvoltage snubber comprised
of Dov, Cov, and Rov. diLIo
kV d = L = L
dt t fi
Overvoltage snubber limits
overvoltage (due to stray I kV d t f i
nductance) across Sw as it L =
turns off. Io
Turn-on Snubber Recovery at Switch Turn-off
Io R
I o RLs exp(-R Ls t/L s ) Ls
is
w V
Io d
vs
t rv
w
1) Non-sinusoidal PWM in which all pulses have the same width and are
normally modulated equally to control the output voltage as shown in
Fig. 9.28. The widths of these pulses are adjusted equally to control the
output voltage.
mf
fs (9.56)
fo
Equal Pulse (Uniform) PWM
The Equal Pulse PWM technique, known also as a single pulse PWM control.
Generating the equal and multiple pulses is achieved by comparing a square wave
reference voltage waveform v ref (t ) to a triangular control (carrier) voltage waveform vcont. (t )
(a) (b)
Fig 9.30 Examples of equal pulses. (a) One-pulse output. (b) Two-pulse output.
Part C: Sinusoidal PWM
Basic concept:
Recall that in PWM dc-dc converters the duty cycle is modulated between 0 and
1 in order to regulate the dc output voltage. In the steady state, the duty cycle
in PWM switch mode converters is relatively constant and does not vary with
time:
Vo DVdc (9.76)
whereD is the duty cycle representing the ratio between the on-time of the
switch to the switching period, and Vo is the average output voltage.
(a) (b)
(c)
Fig 9.38 Unipolar PWM output. (a) A positive sinusoidal reference to produce vo1 (b)
Positive sinusoidal reference to produce vo2. (c) The differential output vo = vo1 vo2.
Signal Generation
Advanced digital and analog techniques exist in todays inverters to generate the
driving signals that produce a sinusoidal PWM. Fig. 9.39 shows a comparator that
compares a triangular signal to a sinusoidal reference signal.
Fig 9.39 Simplified circuit showing how signals are generated in sinusoidal PWM
inverters.