A VOLTAGE RIDE-THROUGH

ENHANCEMENT STRATEGY FOR

UNIFIED POWER FLOW CONTROLLERS

Under the Guidance of

Sri. D. KIRAN KUMAR
Assistant Professor
The Dept. Of EEE
JNTU Hyderabad

B.GAYATHRI
14011D4908
EPE

Test Circuit

SIMULATION

Simulation
Results

Step Response Of The UPFC controlled system with fuzzy a)

Active And Reactive power in UPFC line , L2 b) Active And
Reactive power in one of the line L1 c) dc link capacitor
voltage waveforms

(b)

(a)

(c

Step Response Of The UPFC with fuzzy obtained by removing

double balance algorithm a) Active And Reactive power in UPFC
line , L2 b) Active And Reactive power in one of the line L1 c)
dc link capacitor voltage waveforms

(a)

(b
)

(c)

Three-phase fault: (a) active and reactive power in healthy line , L1 with UPFC;
(b) active and reactive powers in UPFC line L2 ; (c) C1 and C2 capacitor
voltages; and (d) dc-link capacitor voltage.

(a
)

(c
)

(b)

(d

(a
)

(b
)

(c
Three-phase fault without capacitor
balancing in the shunt
)

converter and without real-time PWM generation: (a) active and

reactive powers in the UPFC line L2 , (b) C1 and C2 capacitor
voltages, and (c) dc-link capacitor voltage

Conclusions:
This paper proposes a voltage ride-through
enhancement strategy for multilevel UPFCs.
Active and Reactive power control
PWM generation in both UPFC multilevel
converters, dc-link voltage control gains with low
sensitivity to dc link current
Robust to the parameter variations
Balancing of the dc-link capacitor voltages
Voltage unbalances due to line faults are
cleared in a very short span
Thus the proposed controller is effective for the
power control keeping in view the economic and
environmental constraints of power system
network.

References:
1.

2.
3.

4.
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