Microelectronics,

Solid State
Fabrication,
Packaging and
Failure Analysis
ECE 4B/T 1-2:30/TH 1-2:30/COE52

Course Description
At the end of the course, the students should be able to
Semiconductor Physics - Explain and apply basic
concepts of semiconductor physics relevant to devices
Semiconductor Devices - Describe, explain, and
analyze the operation of important semiconductor
devices in terms of their physical structure
Problem Analysis Analyze and find causes of defect
caused by fabrication and ESD
Circuit Analysis - Analyze and design microelectronic
circuits for linear amplifier and digital applications

Course Outline:
1. Review

of material science of
semiconductor devices
2. Introduction to Semiconductor Industry
3. Packaging Technologies (Ceramic,
Plastics)
4. IC Assembly
5. External Visual Criteria
6. Failure Analysis
7. Cause analysis using 8Discipline
8. Reliability Statistics
9. Activation Energy
10.Bath Tub Curve

Introduction to
Semiconductors Industry
Topic #1 Wafer Fab and Assembly Overview

Introduction to
Semiconductors
What is Semiconductor?
Asemiconductoris a material which has electrical
conductivitybetween that of a conductorsuch as copper and
that of an insulatorsuch as glass.
Semiconductors are the foundation of modern electronics,
including transistors, solar cells, light-emitting diodes(LEDs),
quantum dotsand digital and analog integrated circuits.
The modern understanding of the properties of a
semiconductor relies on quantum physicsto explain the
movement of electronsinside a latticeof atoms.
The increasing understanding of semiconductor materials
and fabrication processes has made possible continuing
increases in the complexity and speed of semiconductor
devices, an effect known asMoore's Law.

Semiconductor History
Devices using semiconductors were at first constructed based
on empirical knowledge, before semiconductor theory
provided a guide to construction of more capable and reliable
devices.
Alexander Graham Bellused the light-sensitive property of
selenium toPhotophone transmit sound over a beam of
light in 1880.
A working solar cell, of low efficiency, was constructed by
Charles Frittsin 1883 using a metal plate coated with
selenium and a thin layer of gold; the device became
commercially useful in photographic light meters in the
1930s.
Point-contact microwave detector rectifiers made of lead
sulfide were used byJagadish Chandra Bosein 1904;
thecat's-whisker detector using natural galena or other
materials became a common device in thedevelopment of
radio. However, it was somewhat unpredictable in

Semiconductor History

In 1906H.J. Roundobserved light emission when

electric current passed through silicon carbide
crystals, the principle behind thelight emitting
diode.
Oleg Losevobserved similar light emission in
1922 but at the time the effect had no practical
use.
Power rectifiers, using copper oxide and
selenium, were developed in the 1920s and
became commercially important as an alternative
tovacuum tube rectifiers.

Semiconductor History

In 1922Oleg Losevdeveloped twoterminal,negative resistance amplifiers for radio;

however, he perished in theSiege of Leningrad.
In 1926Julius Edgard Lilenfeldpatented a device
resembling a modern field-effect transistor, but it
was not practical.

Semiconductor History

R. Hilsch and R. W. Pohl in 1938 demonstrated a

solid-state amplifier using a structure resembling
the control grid of a vacuum tube; although the
device displayed power gain, it had acut-off
frequency of one cycle per second, too low for
any practical applications, but an effective
application of the available theory.
AtBell Labs,William Shockleyand A. Holden
started investigating solid-state amplifiers in
1938.

Semiconductor History

The first pn junction in silicon was observed byRussell

Ohlabout 1941, when a specimen was found to be lightsensitive, with a sharp boundary between p-type impurity
at one end and n-type at the other. A slice cut from the
specimen at the pn boundary developed a voltage when
exposed to light.
In France, during the war,Herbert Matarhad observed
amplification between adjacent point contacts on a
germanium base. After the war, Matar's group announced
their "Transistron" amplifier only shortly after Bell Labs
announced the "transistor".
Some of the properties of semiconductor materials were
observed throughout the mid 19th and first decades of the
20th century. Development of quantum physics in turn
allowed the development of thetransistorin 1948.

Semiconductor Industry

Thesemiconductor industryis the

aggregate collection of companies engaged
in thedesign
andfabricationofsemiconductor devices. It
formed around 1960, once the fabrication of
semiconductors became a viable business.
It has since grown to be the $260 billion
industry it is today.

Semiconductor Industry

Industry structure

Process Flow of Semiconductor

Manufacturing
Design

PreAssembly

Layout

Front Line
Assembly

Mask
Generatio
n

Backend
Assembly

Fabrication

Final Test

Electrical
Test

Packaging

Fabs

Assembly

Wafer

A typicalwafer is made out of extremelypure

silicon that isgrown intomono-crystalline
cylindricalingots (boules)up to 300mm (slightly
less than 12inches) in diameter using
theCzochralski process. These ingots are then
sliced into wafers about 0.75mm thick and
polished to obtain a very regular and flat surface.
Once the wafers are prepared, many process
steps are necessary to produce the desired
semiconductor integrated circuit. In general, the
steps can be grouped into two major parts:
Front-end-of-line (FEOL) processing
Back-end-of-line (BEOL)processing

Wafer Fabrication

Semiconductor device fabricationis the process used to create

theintegrated circuits that are present in everydayelectrical
andelectronic devices.
A multiple-step sequence of photolithographic and chemical processing
steps during which electronic circuits are gradually created on awafer
made of pure semiconducting material.Silicon is almost always used, but
variouscompound semiconductors are used for specialized applications.
The entire manufacturing process, from start to packaged chips ready for
shipment, takes six to eight weeks and is performed in highly specialized
facilities referred to asfabs.

NASA's Glenn Research Centercleanroom

Front-end-of-line (FEOL)
processing

FEOL processing refers to the formation of thetransistors directly in

thesilicon. The raw wafer is engineered by the growth of an ultrapure,
virtually defect-free silicon layer throughepitaxy. In the most advanced logic
devices,prior to the silicon epitaxy step, tricks are performed to improve the
performance of the transistors to be built. One method involves introducing
astraining stepwherein a silicon variant such as silicon-germanium (SiGe)is
deposited. Once the epitaxial silicon is deposited, the crystal lattice becomes
stretched somewhat, resulting in improved electronic mobility. Another
method, calledsilicon on insulator technology involves the insertion of an
insulating layer between the raw silicon wafer and the thin layer of
subsequent silicon epitaxy. This method results in the creation of transistors
with reduced parasitic effects.

Gate oxide and implants

Front-end surface engineering is followed by growth of thegate dielectric
(traditionallysilicon dioxide), patterning of the gate, patterning of the source
and drain regions, and subsequent implantation or diffusion of dopants to
obtain the desired complementary electrical properties.

Back-end-of-line (BEOL)
processing
Metal layers
Once the various semiconductor devices have been created,
they must be interconnected to form the desired electrical
circuits. This occurs in a series of wafer processing steps
collectively referred to as BEOL
BEOL processing involves creating metal interconnecting
wires that are isolated by dielectric layers.
The insulating material has traditionally been a form of
SiO2or asilicate glass, but recently newlow dielectric
constant materials are being used (such assilicon
oxycarbide), typically providing dielectric constants around
2.7 (compared to 3.9 for SiO2), although materials with
constants as low as 2.2 are being offered to chipmakers.

Back-end-of-line (BEOL)
processing
Interconnect
Synthetic detail of a standard cell through four layers of planarized copper
interconnect, down to the polysilicon (pink), wells (greyish) and substrate
(green).
Historically, the metal wires have been composed ofaluminium. In this
approach to wiring (often calledsubtractive aluminium), blanket films of
aluminium are deposited first, patterned, and then etched, leaving isolated
wires. Dielectric material is then deposited over the exposed wires. The
various metal layers are interconnected by etching holes (called "vias")in
the insulating material and then depositingtungsten in them with aCVD
technique; this approach is still used in the fabrication of many memory
chips such asdynamic random access memory(DRAM), because the
number of interconnect levels is small (currently no more than four).
More recently, as the number of interconnect levels for logic has
substantially increased due to the large number of transistors that are now
interconnected in a modernmicroprocessor, the timing delay in the wiring
has become so significant as to prompt a change in wiring material (from
aluminium tocopper layer) and a change in dialectric material (from silicon
dioxides to newerlow-K insulators).

IC Assembly

A series of manufacturing processes

wherein the IC is bonded, wired,
encapsulated and tested.

Assembly Line

IC Assembly
PreAssembly

Front Line
Assembly

Backend
Assembly

Final Test

Packaging

IC Assembly
PreAssembly

Front Line
Assembly

Grinding/Saw
/Die cut

Incoming
Inspection

End Line
Assembly

Final Test

Packaging
Assembly

Die Attach

Wire Bond

IC Assembly
PreAssembly

Front Line
Assembly

Molding

Laser
Marking

End Line
Assembly

Final Test

Packaging
Assembly

Trim & Form

Visual
Inspection

Assignment No. 1 (50pts):

Create a 1-pager summary in a short

bondpaper with 1 margin (all sides),
landscape
Contents should include definition, history,
trends, insights, prediction for 2016.
Name,Year/sec/date should be at the bottom of
the page.
Submit next meeting during the1st hour of the
class
Late assignments will have 20 points
deduction.