Simulation of Switching Converters

20V
AVG(V(control))
10V
SEL>>
0V
V(control)
20V
V(control)
AVG (V(control))
AVG (V(error))
0V
V(error)
-20V
V(error)
40V
AVG (V(error))
V(out)
20V
AVG (V(out))
0V
0s
1ms
2ms
V(out)
AVG (V(out))
3ms
4ms
5ms
Time
6ms
7ms
8ms
9ms
10ms
Chapter 9
Simulation
of
Switching Converters
Overview
PSpice
PSpice Simulations using .CIR

PSpice Simulations using schematics entry
PSpice Simulations Using Behavioral Modeling
PSpice simulations using vendor models
Small-signal analysis of switching converters
Creating capture symbols for PSpice simulation
Solving convergence problems
Matlab
Simulink
Power switchin
Simulation of switchi

An Ideal Open-Loop Buck Converter
Open-loop buck converter simulation
* SWITCHING FREQUENCY = 1 KHZ ; DUTY CYCLE = 50%
VPWM 1 0 PULSE(0 10 0 1US 1US 0.5MS 1MS)
* PULSE PWM SOURCE: PULSED VOLTAGE = 10 V, RISE TIME = 1 US,
* FALL TIME = 1 US, PULSE WIDTH = 500 US, PERIOD = 1 MS.
L0 1 2 10M
C0 2 0 100U
LO
2
1
RL 2 0 5
10mH
.TRAN 50US 20MS
+
CO
.OPTION ITL5=0
VPWM
100F
.PROBE
.END
R
5O
Power switchin

8.0
V1(RL)
4.0
I(L0)
0
I(C0)
-4.0
0s
V1(RL)
5ms
I(C0)
I(L0)
10ms
15ms
20ms
Time
Power switchin

6.0
V(2)
L = 50 mH
4.0
2.0
I(LO)
I(CO)
0
-2.0
0s
I(C0)
Power switchin
5ms
I(L0)
10ms
V(2)
15ms
20ms
25ms
30ms
35ms
40ms
45ms
50ms
Time

6.0
L = 5 mH
V(C2)
4.0
2.0
I(LO)
0
I(CO)
-1.0
0s
5ms
V(2)
Power switchin
I(LO)
I(CO)
10ms
15ms
20ms
Time

10
L = 1.25 mH
8
V(2)
6
4
I(LO)
2
-2
I(CO)
0s
5ms
V(2)
Power switchin
I(LO)
I(CO)
10ms
15ms
20ms
Time

8.0
L = 10 mH
and
C = 500 uF
V(2)
6.0
4.0
2.0
I(LO)
I(CO)
-2.0
0s
5ms
V(2)
Power switchin
I(LO)
I(CO)
10ms
15ms
20ms
Time

10
L = 1.25 mH
and
C = 500 uF
V(2)
I(LO)
0
I(CO)
-5
Power switchin
0s
V(2)
I(LO)
I(CO)
5ms
10ms
15ms
20ms
Time

N+
Voltage-controlled switch
Nc+
Ron
S
Nc-
N-
S<name> N+ N- NC+ NC- SNAME

.MODEL SNAME VSWITCH (RON=0.01 ROFF=1E+7 VON=0.7 VOFF=0)
Power switchin
10

N+
Current-controlled switch
Ron
VN
N-
W<name> N+ N- VN WNAME
.MODEL WNAME ISWITCH (RON=0.01 ROFF=1E+7 ION=0.1 IOFF=0)
Power switchin
11
OPEN-LOOP BUCK CONVERTER WITH AN IDEAL SWITCH

* SWITCHING FREQUENCY = 1 KHZ ; DUTY CYCLE = 50%
VS 1 0 10.0
Buck Converter with an Ideal Switch
VPWM 100 101 PULSE(0 1 0 1US 1US 500US 1MS)

S1 1 2 100 101 SX
RSX 100 0 10G
S1
DFW 0 2 D1
RL 3 0 5
10mH
L0 2 3 10M
C0 3 0 100U
LO
VS
10V
DFW
RSX
CO
100uf
R
5ohms
VPWM
0
.MODEL SX VSWITCH (RON=0.01 ROFF=1E+7 VON=1 VOFF=0)

.MODEL D1 D
Power switchin
.TRAN 0.05MS 20MS
12

6.0
V(3)
4.0
2.0
I(LO)
I(CO)
0
-1.0
0s
5ms
V(3)
I(LO)
10ms
15ms
20ms
I(CO)
Time
Power switchin
13

5.0

V(3)
I(CO)*20
-3.0
15.0ms
V(3)
15.5ms
20* I(CO)
Power switchin
16.0ms
16.5ms
17.0ms
17.5ms
18.0ms
Time
14

Using Initial Conditions IC
6.0
V(3)
4.0
2.0
I(LO)
I(CO)
0
-1.0
L0 2 3 100U IC=1
C0 3 0 IC=5
.TRAN 2NS 200NS UIC
Power switchin
0s
5ms
V(3)
I(LO)
10ms
15ms
20ms
I(CO)
Time
15
PSpice Simulations using schematics

entry
Boost converter
L1
pwm
10mH
+
V1
10Vdc
V1 = 0
V2 = 1
TD = 0
TR = 1n
TF = 1n
PW = 0.5m
PER = 1m
V2
S1
++
- S
D1
out
Dbreak
VOFF = 0.0V
VON = 1.0V
ROFF = 1e6
RON = 1.0
C1
100F
R1
20O
Power switchin
16

entry
25V
20V
15V
10V
5V
0s
5ms
V(out)
Power switchin
10ms
15ms
20ms
25ms
30ms
Time
17

entry
3.0A
I(L1)
2.0A
1.0A
0A
-1.0A
I(C1)
-2.0A
0s
I(L1)
Power switchin
5ms
I(C1)
10ms
15ms
20ms
25ms
30ms
Time
18
PSpice Simulations Using

Behavioral Modeling
ABM.OLB
Control
part library
system parts
Power switchin
19
Control system parts
Power switchin
20
Power switchin
21
Power switchin
22
Power switchin
23
Power switchin
24
PSpice-equivalent parts
Power switchin
25
PSpice-equivalent parts
Power switchin
26
Operators in ABM expressions
Power switchin
27
Operators in ABM expressions
Power switchin
28
Functions in arithmetic
expressions
Power switchin
29
Functions in arithmetic
expressions
Power switchin
30
Examples of ABM blocks use

PARAMETERS:
PI = 3.141592654
freq = 1k
3*sin (2*PI*freq*TIME)
sine
ABM and PARAM

Power switchin
31

3*V (sine)
control
Node voltages can be accessed from ABM blocks
Power switchin
32

sine
rms
If (TIME<=0,0,SQRT(SDT(PWR(V(%IN),2))/TIME))
RMS meter
If(argument,then,else)
If (TIME<=0, 0, SQRT(SDT(PWR(V(%IN),2))/TIME))
Power switchin
33

If (V(%IN1) > V(%IN2),1,0)
control
triangular
V1 = -10
V2 = 10
TD = 0
TR = 1u
TF = 1u
PW = 1n
PER = 2u
pwm
V4
PWM modulator
Power switchin
34
Sin (2*PI*100k*ABS(V(%IN)) * TIME)

triangular
VCO
VCO implementation with ABM1
Power switchin
35
PSpice Simulations Using Control

Blocks
control
triangular
V1 = -10
V2 = 10
TD = 0
TR = 0.5m
TF = 0.5m
PW = 1n
PER = 1m
100k
10
pwm
V4
PWM modulator with control blocks

Power switchin
36

Blocks
In-
PARAMETERS:
R2
10Meg
0
In+
0
R1
10Meg
1Vac
0Vdc
V4
Vcc = +12
VEE = 0
{Vcc}
100k
50
IN
OpAmp
50 + s OUT
{VEE}
Model of an operational amplifier

Power switchin
37

Blocks
100
50
0
SEL>>
-50
0d
DB(V(OPAMP))
-50d
-100d
1.0mHz 10mHz
P(V(OPAMP))
1.0Hz
100Hz
10KHz
1.0MHz
100MHz
Frequency
Open loop frequency response

Power switchin
38

Blocks
R3
10k
InR4
1k
R2
10Meg
0
In+
0
R1
10Meg
1Vac
0Vdc
V4
PARAMETERS:
Vcc = +12
VEE = 0
{Vcc}
100k
IN
50
50 + s OUT
OpAmp
{VEE}
Closed loop amplifier

Power switchin
39

Blocks
50
-50
0d
DB(V(OPAMP))
-50d
SEL>>
-100d
1.0mHz 10mHz
P(V(OPAMP))
1.0Hz
100Hz
10KHz
1.0MHz
100MHz
Frequency
Closed loop frequency response

Power switchin
40
Voltage mode PWM boost converter

R2
1
L1
10mH
pwm
D1
S1
Dbreak
++
V1
- S
10Vdc
out
VOFF = 0.0V
VON = 1.0V
ROFF = 1e6
RON = 0.05
C1
100F
R1
20
E1
++
- E
If (V(%IN1) > V (%IN2),1,0)

control
pwm_out
PWM
modulator saw
V1 = 0
V2 = 10
V4
TD = 0
TR = 999u
TF = 1n
PW = 1n 0
PER = 1m
Power switchin
GAIN = 0.25
sense
error
12
1Meg
-12
1Meg+s
5
Vref
Error amplifier
41
Voltage mode PWM boost converter

20V
AVG(V(control))
10V
SEL>>
0V
V(control)
20V
V(control)
AVG (V(control))
AVG (V(error))
0V
V(error)
-20V
V(error)
40V
AVG (V(error))
V(out)
20V
AVG (V(out))
0V
0s
1ms
2ms
V(out)
AVG (V(out))
3ms
4ms
5ms
6ms
7ms
8ms
9ms
10ms
Time
Power switchin
42
PSpice simulations using vendor

models
R7
L1
10mH
IC = 0
100uF
100
V1
MTP15N05E/MC
ESR
10m
300k
R1
sense
20
R3
100k
R5
+15
0
control
G
0
-15
PWM modulator
3k
R4
V-
V+
LM311
pwm_out
V-
.TRAN 0 30m 0 0.1u

.OPTIONS STEPGMIN
.OPTIONS ABSTOL= 10p
.OPTIONS ITL1= 400
.OPTIONS ITL4= 500
.OPTIONS RELTOL= 0.01
.OPTIONS VNTOL= 10u
B/S
-15
R8
300
Power switchin
R2
C1
X2
V1 = 0
V2 = 10
TD = 0
TR = 999u
TF = 1n
PW = 1n
PER = 1m
1k
TL084
saw
V4
V+
10Vdc
out
MUR420
R6
+
D1
pwm
5
Vref
Error amplifier
+15
0
43
PSpice simulations using vendor

models
4.0A
2.0A
0A
I(L1)
5.2V
5.0V
4.8V
V(control)
20V
10V
SEL>>
0V
0s
V(out)
5ms
10ms
15ms
20ms
25ms
30ms
Time
Power switchin
44
Vorperian models for PSpice
Power switchin
45
Power switchin
46
Power switchin
47

**** VMSSCCM ****
* Small signal continuous conduction voltage mode model
* Params: RMPHITE --> External ramp height
*
D
--> Duty cycle
*
Ic --> Current flowing from terminal C
*
Vap --> Voltage across terminal A P
*
Rsw
--> Switch on resistance
*
Rd
--> diode on resistance
*
Rm
--> which models the base storage effects
*
Re
--> models ripple across esr of cap
* Pins control voltage -*
common -------- |
*
passive----- | |
*
active -- | | |
.subckt VMSSCCM A P C VC Params: RMPHITE=2 D=0.4 IC=1 VAP=20
+
Rsw=1e-6 Rd=1e-6 Re=1e-6 Rm=1e-6
efm 4 0 value ={v(Vc)/rmphite}
e2 A 6 value={v(0,4)*Vap/d}
g1 A P value={v(4)*IC}
gxfr 6 P VALUE={I(vms)*D}
exfr 9 P VALUE={V(6,P)*D}
vms 9 8 0
rd 8 C {d*rd+(1-d)*rsw+d*(1-d)*re+rm}
rope 4 0 1g
rgnd 0 P 1g
.ends
Power switchin
48
Small-signal analysis of switching

converters
10mH
IC = 0
10Vdc
V1
VMSSCCM
U7
VC
L1
Rs
2
D = 0.5
IC = -1.84
RMPHITE = 10
RD = 1e-6
RM = 1e-6
RE = 10m
0
1Vac
0Vdc
V4 RSW = 10m
VAP = -17.6
out
Cout
100uF
IC = 0
Resr
10m
R
20
Rs1
300k
sense
Rs2
100k
Small-signal AC analysis
Power switchin
49

converters
3.0A
2.0A
1.0A
0A
20V
I(L1)
10V
SEL>>
0V
0s
V(OUT)
Power switchin
5ms
10ms
15ms
20ms
25ms
30ms
Time
50

converters
Open-loop transfer function
40
-40
SEL>>
-80
-0d
DB(V(OUT))
-100d
-200d
-300d
1.0Hz
P(V(OUT))
Power switchin
10Hz
100Hz
1.0KHz
10KHz
100KHz
1.0MHz
Frequency
51
L1
10mH
IC = 0
1 A
Rs
3
VC C

converters
1Vac
10Vdc
V4
U7
VMSSCCM
P 2
D = 0.5
IC = -1.84
RMPHITE = 10
RD = 1e-6
RM = 1e-6
RE = 10m
RSW = 10m
VAP = -17.6
out
Cout
100uF
IC = 0
Resr
10m
R
20
R s1
300k
sense
R s2
100k
Input impedance
Power switchin
52

converters
100
80
60
40
20
0
1.0Hz
10Hz
DB(V(V4:+)/I(V4))
100Hz
1.0KHz
10KHz
100KHz
1.0MHz
Frequency
Input
impedance
Power switchin
53

converters
10mH
IC = 0
10Vdc
V5
U7
VMSSCCM
C 3
VC
L1
Rs
out
2
D = 0.5
IC = -1.84
RMPHITE = 10
RD = 1e-6
RM = 1e-6
RE = 10m
RSW = 10m
VAP = -17.6
Cout
100uF
IC = 0
Resr
10m
R
20
Rs1
300k
sense
1Vac
10Vdc
V4
Rs2
100k
Output impedance
Power switchin
54

converters
40
20
-20
-40
1.0Hz
10Hz
DB(V(V4:+)/I(V4))
100Hz
1.0KHz
10KHz
100KHz
1.0MHz
Frequency
Output impedance
Power switchin
55

converters
10mH
IC = 0
U7
VMSSCCM
VC
L1
10Vdc
V1
V1 = 1.2
V2 = 1.5
TD = 20m
TR = 1n
TF = 1n
PW = 50m
PER = 50m
out
D = 0.5
IC = -1.84
RMPHITE = 10
Rs
RD = 1e-6
RM = 1e-6
RE = 10m
V4
RSW = 10m
VAP = -17.6
Rs1
Cout
100uF
IC = 0
Resr
10m
300k
sense
20
Rs2
100k
Small-signal transient analysis
Power switchin
56

converters
25V
20V
10V
SEL>>
0V
3.0A
V(OUT)
2.0A
1.0A
0A
0s
5ms
I(L1)
10ms
15ms
20ms
25ms
30ms
Time
Small-signal transient analysis
Power switchin
57
Averaged-inductor model for a

voltage-mode boost converter
U7 BOOSTVM
R3
1
0.5
V1
out
OUT
IN
DON GND
Rs = 1
FS = 1k
L = 10m
R1
10m
R2
20
10
C1
100u
IC = 0
Power switchin
58
Output voltage obtained with the

averaged-inductor model
30V
25V
20V
15V
10V
5V
0V
0s
V(OUT)
Power switchin
5ms
10ms
15ms
20ms
25ms
30ms
Time
59
Measuring the loop gain
Power switchin
60
Measuring the loop gain

20
(100.000,-1.2488)
-40
-80
90
DB(V(VF))
0
(100.000,-163.029)
-90
-180
-270
SEL>>
-360
1.0mHz
10mHz
P(V(VF))
100mHz
Power switchin
1.0Hz
10Hz
100Hz
1.0KHz
10KHz
100KHz
1.0MHz 10MHz
Frequency
61
Frequency compensation
choose f1 = 100 Hz for a switching frequency of 1 kHz
PID compensation
f1
f1
1
2
tan

f
z
f p
comp ( f1 ) 90 2 tan 1
M comp ( f1 ) 20 Log10 (2 f1 ) 40 Log10
f1z 1 tan
fz
f1
1
comp 90 2 tan
f p

M comp ( f1 ) 20 Log10 (2 f1 ) 40 Log10
Power switchin
f1
1 40 Log10
f z
1 f1z
40 Log
10
f
1 1
f
p
f
1 1
f p

62
PID compensation
f p1 =
2 R 3C 3
( C1+ C 2 )
=
f p2
2 R 2C 1C 2
1
=
f z1
2 R 2C 1
1
=
f z2
2 ( R 1 + R 3 )C 3
Power switchin
R2
=
K1
R1
R 2( R 1 + R 3 )
=
K2
R1R 3
C 1C 2
R3
.
C3=
C1+ C2
R2
Mag_comp_f1 = -7.0985
Ph_comp = 32
k1_db = -24.6094
k1 = 0.0588
k2_db = -5.0259
k2 = 0.5607
R2 = 588.2076
R3 = 269.7258
C1 = 5.0034e-005
C2 = 1.3496e-006
C3 = 2.8658e-006
63
Boost switching converter with

PID compensator
V1
10Vdc
D1
pwm
10mH
IC = 4
R6
V MUR420
X2
100
MTP15N05E/MC
out
Cout
100uF
IC = 20
ESR
10m
R
20
Rs3
1k
V+
+15
0
V-
R8
B/S
+
300
LM311
pwm_out
G
0
-15
-15
PWM
V3 modulator
+15
`15
V2
-15
Rs2
3k
C2
control
saw
V1 = 0
V2 = 10
V4
TD = 0
TR = 999u
TF = 1n
0
PW = 1n
PER = 1m
R2
R4
10meg
173.0498 2.5483e-006
R3 C3
1.1461e-006
C1
518.3291 5.0014e-005
-15
Power switchin
sense
V-
L1
+15
R1
10k
TL084
+
V+
Rs
5
Vref
Error amplifier
64
Simulation results with a PID

compensator
5.0A
4.5A
4.0A
I(L1)
10.0V
7.5V
SEL>>
5.0V
V(control)
40V
20V
0V
0s
V(out)
5ms
10ms
15ms
20ms
25ms
30ms
Time
Power switchin
65
PI compensation
L1
3
1
0
10Vdc
10mH
IC = 0
VC
U7
VMSSCCM
P
out
D = 0.5
IC = -1.84
RMPHITE = 10
Rs
Vg
Cout
200uF
IC = 0
RD = 1e-6
RM = 1e-6
RE = 10m
20
Resr
RSW = 10m
VAP = -17.6
1Vac
0Vdc
10m
GAIN = 0.25
E1
++
- E
V1
Vf
0
10k
R1
TF
s C1 R1 1
s C1R2
C1
10
-10
Vf
500n
1k
EAO
R2
10
error
10 + s
100k
Small-signal model of the boost converter with PI

compensation
Power switchin
66
PI compensation
100
Compensated loop gain
Uncompensated loop gain
0
-100
SEL>>
-200
DB(V(VF))
DB(V(EAO))
180
Compensated loop gain
90
Uncompensated loop gain
0
-90
-180
-270
-360
1.0mHz
10mHz
P(V(VF))
Power switchin
100mHz
P(V(EAO))
1.0Hz
10Hz
100Hz
1.0KHz
10KHz
100KHz 1.0MHz
Frequency
67
PI compensation using ABM

blocks
C2
R3 1n
Rs
0.1
10Vdc
V1
L1
2 pwm
D1
100k
10mH
Dbreak
IC = 1.8
S1
gate
++
- S
0 VOFF = 0.0V
VON = 1.0V
if( V(%IN1) < V(%IN2),1,0)
control
2
3
1 saw
V1 = 0
V2 = 10
TD = 0
TR = 99.9u
TF = 0.05u
PW = 0.05u
PER = 100u
Power switchin
out
Cout
R
100u
IC = 20 20
Resr
10m
0
C1
R1
1k
R2
10k
500n
10
V2
0.25
-10
1
1+s
100k
ref
68
Simulation results of the PI

compensation using ABM blocks
4.0A
2.0A
0A
I(L1)
30V
20V
10V
SEL>>
0V
10V
V(OUT)
5V
0V
0s
V(CONTROL)
5ms
10ms
15ms
20ms
25ms
30ms
Time
Power switchin
69
PI compensation using vendor

models
Rs
0.1
L1
2 pwm
10mH
R3
X1
1
IC = 1.8
gate
10
+15
R5
3k
20
R6
R4 B/S
300
-15
+15
-15
V3
0
-15Vdc
control
V4
R2
C1
-15
saw
V1 = 0
V2 = 10
TD = 0
TR = 99.9u
TF = 0.05u
PW = 0.05u
PER = 100u
10k
500n
V-
R1
1k
LM311
G
TL084
V2
V+
+15Vdc
MTP15N05E/MC
Cout
100u
IC = 20
Resr
10m
1k
V+
MUR420
out
V1
V-
10Vdc
D2
ref
+15
0
Power switchin
70
Simulation results of the PI

compensation using vendor
models
4.0A
2.0A
0A
40V
I(L1)
20V
0V
10V
V(OUT)
5V
SEL>>
0V
0s
2ms
V(CONTROL)
Power switchin
4ms
6ms
8ms
10ms
12ms
14ms
16ms
18ms
20ms
Time
71
PI compensation using vendor

models
*Analysis directives:
.TRAN 0 30m 0 10n SKIPBP
.OPTIONS STEPGMIN
.OPTIONS PREORDER
.OPTIONS ABSTOL= 10.0p
.OPTIONS CHGTOL= 0.1p
.OPTIONS ITL2= 200
.OPTIONS ITL4= 400
.OPTIONS RELTOL= 0.01
.OPTIONS VNTOL= 10.0u
I/O ERROR -- Probe file size exceeds 2000000000
JOB ABORTED
TOTAL JOB TIME
912.11
Power switchin
72
Creating capture symbols for PSpice

simulation
Vendors often provide PSpice models for their circuit
components. They are normally provided in a text file with
extension .LIB; if the file has a different extension, it should be
changed to .LIB
Start the PSpice Model Editor and from the File menu, choose
Create Parts
Browse to find the input model library (.LIB file) and click
OK to start
This step creates an .OBL file with a schematic symbol linked
to your model
To place the new part into the schematic, open Capture, and
from the Place menu choose Part. Click Add library, then find
and add the new .OLB file
Power switchin
73
Solving convergence problems
PSpice uses the Newton-Raphson algorithm to solve

the nonlinear equations in these analyses
The algorithm is guaranteed to converge only if the

analysis is started close to the solution
If the initial guess is far away from the solution, this

may cause a convergence failure or even a false
convergence
If the node voltages do not settle down within a certain

number of iterations, an error message will be issued
Power switchin
74
DC analysis error messages
The DC Analysis calculates the small-signal bias

points before starting the AC analysis or the initial
transient solution for the transient analysis
Solutions to the DC analysis may fail to converge

because of incorrect initial voltage guesses, model
discontinuities, unstable or bistable operation, or
unrealistic circuit impedances
When an error is found during the DC analysis, SPICE

will then terminate the run because both the AC and
transient analyses require an initial stable operating
point in order to start
Power switchin
75
DC analysis error messages
No convergence in DC analysis
PIVTOL Error
Singular Matrix
Gmin/Source Stepping Failed
No Convergence in DC analysis at Step = xxx
Power switchin
76
Transient analysis error messages
If the node voltages do not settle down, the time step is

reduced and SPICE tries again to determine the node
voltages
If the time step is reduced beyond a certain fraction of

the total analysis time, the transient analysis will issue
an error message Time step too small and the
analysis will be halted
Transient analysis failures are usually due to model

discontinuities or unrealistic circuit, source, or parasitic
modeling
Power switchin
77
Solutions to convergence
problems
There are two ways to solve convergence problems

the first only tries to fix the symptoms by adjusting the
simulator options
while the other attacks the root cause of the convergence
problems
Once the circuit is properly modeled, many of the

modifications of the "options" parameters will no longer be
required
It should be noted that solutions involving simulation

options may simply mask the underlying circuit instabilities
Power switchin
78
Bias point (DC) convergence

Checking
circuit topology and connectivity
Modeling
of circuit components
PSpice
options are checked to ensure that

they are properly defined
Power switchin
79
Checking circuit topology and

connectivity
Make sure that all of the circuit connections are valid
Check for incorrect node numbering or dangling nodes
Verify component polarity
Check for syntax mistakes
Make sure that the correct PSpice units (i.e. MEG for
1E6, not M, which means mili in simulations) are used
Power switchin
80
Make sure that there is a DC path from every

node to ground
Make sure that there are at least two connections

at every node
Make sure that capacitors and/or current sources

are not connected in series
Make sure that no (groups of) nodes are isolated

from ground by current sources and/or capacitors
Make sure that there are no loops of inductors

and/or voltage sources only
Power switchin
81
Place the ground (node 0) somewhere in the

circuit
Be careful when floating grounds (e.g., chassis
ground) are used; a large resistor should be
connected from the floating node to ground. All
nodes will be reported as floating if "0 ground" is
not used
Make sure that voltage/current generators use
realistic values, and verify that the syntax is
correct
Make sure that dependent source gains are
correct, and that E/G element expressions are
reasonable
Power switchin
82
Verify that division by zero or LOG(0) cannot

occur
Voltages and currents in PSpice are limited to the

range +/- 1e10
Avoid using digital components, unless really

necessary
Initialize the digital nodes with valid digital values
Avoid situations where an ideal current source

delivers current into a reverse-biased p-n junction
without a shunt resistance
Power switchin
83
Setting up the options for the

analog simulation
Increase ITL1 to 400

Use NODESETs to set node voltages to the nearest
reasonable guess at their DC values
Enable the GMIN stepping algorithm
Set PREORDER in Simulation Profiles options
Setting the value of ABSTOL to 1
PSpice does not always converge when relaxed tolerances
are used
Setting GMIN to a value between 1n and 10n will often
solve convergence problems
Setting GMIN to a value, which is greater than 10n, may
cause convergence problems
Power switchin
84
Transient convergence
The
transient analysis can fail to complete if

the time step becomes too small
This
can be due to either
(a) the Newton-Raphson iterations would not

converge even for the smallest time step size
(b) something in the circuit is moving faster than
can be accommodated by the minimum step size
Power switchin
85
Transient convergence
The
circuit topology and connectivity should

first be checked
Followed
Power switchin
by the PSpice options
86
Circuit topology and

connectivity
Avoid using digital components, unless really

necessary
Initialize the nodes with valid digital value to ensure

there are no ambiguous states
Use RC snubbers around diodes
Add Capacitance for all semiconductor junctions
Power switchin
87

connectivity
Add
It
realistic circuit and element parasitics
is important that switching times be nonzero
It
is recommended that all inductors have a

parallel resistor
Look
for waveforms that transition vertically (up

or down) at the point during which the analysis
halts
Power switchin
88

connectivity
Increase
the rise/fall times of the PULSE
sources
Ensure that there is no unreasonably large
capacitor or inductor
Power switchin
89
PSpice options
Set RELTOL=.01
Reduce the accuracy of ABSTOL/VNTOL if

current/voltage levels allow it
ABSTOL and VNTOL should be set to about 8

orders of magnitude below the level of the maximum
voltage and current
Increase ITL4, but no more than 100
Power switchin
90
PSpice options
Skipping
the bias point is not recommended
Any
applicable .IC and IC= initial conditions

statements should be added to assist in the
initial stages of the transient analysis
Power switchin
91
Switching converter simulation using

Matlab
Working with transfer functions
Consider a buck converter designed to operate in the continuous conduction
mode having the following parameters: R = 4, L = 1.330 mH, C = 94 f, Vs =
42 V, Va = 12 V
s
s
1
sz1
s z 2
v$o ( s )
Kd
$
s
s2
d (s)
1
0 Q 0 2
Kd
s z1
Vs
(1 D) 2
1
RESR C
Rind re D (1 D )
RESR R
re RESR || R
Q
R
(1 D) 2
sz 2
( R RESR || R ) ind
L
L
Power switchin
1
LC
0
Rind re (1 D )
1
L
C ( RESR R)
92

Matlab
% this is a comment
% parameters
R= 4;
L = 1.330 e-3;
Rind = 100 e-3;
C = 94 e-6;
Resr = 10 e-3
Vs = 42;
Va = 12;
D=Va/Vs;
Kd= Vs/(1-D)^2;
Sz1=1/(Resr*C);
Req = R-(Resr*R/(Resr+R));
Sz2 = (1/L)*(1-D)^2* Req Rind/L;
Re=(Resr*R)/( Resr+R);
Wo = (1/sqrt(L*C)) * sqrt((Rind+re*D*(1-D))/(Resr+R));
Q = Wo/(((Rind+re*(1-D))/L)+(1/(C*(Resr+R))));
Power switchin
93

Matlab
% polynomials are entered in descending order of S.
n1=[1/Sz1 1]
n2=[-1/Sz2 1]
NUM=conv(n1,n2)
% the convolution realizes the product of 2 polynomials
% define denumerator
DEN = [1/(Wo^2) 1/(Wo*Q) 1]
% create TF variable
sysTF = Kd * tf(NUM,DEN)
which returns
Transfer function:
sysTF
-5.317e-008 s^2 - 0.05648 s + 82.32

4.913e-006 s^2 + 0.01343 s + 1
Power switchin
94

Matlab
Bode Diagram
20
0
-20
-40
0
-45
Phase (deg)
The location of the poles can be

found using
poles = roots(DEN)
and the frequency response can be
plotted using
bode(sysTF)
Magnitude (dB)
40
-90
-135
-180
-225
-270
1
10
10
10
10
10
10
10
Frequency (rad/sec)
Power switchin
95

Matlab
The small signal transient step response can be plotted using
Figure
% this command opens a new figure window
Step Response
step(sysTF)
90
80
70
60
Amplitude
50
40
30
20
10
0
-10
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
Time (sec)
Power switchin
96

Matlab
Working with matrices
Consider a buck converter designed to operate in the continuous conduction mode
having the following parameters: R = 4, L = 1.330 mH, C = 94 f, Vs = 42 V, Va
= 12 V.
% state-space averaged model of a Buck converter
Rload= 4;% load resistance
L= 1.330e-3;
% inductance
cap=94.e-6;
% capacitance
Ts=1.e-4; % switching period
Vs=42; % input DC voltage
Vref=12; % desired output voltage
The average duty cycle is:
D=Vref/(Vs); % ideal duty cycle
Power switchin
97

Matlab
0
A=[
B1=[
0
1/cap
1/L
0];
1
L
1
RC
D ^ Vs ^
x
1
L u L d

^
x
0
2

0
-1/L
-1/(Rload*cap)]
%during Ton
B2=[
0
0];
%during Toff
B=B1*D+B2*(1-D)
C=[0 1];
Power switchin
98

Matlab
Step Response
From: U (1)
0.35
OLpoles = eig(A)
0.3
sysOL=ss(A,B,C,0)
step(sysOL)
To: Y (1)
Amplitude
0.25
0.2
0.15
0.1
0.05
0.5
1.5
2
Time (sec.)
Power switchin
2.5
3.5
4.5
x 10 -3
99

Matlab
gamma=[
0];
Vs/L
closed-loop poles:
P=1e3*[-0.3298 + 0.10i -0.3298 - 0.10i]';
Bf= gamma*(D/Vref);
F=place(A,Bf ,P)
Power switchin
100

Simulink
sysTF
90
-5.317e-8 s^2 - 0.05648 s + 82.32

4.913e-6 s^2 + 0.01343 s + 1
80
70
60
[NUM,DEN] = TFDATA(sysTF,v)
Output
50
40
30
-5.317e-8s 2 -0.0565s+82.32
20
4.913e-6s +0.0134s+1.0
Step
Scope
Transfer Fcn
10
0
output
time
Clock
-10
To Workspace
0.005
0.01
To Workspace1
Power switchin
0.015
0.02
0.025
0.03
0.035
0.04
0.045
Time (s)
101
0.05

Simulink
sysZPK = zpk(sysTF)
sysZPK
-0.010821 (s+1.064e006) (s-1455)

(s+2657) (s+76.6)
zeroes: [-1.0638e+006 +1455]

poles: [-2657 -76.6]
gain: [-0.010821]
Power switchin
102

Simulink
0
752
A
10638 2660
B 214.82 0 '
x' = Ax+Bu
y = Cx+Du
Step
Scope
State-Space
C 0 1 '
D0
Power switchin
output
time
Clock
To Workspace
To Workspace1
103

Simulation of Switching Converters

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Simulation of Switching Converters

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