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Part 1 Lesson 2
Design With Inputs
PowerPoint Slides
by Dr. Chow Li Sze
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Aims
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D Flip-Flop
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T Flip Flop
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A B C D E
F
A B C D E
F
6
steps
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A B E
F
A B E
F
4
steps
5
x
=
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Question:
If a state does not have any arrows leading to it, what is that
mean?
Answer:
That state represents an initial condition.
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Notes: The State Table from Slide 8-13 doesnt match the corrected State
diagram in Slide 6 as in the UOS lecture notes. But they were used for
demonstration of the method.
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Step 4: Flip-flops
Step 5: State Assignment
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A = 000
B = 001
C = 010
D = 011
E = 100
F = 101
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Change Table
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J c = Kc = 1
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Practice
Try it yourself for the Step 8: Circuit Diagram
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Problem Statement:
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State Diagram
Start at some known situation: the
input is 0 and so is the output
(State A).
If the input stays at 0, then there is
no reason not to stay at state A.
But if the input changes to 1, then
we want to remember this, so we go
to state B, and the output is still 0.
If we now get a second 1, then we go to state C.
C effectively is a memory that we have detected 0 1 1.
If we now get a 0 input, this is the sequence we want so we go to
state D which has an output 1.
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State Diagram
We now have to decide what happens
if the inputs dont follow the pattern we
want to detect.
In state B if we get a logic 0, we should
go back to A.
In state C if we get a logic 1, we have
to go to a new state E, because we
have now detected 3 logic 1s. We
then stay there until a logic 0 is
detected, when we go back to A, which
can be the start of a new sequence.
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State Assignment
Finally, when we are in state D, a logic
0 should take us back to A, but a logic
1 will take us to state B (because B is
remembering 01).
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Practice
Try it yourself to develop the:
State Table
Excitation Table
K-maps
Answer:
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State Diagram
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State Table
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State Assignment
State 100 is not used, because we want to match the above pattern.
D type Flip-flops were chosen because that will make the Excitation
Table simpler (although the resulting logic is likely to be more
complex overall).
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Excitation Table
A
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B
A
E
A
C
A
E
A
D
A
E
A
D
A
E
A
B
A
F
A
B
A
G
A
B
A
G
A
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K-maps
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K-maps
Note that the dont care entries have been chosen to generate
symmetrical functions.
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K-maps
symmetrical functions
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K-maps
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Circuit
Diagram
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Unwanted State
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Summary
In this lesson, we have learned:
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Tutorial
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Tutorial Q.3
Design a circuit which will produce the following repeated three
output pattern under the control of two inputs X and Y as defined
below:
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Answer Q.3
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Tutorial Q.4
Design a circuit which will detect the pattern .1011 in a serial
input. The final logic 1 in a detected pattern may form the first 1 in
the next pattern. When a pattern is detected the output must stay at
logic 1 for 2 clock periods.
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Answer Q.4
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Tutorial Q.5
Design a circuit which will give an output if a 3 bit serial word
contains an odd number of logic 1s. The output is only 1 at the
end of the word. Assume that the words have been synchronised
externally, so that we start with the first bit of the word and not
halfway though a word.
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Answer Q.5
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