Professional Documents
Culture Documents
Safety and
Availability
Revised on June 17,
2008
Global Marketing Group
Industrial Safety Systems
Dept.
Copyright Yokogawa Electric Corporation
E-2008-0501 Safety and Availability
2008/05
Safety
can
Page 2
Page 3
Output
Circuit, MPU
MPU, memory
Circuit, MPU
Circuit, MPU
MPU, memory
Circuit, MPU
Page 4
Redundant Input
module
Input
Output
Circuit, MPU
MPU, memory
Circuit, MPU
Circuit, MPU
MPU, memory
Circuit, MPU
Input
CPU
Output
Circuit, MPU
MPU, memory
Circuit, MPU
Circuit, MPU
MPU, memory
Circuit, MPU
Page 5
Behaviors of VMR
Pair & Spare
I
O
CPU
With Two
Failures
S
FE
Still;
O
I
-No Shut Down
-SIL 3
With Three
Failures
Still;
-No Shut
S: Sensor
Down
FE: Final Element
-SIL 3
Time to
Internal failure in SIS does not
affect the-Unlimited
process.
CPU
Repair
Page 6
Flexible Redundancy
I O
All Solutions
are SIL3!
Single inputs
Dual redundant outputs
CPU
CPU
I O
CPU
CPU
I O O
CPU
CPU
I O O
CPU
CPU
Single inputs
Single outputs
Page 7
Summary
SIS
Maximizing both Safety and High Availability
in a smart, simple architecture
Page 8
Page 9