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ELECTRONICS
CIRCUITS 1
EKT 204
Introduction to FET Amplifier:
FET (Review)
1
FIELD EFFECT
TRASISTOR (FET)
ADVANTAGES OF FET
TYPES OF FET & ITS
OPERATION
2
Voltage-controlled amplifier: input impedance
very high
Low noise output: useful as preamplifiers
when noise must be very low because of high
gain in following stages
Better linearity: distortion minimized
Low inter-electrode capacitance: at high
frequency, inter-electrode capacitance can
make amplifier work poorly. FET desirable in
RF stages (high frequency)
FET Advantages
3
Types of FET
FET
JFET MOSFET MESFET
n channel Enhancement mode
p channel n channel
p channel
Depletion mode
n channel
p channel 4
Junction FET (JFET)
n-channel
p-channel
G
n
p p
S
D
G
p
n n
S
D
D
S
G
D
S
G
Structure
Symbol
ohmic
contact
5
Metal-Oxide-
Semiconductor MOS
(MOSFET)
D
E
P
L
E
T
I
O
N
E
N
H
A
N
C
E
M
E
N
T
n-channel p-channel
p
p
p
p
n
n
dielectric
metal
6
JFET Operation
n
n
p p
n
n
p p
V
GG
V
DD
V
DD
|
depletion region
Gate-source is reversed-biased
~ zero current at gate
I
DS
flow through the channel and the value is determined by the width
of depletion region and the width of the channel 7
MOSFET Operation
p-type
n+ n+
p-type
n+ n+ - - - - - - -
G
G
D
D
S
S
SS
SS
No voltage applied to gate
Current is zero
+ve voltage applied to gate
Electron inversion layer is created
Current is generated between
source and drain
electron
inversion layer
8
FET BIASING
JFET BIAS CIRCUITS
Self-bias
Voltage-divider bias
MOSFET BIAS CIRCUITS
Voltage-divider bias
Drain-feedback bias
9
Equivalence biasing of
JFET & BJT
A I
I I
V
V
I I
G
S D
P
GS
DSS D
0
1
2
~
=
|
|
.
|
\
|
=
V V
I I
I I
BE
E C
B C
7 . 0 ~
~
= |
<==>
<==>
<==>
JFET BJT
10
JFET Bias Circuits
- Self-Bias
+V
DD
R
D
R
S
R
G
S D S G GS
R I V V V = =
( )
S D D DD DS
R R I V V + =
I
G
= 0
11
JFET Bias Circuits
- Voltage-divider Bias
+V
DD
R
D
R
S
R
1
R
2
DD G
V
R R
R
V
|
|
.
|
\
|
+
=
2 1
2
S
GS G
D
R
V V
I
=
V
G
I
D
12
MOSFET Bias Circuits
- Voltage-divider Bias
+V
DD
R
1
R
D
R
2
( )
2
TN GS D
D D DD DS
V V K I where
R I V V
=
=
DD GS
V
R R
R
V
|
|
.
|
\
|
+
=
2 1
2
13
MOSFET Bias Circuits
- Drain-Feedback Bias
+V
DD
R
D
R
G
D D DD DS GS
R I V V V = =
I
G
= 0
14
LOAD LINE
SELF-BIASED JFET
VOLTAGE-DIVIDER BIAS
JFET
15
LOAD LINE
- SELF-BIASED JFET
+V
DD
9V
R
D
2.2KO
R
S
680O
R
G
10MO
Example
Determine the Q-point for
the JFET circuit. The transfer
characteristic curve is given
in the figure.
16
I
D
(mA)
-V
GS
(V)
4 I
DSS
-6
V
GS(off)
2.25
-1.5
-2.72
Q
For I
D
=0,
V
GS
=-I
D
R
S
=(0)(680)=0V
From the curve,
I
DSS
=4mA; so I
D
=I
DSS
=4mA
V
GS
=-I
D
R
S
=-(4m)(680)=-2.72V
I
D
=2.25mA
V
GS
=-1.5V
Q point is the
intersection between
the transfer
characteristic
curve and the
load line
17
LOAD LINE
- VOLTAGE-DIVIDER BIAS JFET
+V
DD
8V
R
D
680O
R
1
2.2MO
R
2
2.2MO
R
S
3.3KO
Example
Determine the Q-point for
the JFET circuit. The
transfer characteristic
curve is given in the figure.
18
I
D
(mA)
-V
GS
(V)
12 I
DSS
-3
V
GS(off)
1.8
1.2
-1.8
Q
4
V
GS
(V)
For I
D
=0,
V V
R R
R
V V
DD G GS
4 8
4 . 4
2 . 2
2 1
2
=
|
.
|
\
|
=
|
|
.
|
\
|
+
= =
mA
K R
V
R
V V
I
S
G
S
GS G
D
2 . 1
3 . 3
4
= = =
=
For V
GS
=0,
I
D
=1.8mA
V
GS
=-1.8V
Q point is the
intersection between
the transfer
characteristic
curve and the
load line
19
EXERCISES (Load Line JFET)
+V
DD
6V
R
D
820O
R
S
330O
R
G
10MO
1. Determine the Q-point for the JFET
circuit. The transfer characteristic curve
is given in the figure.
I
D
(mA)
-V
GS
(V)
I
DSS
= 5mA
V
GS(off)
=-3.5
20
2. Determine the Q-point for the JFET
circuit. The transfer characteristic curve
is given in the figure.
+V
DD
12V
R
D
1.8KO
R
1
3.3MO
R
2
2.2MO
R
S
3.3KO
I
D
(mA)
-V
GS
(V)
I
DSS
= 5mA
V
GS(off)
=-4V
EXERCISES (Cont.)
21
FET
CHARACTERISTICS
JFET
MOSFE
T
22
JFET CHARACTERISTICS
DRAIN CHARACTERISTIC
ohmic region
Saturation region
breakdown region
V
DS
I
D
V
P
I
DSS
V
GS
V
GS
=0
V
P
=|V
GS (off)
|
23
TRANSFER CHARACTERISTIC
N-CHANNEL
I
D
V
P
I
DSS
-V
GS
( )
2
1
P
GS
V
V
DSS D
I I =
JFET CHARACTERISTICS
24
JFET DATA SHEET
For MMBF5459 V
GS (off)
= -8.0V (max)
I
DSS
= 9.0 mA (typ.)
25
MOSFET
CHARACTERISTICS
TRANSFER CHARACTERISTIC
(Depletion MOSFET)
I
D
V
GS(off)
=V
P
I
DSS
-V
GS
N-CHANNEL
( )
2
1
P
GS
V
V
DSS D
I I =
26
TRANSFER CHARACTERISTIC
(Enhancement MOSFET)
I
D
V
TN
+V
GS
N-CHANNEL
( )
2
TN GS D
V V K I =
K in formula can be calculated by
substituting data sheet values
I
D(on)
for I
D
and V
GS
at which I
D(on)
is specified for V
GS
MOSFET
CHARACTERISTICS
27
E-MOSFET DATA SHEET
( ) ( )
2
2 2
) (
/ 48 . 5
8 . 0 5 . 4
75
V mA
mA
V V
I
K
TN GS
on D
=
=
I
D(on)
= 75 mA (minimum) at
V
TN
= 0.8 V and V
GS
= 4.5V
28