Physics of power dissipation in

MOSFET devices


Power dissipation in MOSFET depends on

MIS (Metal-Insulator-Semiconductor) structure

Surface space charge region and the threshold voltage

Depth of depletion region

Inversion layer charge & thickness













The MIS structure


Insulating layer of thickness d is sandwiched b/w a metal plate &
semiconductor substrate
Let the semiconductor be of p type, voltage V is applied b/w metal
plate & substrate
When V=0 for ideal MIS diode, the energy difference =0
= - { } =0
In this case the insulator has infinite resistance & doesnt have
mobile charge carriers


Contd








The fermi level in the metal lines up with the fermi level in the
semi conductor.This is called as flat-band condition

Contd
Case II:V is negative
When V is ve,the holes are attracted to and accumulate with
semiconductor surface in contact with the insulator layer.This
is called accumulation.
In the absence of current flow, the carriers are in equilibrium
Fermi level appears as a straight line
Further increasing the voltage V, the energy bands are bend
towards upward near the surface
The fermi level in semi conductor is now below than the fermi
level in metal.



Contd
Case II:V is positive
When V is +ve, the holes are repelled away from the surface
and leave -vely charged acceptor ions
Depletion layer is created from the surface into the semi
conductor. This is called as depletion condition.
if we increase the voltage V, the bands are bend far enough at
the surface




Contd
When V is small ,concentration of holes>>electron
concentration. At this time orginal p type is inverted to n type.
This is called as weak-inversion
When V is increased to the extent, electron density>>hole
density .At this time strong inversion occurs.
The value of V necessary to reach the on set of strong
inversion is called thershold voltage.
Threshold Voltage Components
Set V
S
=0, V
DS
=0, and V
SB
=0.
Increase V
GS
until the channel is inverted. Then a
conducting channel is formed and the depletion region
thickness (depth) is maximum as is the surface potential.
The value of V
GS
needed to cause surface inversion
(channel creation) is the threshold voltage V
T0
. The 0
refers to V
SB
=0.
V
GS
<V
T0
: no channel implies no current flow possible.
With V
GS
>V
T0
, existence the channel implies possible
current flow.

Depth of the depletion layer
If the applied gate voltage is greater than V
FB
, then the
semiconductor surface will be depleted of holes.
If the applied gate voltage is less than V
TH
, the
concentration of conduction electrons at the surface is
smaller than N
A
r(x) -qN
A
(x)




Width of the depletion layer=
N
q
A
F S
d
S i
x

2
Charge in inversion layer
The charge in the depletion region due to the
ionized atoms left behind when the holes are
repelled away by the +ve potential on the
metal
The inversion does not begin until sb
e
Q
s
s
A
i
N
q
s
) 2 (
2
2

LONG CHANNEL MOSFET

Body effect
Subthreshold current
Subthreshold swing

BODY EFFECT
In MOSFET the terminal voltages are
expressed with respect to the source terminal
and bulk, relative to the source, may be a non-
zero voltage.
V
GS
=V
GB
-V
BS
Bulk is at zero potential->s surface potential
or becomes s+V
BS



The threshold voltage becomes



The increase in the V
T
->Bulk bias voltage V
BS

is nonzero is termed as Body Effect.

SUB THRESHOLD CURRENT

Although no current should ideally conduct before
threshold, a small percentage of electrons with
energy greater than or equal to a few KT have
sufficient energy to surmount the potential barriers.
Sub threshold drain current flows between the
source and drain of a MOSFET when the transistor is
in the sub threshold region or weak inversion region.
As a result, there is a slight amount of current
conduction below V
T
sub threshold conduction - leads to parasitic leakage.




SUBTHRESHOLD SWING
Subthreshold swing is the function of channel
length and the interface state density.
Inverse of the slope of the log I
D,st
versus V
GS

characteristic is subthreshold swing.

SUBMICRON MOSFET
Due to Moores Law, we continually strive to
shrink transistor dimensions to achieve an
increase in speed, packing density, and power
dissipation
However, we cannot simply reduce the gate
length without reengineering the remainder
of the device structure
I
D st
depends on V
DS.
V
T
independent of L,Z and V
DS.

Effects Influencing Threshold voltage
Short channel length effect
Narrow gate width effect
Reverse short channel length effect


Short channel length effect
In short channel, a small decrease in Vt causes
leakage current to become excessive.
A higher doping concentration may be required to
compensate for the additional Vt decrease.
When the channel is long ,the drain-substrate and
source-substrate depletion regions account only for
only for a small section of the total distance b/w drain
and source regions.
The drain depletion region expands further into the
substrate ,making the turn-on voltage even smaller .





To consider the effect of Vds various
simplification have been proposed.
Charge sharing model considers the charge
in the channel to be shared among source ,
drain and gate.

Ideally the only electric field lines which should terminate on the inversion charge are from the
gate!
CHARGE SHARING
However, the positive charge in the source/drain have field lines which terminate on charge in
the periphery of the inversion channel!

The result is a shared charge which should not be included in the V
T
equation.
Therefore V
T
is undesirably reduced.
This implies that as we reduce the channel length, the depletion region from the drain
essentially merges with the depletion region from the source.

DRAIN INDUCED BARRIER
LOWERING(PUNCHTHROUGH)
A reduction in the potential barrier between S/D implies that a smaller drain and
gate voltage is required to achieve the same drain current!
In this case, the gate may not be able to control the current from source to drain!
There are two solutions to this problem:
Scale the source/drain thicknesses appropriately to ensure a shallow junction.
Increase the channel doping via a localized implant called a HALO IMPLANT near the
source/drain junctions
Narrow gate width effect:-
It produces an increase in threshold voltage
with decreasing gate width.
Effective depletion charge increased rather
than decreased.
Reverse short channel effect:-
Reduction in threshold voltage as gate length
increases with no uniformly doped channel
regions.

NARROW WIDTH EFFECT
NARROW WIDTH EFFECT
GATE INDUCED DRAIN LEAKAGE
Increase of sub-threshold currents for
negative gate bias
Narrow depletion regions
Tunneling

END OF SESSION