The World Leader in High Performance Signal Processing Solutions

Fundamentals of Laying
Out PC Boards
Jack Ardizzoni
Analog Devices
February 2012
2
Todays Agenda
PCB Layout Overview
Schematic
Critical Component Location and Signal Routing
Power Supply Bypassing
Parasitics, Vias and Placement
Ground Plane
Layout Review
Summary

3
Overview
What is high speed? For Op Amps we consider anything
>50MHz to be high speed.

PCB layout is one of the final steps in the design process and
often not given the attention it deserves. High Speed circuit
performance is heavily dependant on board layout.

Today we will address
Practical layout guidelines that:
Improve the layout process
Help ensure expected circuit performance
Reduce design time
Lower design cost


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Schematic
5
Schematic
A good layout starts with a good Schematic!
The schematic is the blueprint for the PCB
Schematic flow and content are essential
Include as much information as you can
Notes that include tolerance and case size
Critical component placement
Tuning or alignment procedures
Board stack up
Controlled impedance lines
Thermal issues
Component de-rating and reliability information
6
Schematic
40 MHz
AD590
ADP667
Linear Regulator
Temperature
Sensor
+12V
+5
V
VOUT
R3
562
C1
0.1uF
U1
ADA4860-
1
-
+
Linear Regulator
-12V
-5V
+
+ +
+
+5V
-5V
R6
301
R4
210
S1
C4
2.2uF
C5
0.01uF
R5
562
C2
SAT
C3
SAT
C6
0.01uF
C7
2.2uF
U2
U3
U4
U5
D1
1N4148
D2
1N4148
VIN
VOUT
C8
10uF
Case
size
1210
C9
0.01
uF
C11
0.1uF
C12
10uF
Case
size
1210
C13
10uf
Case
size
1210 C14
0.1uF
C15
0.1uF
C16
10uF
Case size
1210
+5V
40 MHz
OSC Out
2.0 All Resistors in ohms unless noted otherwise.
3.0 All capacitors in pF unless noted otherwise.
Must be right at
op amp supply
pins
Must be right at
op amp supply
pins
Put C4 and C7 on
back of board
right under the
power supply pin.
-5V
+5
V
+5V
R2
50
R7
50
6.0 U1 SOIC-14, U2 SOT-23-6, U3, SOIC-8, U4 SOIC-8
R8
1K
Run 40MHz traces on bottom
of the board ensure signal
trace is the same length
Place this cap right at pin 14 to digital ground
40 MHz
OSC Out
+5V
R1
1K
FREQUENCY ADJUST
1.0 C2=C3, use these 2 capacitors to adjust the -3dB BW
1K
Derating Table
R1
R2
R3
C1
C2
C3
U1
U2
VALUE
1
2
3
4
5
6
7
8
62mW 10mW
ITEM REF DES ACTUAL RATING
0.062"
Signal 1
Analog Ground 1
Digital Ground
Power plane
Analog Ground 2
Signal 2
BOARD STACK UP
1.0 All resistors and capacitors are 0603 case size unless noted otherwise.
4.0 Run analog traces on Signal 1 layer, run digital traces on Signal 2 layer
NOTES:
5.0 Remove ground plane on all layers under the mounting pins of U2
+
+
See critical component placement
drawing for location
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Critical Component Placement
and Signal Routing
8
Critical Component Placement and Signal
Routing
Just as in real estate location is everything!
Input/output and power connections on a board
are typically defined
Critical Component location and Signal routing
require deliberate thought and planning


Critical Component Placement and Signal
Routing
Ground
or power
plane
Critical Component Placement and Signal
Routing
RF
Power
Conditioning
Connector
Analog
ADC
Driver
ADC
Digital
Temp
Sensor
Critical Component Placement and Signal
Routing
RF
Connector
Analog
ADC
Driver
ADC
Digital
Power
Signal
Temp
Sensor
Poor Placement
Power
Conditioning
Critical Component Placement and Signal
Routing
RF
Connector
Analog
ADC
Driver
ADC
Digital
Power
Temp
Sensor
Improved Placement
Power
Conditioning
Signal
Digital
Circuitry
Analog
Circuitry
R
e
s
i s
t
o
r
Clock
Circuitry
Sensitive Analog
Circuitry Disrupted by
Digital Supply Noise
ANALOG
CIRCUITS
DIGITAL
CIRCUITS
V
D
V
A
+ +
I
D
I
A
I
D
I
A
+ I
D
V
IN
GND
REF
INCORRECT
Critical Component Placement and Signal
Routing
Wrong Way
Input Connector
Digital
Circuitry
Analog
Circuitry
R
e
s
i s
t
o
r
Clock
Circuitry
Sensitive Analog
Circuitry Disrupted by
Digital Supply Noise
ANALOG
CIRCUITS
DIGITAL
CIRCUITS
V
D
V
A
+ +
I
D
I
A
I
D
I
A
+ I
D
V
IN
GND
REF
INCORRECT
Critical Component Placement and Signal
Routing
Wrong Way
Digital
Circuitry
Analog
Circuitry
R
e
s
i s
t
o
r
Clock
Circuitry
Sensitive Analog
Circuitry Disrupted by
Digital Supply Noise
ANALOG
CIRCUITS
DIGITAL
CIRCUITS
V
D
V
A
+ +
I
D
I
A
I
D
I
A
+ I
D
V
IN
GND
REF
INCORRECT
Critical Component Placement and Signal
Routing
Wrong Way
Digital
Circuitry
Analog
Circuitry
R
e
s
i s
t
o
r
Clock
Circuitry
Sensitive Analog
Circuitry Disrupted by
Digital Supply Noise
ANALOG
CIRCUITS
DIGITAL
CIRCUITS
V
D
V
A
+ +
I
D
I
A
I
D
I
A
+ I
D
V
IN
GND
REF
INCORRECT
Critical Component Placement and Signal
Routing
Wrong Way
Voltage Drop Voltage Drop
Digital
Circuitry
Analog
Circuitry
R
e
s
i s
t
o
r
Clock
Circuitry
Sensitive Analog
Circuitry Safe from
Digital Supply Noise
ANALOG
CIRCUITS
DIGITAL
CIRCUITS
V
D
V
A
+ +
V
IN
I
D
I
A
I
D
I
A
GND
REF
CORRECT
Critical Component Placement and Signal
Routing
Right Way
The World Leader in High Performance Signal Processing Solutions
Signal Routing
Signal Routing
Op Amp Packaging and Pinout
Packaging plays a large role in high-speed applications
Smaller packages
Better at high speeds/high frequency
Compact layout
Less parasitics
Analog Devices Low Distortion (dedicated feedback) Pinout
Compact layout
Streamline signal flow
Lower distortion



Op Amp SOIC Packaging
Traditional SOIC-8 layout
Feedback routed around or underneath amplifier
Op Amp SOIC Packaging
Traditional SOIC-8 layout
Feedback routed around or underneath amplifier
Op Amp SOIC Packaging
Traditional SOIC-8 layout
Feedback routed around or underneath amplifier
Analog Devices Low Distortion
Dedicated Feedback Pinout
Pinout enables compact
layout
Lower distortion
Improved thermal
performance
LFCSP
AD8099, AD8045, AD8000,
ADA4899, ADA4857, ADA4817
Also used on Differential
Amplifiers




Disable
F
B
1

2

3

4
8

7

6

5


IN
V
S
+IN
+V
S

V
OUT
NC
+

-
Original Pin-Out
NC

Low distortion (dedicated feedback) pinout
enables compact and streamline layout
26
AD8099 Harmonic Distortion Vs. Frequency

CSP and SOIC Packages
Improvement
10dB at 1MHz
14dB at 10MHz
00:09:52
27
Signal Routing
Many different signals exist on boards
Analog, digital, low voltage, high voltage, and RF to name a few
Ground and power planes can help provide shielding
Microstrip, stripline
Isolation
Physical separation
Minimize long parallel runs
Minimize long trace on adjacent layers
Run traces orthogonal on adjacent layers
Guard rings
Differential signals
Crosstalk and Coupling
28
Capacitive Crosstalk or Coupling
This results from traces running on top of each other, which forms a
parasitic capacitor
Solutions run traces orthogonal, to minimize trace coupling and lower
area profile
Inductive Crosstalk
Inductive crosstalk exists due to the magnetic field interaction
between long traces parallel traces
There are two types of inductive crosstalk; forward and backward
Backward is the noise observed nearest the driver on the victim trace
Forward is the noise observed farthest from the driver on the driven
line
Minimize crosstalk by
Increasing trace separation (improving isolation)
Using guard traces
Using differential signals
The World Leader in High Performance Signal Processing Solutions
Power Supply Bypassing
Power Supply Bypassing
Bypassing is essential to
high speed circuit
performance




Power Supply Bypassing
Bypassing is essential to
high speed circuit
performance
Capacitors right at power
supply pins





Power Supply Bypassing
Bypassing is essential to
high speed circuit
performance
Capacitors right at power
supply pins
Capacitors provide low
impedance AC return
Provide local charge storage
for fast rising/falling edges




Power Supply Bypassing
Bypassing is essential to
high speed circuit
performance
Capacitors right at power
supply pins
Capacitors provide low
impedance AC return
Provide local charge storage
for fast rising/falling edges
Keep trace lengths short




EQUIVALENT DECOUPLED POWER
LINE CIRCUIT RESONATES AT:
f =
1
2t
LC
\
IC
+V
S
C1
L1
0.1F
1nH
f = 16MHz
Power Supply Bypassing
Bypassing is essential to
high speed circuit
performance
Capacitors right at power
supply pins
Capacitors provide low
impedance AC return
Provide local charge storage
for fast rising/falling edges
Keep trace lengths short




Power Supply Bypassing
Bypassing is essential to
high speed circuit
performance
Capacitors right at power
supply pins
Capacitors provide low
impedance AC return
Provide local charge storage
for fast rising/falling edges
Keep trace lengths short
Close to load return
Helps minimize transient
currents in the ground plane




Optimized Load and Bypass Capacitor
Placement and Ground Return
Tantalum
Tantalum
C
C
RL
A
D
8
0
X
X

R
T

RG
R
F

0 0
Power Supply Bypassing
Board Capacitance
37
4 layer stack up
Component/signal side
Ground plane
Power plane
Circuit side
d
K = relative dielectric constant
A = area in cm
2
d = spacing between plates in cm
A
kA
11.3d
C=
Power Supply Bypassing
Power Plane Capacitance
*Courtesy of Lee Ritchey
*
Power Supply Bypassing
Capacitor Model
ESR (Equivalent Series
Resistance)
Rs
Capacitance
XC = 1/2fC
ESL (Equivalent Series
Inductance)
XL=2fL

Effective Impedance


At Series resonance
XL=XC
Z = R

2
) (
2
XC XL Rs Z + =
*Courtesy of Lee Ritchey
*
Capacitor Choices
0603
0612
*Courtesy of Lee Ritchey
*
Power Supply Bypassing
Bypassing is essential to
high speed circuit
performance
Capacitors right at power
supply pins
Capacitors provide low
impedance AC return
Provide local charge storage
for fast rising/falling edges
Keep trace lengths short
Close to load return
Helps minimize transient
currents in the ground plane
Values
Individual circuit performance


Power Supply Bypassing
Bypassing is essential to high
speed circuit performance
Capacitors right at power
supply pins
Capacitors provide low
impedance AC return
Provide local charge storage for
fast rising/falling edges
Keep trace lengths short
Close to load return
Helps minimize transient currents
in the ground plane
Values
Individual circuit performance
Maintains low AC impedance
Multiple resonances



Multiple Parallel Capacitors
1 x 330F T520, 1 x 1.0F 0603, 2 x 0.1F 0603, and 6 x 0.01F 0603
*Courtesy of Lee Ritchey
*
2 x (1 x 330F T520, 1 x 1.0F 0603, 2 x 0.1F 0603, and 6 x 0.01F 0603)
1F
330F
0.1F
0.01F
The World Leader in High Performance Signal Processing Solutions
Parasitics
46
Parasitics
PCB parasitcs take the
form of hidden
capacitors, inductors
and resistors in the PCB
Parasitics degrade and
distort performance
47
Trace/Pad Capacitance
d
d
kA
C
3 . 11
=
A
K = relative dielectric constant
A = area in cm
2
d = spacing between plates in cm
48
Trace/Pad Capacitance
d
d
kA
C
3 . 11
=
A
K = relative dielectric constant
A = area in cm
2
d = spacing between plates in cm
Example: Pad of SOIC
L = 0.2cm W = 0.063cm
K= 4.7
A = 0.126cm
2

d = 0.073cm
C = 0.072pF
49
Trace/Pad Capacitance
d
d
kA
C
3 . 11
=
A
K = relative dielectric constant
A = area in cm
2
d = spacing between plates in cm
Reduce Capacitance
1) Increase board thickness
2) Reduce trace/pad area
3) Remove ground plane
Example: Pad of SOIC
L = 0.2cm W = 0.063cm
K= 4.7
A = 0.126cm
2

d = 0.073cm
C = 0.072pF
50
Approximate Trace Inductance
All dimensions are in mm
51
Approximate Trace Inductance
Example
L= 25.4mm
W = .25mm
H = .035mm (1oz copper)
Strip Inductance = 28.8nH
At 10MHz Z
L
= 1.86 O a 3.6% error
in a 50O system
All dimensions are in mm
52
Approximate Trace Inductance
Example
L= 2.54cm =25.4mm
W = .25mm
H = .035mm (1oz copper)
Strip Inductance = 28.8nH
At 10MHz Z
L
= 1.86 O a 3.6% error
in a 50O system
All dimensions are in mm
Minimize Inductance

1) Use Ground plane
2) Keep length short (halving
the length reduces
inductance by 44%)
3) Doubling width only
reduces inductance by
11%
53
Via Parasitics
(

+
|
.
|

\
|
= 1
4
ln 2
d
h
h L
L = inductance of the via, nH
H = length of via, cm
D = diameter of via, cm

H= 0.157 cm thick board,
D= 0.041 cm
Via Inductance
Via Capacitance
(

+
|
.
|

\
|
= 1
041 . 0
) 157 . 0 ( 4
ln ) 157 . 0 ( 2 L
L = 1.2nh
1 2
1
55 . 0
D D
TD
C
r

=
c
D
2
= diameter of clearance hole in the
ground plane, cm
D
1
= diameter of pad surrounding via, cm
T = thickness of printed circuit board, cm
= relative electric permeability of circuit
board material
C = parasitic via capacitance, pF

T = 0.157cm,
D
1
=0.071cm
D
2
= 0.127


C = 0.51pf
r
c
nH
Via Placement*


0603
and 0402
54
*Courtesy of Lee Ritchey
55
Capacitor Parasitic Model
C = Capacitor
R
P
= insulation resistance
R
S
= equivalent series resistance (ESR)
L = series inductance of the leads and plates
R
DA
= dielectric absorption
C
DA
= dielectric absorption

L
r
R
P
C
R
DA
C
DA
R
S
56
Resistor Parasitic Model
R = Resistor
C
P
= Parallel capacitance
L= equivalent series inductance (ESL)
C
P
R
L
57
Low Frequency Op Amp Schematic
58
High Speed Op Amp
Schematic
59
High Frequency Op Amp
Schematic
Stray Capacitance
Stray Capacitance Simulation Schematic
Frequency Response with 1.5pF Stray
Capacitance
1.5dB peaking
Stray Inductance
Stray Inductance
Parasitic Inductance Simulation Schematic
24.5mm x .25mm =29nH
Pulse Response With and Without Ground
Plane
0.6dB overshoot
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Ground and Power Planes
66
Ground and Power Planes Provide

A common reference point
Shielding
Lowers noise
Reduces parasitics
Heat sink
Power distribution
High value capacitance



67
Ground Plane Recommendations
There is no single grounding method which is guaranteed to
work 100% of the time!
At least one layer on each PC board MUST be dedicated to
ground plane!
Provide as much ground plane as possible especially under
traces that operate at high frequency
Use thickest metal as feasible (reduces resistance and
provides improved thermal transfer)
Use multiple vias to connect same ground planes together
Do initial layout with dedicated plane for analog and digital
ground planes, split only if required
Follow recommendations on mixed signal device data sheet.
Keep bypass capacitors and load returns close to reduce
distortion
Provide jumper options for joining analog and digital ground
planes together



68
Checking the layout
If possible have another set
of eyes (or more) take a look
at your layout.
69
Checking the layout
If possible have another set
of eyes (or more) take a look
at your layout.
Colored pencils
70
Checking the layout
If possible have another set
of eyes (or more) take a look
at your layout.
Colored pencils
Sit with the designer when
board corrections are made
The World Leader in High Performance Signal Processing Solutions
Summary
72
Summary
High speed PCB design requires deliberate thought and attention to
detail!
Load the schematic with as much information as possible
Where you put components on the board is just as important as to
where you put entire circuits
Take the lead when laying out your board, dont leave anything to
chance
Use multiple capacitors for power supply bypassing
Parasitics must be considered and dealt with
Ground and Power planes play a key role in reducing noise and
parasitics
New packaging and pinouts allow for improved performance and
more compact layouts
There are many options for signal distribution, make sure you
choose the right one for your application
Check the layout very carefully


73
References
Special Thanks and acknowledgement to Lee Ritchey for use of
plots and material for this presentation.

Lee Ritchey Right the first time ISBN 0-9741936-0-7
http://www.speedingedge.com/

Ardizzoni, John A Practical Guide to High-Speed Printed-Circuit-
Board Layout
Ardizzoni, John, Keep High-Speed Circuit-Board Layout on Track,
EE Times, May 23, 2005.
Brokaw, Paul, An IC Amplifier Users Guide to Decoupling,
Grounding, and Making Things Go Right for a Change, Analog
Devices Application Note AN-202.
Brokaw, Paul and Jeff Barrow, Grounding for Low- and High-
Frequency Circuits, Analog Devices Application Note AN-345.
Buxton, Joe, Careful Design Tames High-Speed Op Amps, Analog
Devices Application Note AN-257.

74
References
DiSanto, Greg, Proper PC-Board Layout Improves Dynamic
Range, EDN, November 11, 2004.
Grant, Doug and Scott Wurcer, Avoiding Passive-Component
Pitfalls, Analog Devices Application Note AN-348
Johnson, Howard W., and Martin Graham, High-Speed Digital
Design, a Handbook of Black Magic, Prentice Hall, 1993.
Jung, Walt, ed., Op Amp Applications Handbook, Elsevier-Newnes,
2005 available on Amazon.com
Kester, Walt, The Data Conversion Handbook, Elsevier-Newnes,
2005 available on Amazon.com

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