DESIGN AND PERFORMANCE ANALYSIS OF LOW POWER DIGITAL CIRCUITS USING GDI

CHANDIGARH GROUP OF COLLEGES,LANDRAN PUNJAB TECHNICAL UNIVERSITY

SUBMITTED BY: POOJA VERMA ROLL NO -1270679 M.TECH- VLSI DESIGN

Outline
Introduction Role of VLSI In digital circuits Gaps in present Study Objectives Methodology

INTRODUCTION
GATE DIFFUSION INPUT (GDI)
It is a new technique of low power digital combinational circuit design. This technique allows reducing power consumption, propagation delay, area of digital circuits while maintaining low complexity design . GDI allows implementation of wide range of complex logic functions using only two transistors. Basic GDI cell:

Advantages of GDI OVER CMOS

Low power circuit design Allows reducing power consumption. Reducing propagation delay. Reducing area of digital circuit. Maintaining low complexity of logic design.

WHY LOW POWER?

Power dissipation limitations come in two ways:1.The first is related to cooling considerations when implementing high performance systems. High-speed circuits dissipate large amounts of energy in a short amount of time , generating a great deal of heat. This heat needs to be removed by the package on which integrated circuits are mounted.

2.The second failure of high-power circuits relates to the increasing popularity of portable electronic devices. Laptop computers, portable video players and cellular phones all use batteries as a power source. To extend the battery life, low power operation is desirable in integrated circuits.

MODIFIED GATE DIFFUSION INPUT TECHNIQUE

Mod-GDI CELL

Modified GDI cell contains a low voltage terminal SP configured to be connected to high constant voltage (i.e. supply voltage) a high voltage terminal SN configured to be connected to a low constant voltage(i.e. ground). Including terminals these ensures that the Mod-GDI cell can be implemented with all current CMOS technologies

FULL SWING GATE DIFFUSION INPUT LOGIC TECHNIQUE

This technique is used to implement digital circuits by using GDI full swing F1 and F2 gates , which are counter parts of standard CMOS NAND and NOR gate. The Full Swing GDI technique utilizes a single swing restoration(SR) transistors to improve the output swing of F1 and F2 GDI gates. Full swing GDI cells are shown below:

Comparison of GDI techniques and CMOS from Literature survey

Logic cell Switching Delay(ns) GDI Switching Delay(ns) Mod-GDI Switching Delay(ns) CMOS Transistor count for GDI cell Transistor count for Mod-GDI cell Transistor count for CMOS cell Power (w) GDI Power (w) Mod-GDI Power (w) CMOS

OR AND F1 F2 MUX

.200 .500 .280 .53 .50

1.01 1.10 1.59 .40 .50

1.77 1.54 2.17 1.70 1.69

2 2 2 2 2

2 2 2 2 2

6 6 6 6 12

1.286 1.30 1.35 1.39 1.45

17.80 17.90 25.00 25.00 25.00

25.00 25.00 48.23 42.27 54.64

NAND
NOR XOR XNOR

.520
.540 .545 .540

.242
.280 .362 .363

.280
.300 .567 .567

4
4 4 4

4
4 3 3

4
4 16 16

.657
.680 1.48 1.50

.54
.654 1.23 1.23

.64
.75 1.5 1.5

Role of VLSI in Digital Circuits

Very large scale integration (VLSI) is the field which involves packing more and more logic devices into smaller and smaller areas.
Power dissipation LOW POWER AREA- GDI instead of CMOS

GAPS IN THE PRESENT STUDY

Less work has been carried out for sequential circuits design using GDI technique. There has been very less effort done to improve output voltage swings of digital circuits. Compatibility of GDI with twin-well CMOS process have not been studied. Advanced design metrics of GDI cells, such as minimum energy point (MEP) operation & minimum leakage vector (MLV) are less discussed.

OBJECTIVES
1. To design an area efficient and low power digital circuit by using GDI technique. 2. To design logic gates that that has less transistor count and consume less power.

3. To design radix 4 booth multiplier using these gates . 4. To achieve low power dissipation and less delay for high performance of system. 5. To achieve reduction in sub threshold and gate leakage current of designed circuit.

METHODOLOGY
1. Study of GDI techniques for the design of a low power digital circuit. 2. Comparison between these techniques is done and best technique is selected which is MGDI. 3. Logic gates are designed using MGDI technique. 4. Radix 4 booth multiplier is designed using MGDI. 4. Various parameters like area count, power dissipation and delay of gates and multiplier are calculated.

5. Design and simulation of all the circuits have been performed by TANNER
using TSMC BSIM .180m technologies.

Publication
I have written a review paper on COMPARATIVE PERFORMANCE ANALYSIS OF VARIOUS LOW POWER GDI TECHNIQUES FOR DIGITAL CIRCUITS

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