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Introduction to RAM

Many types of memory devices are available for use in modern


computer systems. As an embedded software engineer, We
must be aware of the differences between them and
understand how to use each type effectively. In our discussion,
we will approach these devices from the software developer's
perspective. Keep in mind that the development of these
devices took several decades and that their underlying
hardware differs significantly. The names of the memory types
frequently reflect the historical nature of the development
process and are often more confusing than insightful. Figure
classifies the memory devices we'll discuss as

RAM, SRAM & DRAM .


Random access memory
Random access memory (RAM) is the best known
form of computer memory. RAM stands for Random
Access Memory. Physically, RAM consists of small
electronic chips which are mounted in modules
(small printed circuit boards). The modules are
installed in the PC’s motherboard using sockets —
there are typically 2, 3 or 4 of these. On this
motherboard there are only two, and that’s a bit on
the low side of what is reasonable RAM is
considered "random access" because we can
access any memory cell directly if we know the row
and column that intersect at that
dynamic random access memory
(DRAM)
Similar to a microprocessor, a memory chip is an integrated circuit (IC)
made of millions of transistors and capacitors. In the most common form
of computer memory, dynamic random access memory (DRAM), a
transistor and a capacitor are paired to create a memory cell, which
represents a single bit of data. The capacitor holds the bit of information --
a 0 or a 1. The transistor acts as a switch that lets the control circuitry on
the memory chip read the capacitor or change its state.

A capacitor is like a small bucket that is able to store electrons. To store a


1 in the memory cell, the bucket is filled with electrons. To store a 0, it is
emptied. The problem with the capacitor's bucket is that it has a leak. In a
matter of a few milliseconds a full bucket becomes empty. Therefore, for
dynamic memory to work, either the CPU or the memory controller has to
come along and recharge all of the capacitors holding a 1 before they
discharge. To do this, the memory controller reads the memory and then
writes it right back. This refresh operation happens automatically
thousands of times per second

This refresh operation is where dynamic RAM gets its name. Dynamic
RAM has to be dynamically refreshed all of the time or it forgets what it is
holding. The downside of all of this refreshing is that it takes time and
slows down the memory.
Static RAM
Static RAM uses a completely different technology. In static RAM, a form
of flip-flop holds each bit of memory. A flip-flop for a memory cell takes
four or six transistors along with some wiring, but never has to be
refreshed. This makes static RAM significantly faster than dynamic RAM.
However, because it has more parts, a static memory cell takes up a lot
more space on a chip than a dynamic memory cell. Therefore, we get less
memory per chip, and that makes static RAM a lot more expensive.
So static RAM is fast and expensive, and dynamic RAM is less expensive
and slower. So static RAM is used to create the CPU's speed-sensitive
cache, while dynamic RAM forms the larger system RAM space.
Types of RAM
The RAM family includes two important memory devices: static RAM (SRAM) and
dynamic RAM (DRAM). The primary difference between them is the lifetime of the
data they store. SRAM retains its contents as long as electrical power is applied to
the chip. If the power is turned off or lost temporarily, its contents will be lost
forever. DRAM, on the other hand, has an extremely short data lifetime-typically
about four milliseconds. This is true even when power is applied constantly.
In short, SRAM has all the properties of the memory we think of when we hear the
word RAM. Compared to that, DRAM seems kind of useless. By itself, it is. However,
a simple piece of hardware called a DRAM controller can be used to make DRAM
behave more like SRAM. The job of the DRAM controller is to periodically refresh the
data stored in the DRAM. By refreshing the data before it expires, the contents of
memory can be kept alive for as long as they are needed. So DRAM is as useful as
SRAM after all.
When deciding which type of RAM to use, a system designer must consider access
time and cost. SRAM devices offer extremely fast access times (approximately four
times faster than DRAM) but are much more expensive to produce. Generally, SRAM
is used only where access speed is extremely important. A lower cost-per-byte
makes DRAM attractive whenever large amounts of RAM are required. Many
embedded systems include both types: a small block of SRAM (a few kilobytes)
along a critical data path and a much larger block of DRAM (perhaps even
Megabytes) for everything else.
Dynamic random access memory
(DRAM)
memory (DRAM) is a type of random access memory that
stores each bit of data in a separate capacitor. As real-world
capacitors are not ideal and hence leak electrons, the
information eventually fades unless the capacitor charge is
refreshed periodically. Because of this refresh requirement, it
is a dynamic memory as opposed to SRAM and other static
memory. Its advantage over SRAM is its structural simplicity:
only one transistor and a capacitor are required per bit,
compared to six transistors in SRAM. This allows DRAM to
reach very high density. Since DRAM loses its data when the
power supply is removed, it is in the class of volatile memory
devices.
Types of DRAM

Video DRAM (VRAM)


Fast Page Mode DRAM (FPM)
Window RAM (WRAM)
Video DRAM (VRAM)
VRAM is a dual-ported version of DRAM formerly used in graphics
adaptors. It is now almost obsolete, having been superseded by
SDRAM and SGRAM. VRAM has two paths (or ports) to its memory
array that can be used simultaneously.
The first port, the DRAM port, is accessed as with plain DRAM. The
second port, the video port, is read-only, and is dedicated to feeding a
fast stream of data to the display. To use the video port, the controller
first uses the DRAM port to select the row of the memory array that is
to be displayed. The VRAM then copies that entire row to an internal
shift-register. The controller can then continue to use the DRAM port
for drawing objects on the display. Meanwhile, the controller feeds a
clock called the shift clock (SCLK) to the VRAM's video port. Each
SCLK pulse causes the VRAM to deliver the next item of data, in strict
address order, from the shift-register to the video port. For simplicity,
the graphics adapter is usually designed so that the contents of a
row, and therefore the contents of the shift-register, corresponds to a
complete horizontal line on the display.
Fast Page Mode DRAM (FPM)
In page mode, much as in VRAM, a row of the DRAM
can be kept "open", so that successive reads or
writes within the row do not suffer the delay of
precharge and accessing the row. This increases the
performance of the system when reading or writing
bursts of data.
Static column is a variant of page mode in which the
column address does not need to be strobed in.
Nibble mode is another variant in which four
sequential locations within the row can be accessed.
Window RAM (WRAM)
Window RAM or WRAM is an obsolete type of semiconductor
computer memory that was designed to replace video RAM (VRAM)
in graphics adapters. It was developed by Samsung and also
marketed by Micron Technology, but had only a short market life
before being superseded by SDRAM and SGRAM.
WRAM has a dual-ported dynamic RAM structure similar to that of
VRAM, with one parallel port and one serial port, but has extra
features to enable fast block copies and block fills (so-called window
operations). It was often clocked at 50 MHz. It has a 32-bit wide host
port to enable optimal data transfer in PCI and VESA Local Bus
systems. Typically WRAM was 50% faster than VRAM, but with
costs 20% lower. It is sometimes erroneously called Windows RAM,
because of confusion with the Microsoft Windows operating
systems, to which it is unrelated apart from the fact that window
operations could boost the performance of windowing systems.
Static random access memory
SRAM
Static random access memory (SRAM) is a type of
semiconductor memory. The word "static" indicates
that the memory retains its contents as long as power
remains applied, unlike dynamic RAM (DRAM) that
needs to be periodically refreshed. (Nevertheless,
SRAM should not be confused with read-only memory
and flash memory, since it is volatile memory and
preserves data only while power is continuously
applied.) SRAM should not be confused with SDRAM,
which stands for synchronous DRAM and is entirely
different from SRAM, or with pseudostatic RAM
(PSRAM), which is DRAM disguised as SRAM.
Design
Random access means that locations in the memory can be written
to or read from in any order, regardless of the memory location that
was last accessed.
Each bit in an SRAM is stored on four transistors that form two
cross-coupled inverters. This storage cell has two stable states
which are used to denote 0 and 1. Two additional access transistors
serve to control the access to a storage cell during read and write
operations. It thus typically takes six MOSFETs to store one
memory bit.
Access to the cell is enabled by the word line (WL in figure) which
controls the two access transistors M5 and M6 which, in turn, control
whether the cell should be connected to be bit lines: BL and BL.
They are used to transfer data for both read and write operations.
While it's not strictly necessary to have two bit lines, both the signal
and its inverse are typically provided since it improves noise
margins.
Applications
SRAM is faster than DRAM and is used where speed is
the prime requirement such as in CPU caches and router
buffers. It is also used for external caches, DRAM burst
circuits and in its dual-ported form for digital signal
processing circuits. Modern FPGAs contain significant
amounts of embedded SRAM.
Hobbyists have often preferred using SRAM instead of
DRAM, due to the ease of interfacing. SRAM is
significantly easier to work with and faster to implement
than DRAM. There are no refresh cycles, as required with
DRAM. The address and data buses are usually fully
accessible, rather than multiplexed. SRAM circuits
usually require only power, ground, address/data, and
three controls: Chip enable (CE), Write enable (WE) and
Output enable (OE).
Types of SRAM
By transistor type
 Bipolar junction transistor (used in TTL and ECL)
— very fast but consumes a lot of power
 MOSFET (used in CMOS) — low power and very
common today

By function
Asynchronous — independent of clock frequency;
data in and data out are controlled by address
transition
Synchronous — all timings are initiated by the clock
edge(s). Address, data in and other control signals are
associated with the clock signals

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