is a very high gain differential amplifier with high input impedance and low output impedance. A basic OP AMP has 2 input and 1 output - + V O , OUTPUT
2 3 6 + V CC 4 7 - V CC INPUT 1 5 OP-AMP LM741 IC Pin Assignment NULL OFFSET 1 INVERTING INPUT NONINVERTING INPUT - V cc NULL OFFSET 2 Output +V cc
COMP 1 2 3 4 8 7 6 5 LM 741 OP AMP IC PIN ASSIGNMENT Single ended Input operation results when the input signal is connected to one input and with the other input is connected to the ground. SINGLE ENDED INPUT - + V O 2 3 6 + V CC 4 7 - V CC Grounded SINGLE ENDED INPUT 1 2 V V V d = A double-ended input can be designed using a single input or using double inputs DOUBLE ENDED INPUT DOUBLE ENDED INPUT WITH SINGLE INPUT - + V O 2 3 6 + V CC 4 7 - V CC V d Single input DOUBLE ENDED INPUT WITH DOUBLE INPUT - + V O 2 3 6 + V CC 4 7 - V CC V 2 V 1 TWO INPUTS For the double input circuit the supplied voltage is equal to the difference between the two input signals. 1 2 V V V d = DOUBLE ENDED INPUT DIFFERENTIAL INPUT When separate inputs are applied to the op- amp, the resulting difference signal is the difference between the two inputs. 2 1 V V V d = COMMON INPUT When both input signals are the same, a common signal element due to the two inputs can be defined as the average of the sum of the two signals. ( ) 2 1 2 1 V V V C = OUTPUT VOLTAGE The resulting output voltage of any op-amp can be defined as, c c d d O V A V A V + = Where, A d = Differential gain of the amplifier A c = Common-mode gain of the amplifier OPPOSITE POLARITY INPUTS If an ideal opposite polarity inputs, V 1 = Vs and V 2 = Vs are applied to an op-amp, The resulting differential voltage, V d is defined as ( ) s S s d V V V V 2 = = OPPOSITE POLARITY INPUTS The resulting common voltage, V c is defined as ( ) | | 0 2 1 = + = s s c V V V So, the resulting output voltage, V o is, s d o V A V 2 = SAME POLARITY INPUTS If an ideal same polarity inputs are applied to an op-amp V 1 = V 2 = V S
The resulting differential voltage, V d is defined as ( ) 0 = = S s d V V V SAME POLARITY INPUTS The resulting common voltage, V c is defined as ( ) | | s s s c V V V V = + = 2 1 So, the resulting output voltage, V o is, s c o V A V = COMMON MODE REJECTION RATIO Having obtained A d and A c , we can now calculate a value for the common-mode rejection ratio (CMRR), which is defined by the following equation, c d A A CMRR = c d A A CMRR log 20 (log) = or TYPICAL VALUE FOR LM741 Open loop voltage gain A VOL 2 X 10 5
Slew Rate SR 0.5 V/s Full Power Bandwidth f PL ~ 6 kHz Gain Bandwidth Product GBP 1 MHz Saturation Voltage V sat 14V Input Offset Voltage V io 5 mV max Input Offset Current I io 20 nA Input Bias Current (average) I B 80 nA Common Mode Rejection Ratio CMRR 90 dB Power supply Rejection Ratio PSRR 30 V/V