Jaeger/Blalock

01/03/04
Microelectronic Circuit Design
McGraw-Hill
Chapter 11
Operational Amplifiers
Microelectronic Circuit Design
Richard C. Jaeger
Travis N. Blalock
Chap 11-1
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Chapter Goals
Understand behavior and characteristics of ideal differential and
operational amplifiers (op amps)
Study non-ideal op-amp behavior
Demonstrate circuit analysis techniques for ideal and non-ideal
op amps
Characterize inverting, non-inverting, summing and
instrumentation amplifiers, voltage follower and integrator
Learns factors involved in circuit design using op amps
Understand frequency response limitations of op-amp circuits
Find characteristics of cascaded amplifiers such as gain, input
resistance, output resistance and frequency response
Chap 11-2
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Differential Amplifier Model: Basic
Represented by:
A = open-circuit voltage gain
v
id
= (v
+
-v
-
) = differential input signal
voltage
R
id
= amplifier input resistance
R
o
= amplifier output resistance
Signal developed at amplifier output is in
phase with the voltage applied at the + input
(non-inverting) terminal and 180
o
out of phase
with that applied at the - input (inverting)
terminal.
Chap 11-3
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Differential Amplifier Model: With
Source and Load
R
L
= load resistance
R
S
= Thvenin equivalent resistance
of signal source
v
s
= Thvenin equivalent voltage of
signal source

v
O
=Av
id
R
L
R
o
+R
L
and v
id
=v
S
R
id
R
id
+R
S
Op amp circuits are mostly dc-coupled amplifiers. Signals v
o
and v
s
may have
a dc component representing a dc shift of the input away from Q-point.
Op-amp circuits amplify both dc and ac components

A
v
=
v
O
v
S
=
R
id
R
id
+R
S
R
L
R
o
+R
L
Chap 11-4
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Differential Amplifier Model: With
Source and Load (Example)
Problem: Calculate voltage gain
Given Data: A = 100, R
id
= 100kO, R
o
= 100O, R
S
= 10kO, R
L
= 1000O
Analysis:




Ideal amplifiers output depends only on input voltage difference and not
on source and load resistances.This can be achieved by using fully
mismatched resistance condition (R
id
>> R
S
or infinite R
id
and R
o
<< R
L

or zero R
o
).


A = open-loop gain (maximum voltage gain available from the device)


A
v
=
v
o
v
s
=
R
id
R
id
+R
S
R
L
R
o
+R
L
=100
100kO
10kO+100kO
|
\


|
.
|
|
1000O
100O+1000O
|
\


|
.
|
|
=82.6=38.3 dB

v
O
=Av
id
or A
v
=
v
O
v
id
=A
Chap 11-5
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Ideal Operational Amplifier
The ideal op amp is a special case of an ideal differential amplifier with
infinite gain, infinite R
id
and zero R
o
.


If A is infinite, v
id
is zero for any finite output voltage.
Infinite input resistance R
id
forces input currents i
+
and i
-
to be zero.

The ideal op amp has the following assumptions:
Infinite common-mode rejection, power supply rejection, open-loop
bandwidth, output voltage range, output current capability and slew
rate
Zero output resistance, input-bias currents and offset current, input-
offset voltage.

v
id
=
v
O
A
and lim
A
v
id
=0
Chap 11-6
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Inverting Amplifier Configuration
Positive input is grounded.
Feedback network consisting of resistors R
1
and R
2
is connected
between the inverting input, the signal source and the amplifier output
Chap 11-7
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Inverting Amplifier:Voltage Gain
Negative voltage gain implies
180
0
phase shift between
dc/sinusoidal input and output
signals.
Gain greater than 1 if R
2
> R
1

Gain less than 1 if R
1
> R
2

Inverting input of op amp is at
ground potential (not connected
directly to ground) and is said to
be at virtual ground.

v
s
i
s
R
1
i
2
R
2
v
o
=0

i
s
=
v
s
R
1
and A
v
=
v
O
v
S
=
R
2
R
1
But i
s
= i
2
and v- = 0 (since v
id
= v
+
-v
-
= 0)
Chap 11-8

R
in
=
v
s
i
s
= R
1
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Inverting Amplifier: Input and Output
Resistances
R
out
is found by applying a test current
(or voltage) source to the amplifier
output and determining the resulting
voltage (or current). All independent
sources must be turned off. Hence, v
s
= 0


v
x
= i
2
R
2
+ i
1
R
1
But i
1
= i
2


v
x
= i
1
(R
2
+ R
1
)
Since v
-
= 0, i
1
= 0 and v
x
= 0
irrespective of the value of i
x
.
0 =
out
R
Chap 11-9
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Inverting Amplifier: Example
Problem:Design an inverting amplifier
Given Data: A
v
= 20 dB, R
in
= 20 kO,
Assumptions: Ideal op amp
Analysis: Input resistance is controlled by R
1
and voltage gain is set by
R
2
/ R
1
.

A minus sign is added since the amplifier is inverting.

A
v
=10
40dB / 20dB
=100 and A
v
= 100

R
1
= R
in
= 20 kO
A
v
=
R
2
R
1
R
2
=100R
1
= 2 MO
Chap 11-10
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Non-inverting Amplifier: Configuration
Input signal is applied to the non-inverting input terminal.
A portion of the output signal is fed back to the negative input terminal.
Analysis is done by relating voltage at v
1
to input voltage v
s
and output
voltage v
o
.

Chap 11-11
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Non-inverting Amplifier:Voltage Gain,
Input Resistance and Output Resistance


But v
id
= 0





Since i
+
= 0

Since i
-
= 0 : v
1
= v
O
R
1
R
1
+ R
2
and v
S
v
id
= v
1

v
S
= v
1
v
O
= v
S
R
1
+ R
2
R
1
A
v
=
v
O
v
S
=
R
1
+ R
2
R
1
=1+
R
2
R
1


R
in
=
v
S
i
+
=
R
out
is found by applying a test current source to amplifier output and
setting v
s
= 0. The resulting circuit is identical to that used for the output
resistance calculation for the inverting amplifier. Therefore R
out
= 0.
Chap 11-12
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Non-inverting Amplifier: Example
Problem:Determine the characteristics of given non-inverting
amplifier
Given Data: R
1
= 3 kO, R
2
= 43 kO, v
s
= +0.1 V
Assumptions: Ideal op amp
Analysis:



Since i
-
= 0,


A
v
=1+
R
2
R
1
=1+
43kO
3kO
v
O
= A
v
v
S
= (15.3)(0.1V) =1.53 V

i
O
=
v
O
R
2
+ R
1
=
1.53V
43kO+ 3kO
= 33.3 A
Chap 11-13
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Unity-gain Buffer
A special case of the non-inverting amplifier; also called avoltage
follower with infinite R
1
and zero R
2
. Hence A
v
=1.
Provides excellent impedance-level transformation while maintaining
signal voltage level.
Ideal voltage buffer does not require any input current and can drive
any desired load resistance without loss of signal voltage.
Unity-gain buffer is used in may sensor and data acquisition systems.
Chap 11-14
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Summing Amplifier
Scale factors for the 2 inputs
can be independently adjusted
by proper choice of R
2
and R
1
.
Any number of inputs can be
connected to the summing
junction through additional
resistors.
This circuit is also an example
of a simple digital-to-analog
converter.
Since negative amplifier input is
at virtual ground,
Since i
-
= 0, i
3
= i
1
+ i
2
,
Chap 11-15

i
1
=
v
1
R
1
i
2
=
v
2
R
2
i
3
=
v
O
R
3

v
O
=
R
3
R
1
v
1

R
3
R
2
v
2

Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Difference Amplifier
Also called a differential
subtractor, the circuit amplifies
the difference between the input
signals.
R
in2
is series combination of R
1

and R
2
because i
+
is zero.
For v
2
= 0, R
in1
= R
1
, as the circuit
reduces to an inverting amplifier.
For general case, i
1
is a function
of both v
1
and v
2
.


v
o
=v
-
i
2
R
2
=v
-
i
1
R
2
v
o
=v
-

R
2
R
1
(v
1
v
-
)=
R
1
+R
2
R
1
|
\




|
.
|
|
|
|
v
-

R
2
R
1
v
1
Also, v
+
=
R
2
R
1
+R
2
v
2


Since v
-
=v
+
, v
o
=
R
2
R
1
(v
1
v
2
)
For R
2
=R
1
, v
o
=(v
1
v
2
)
Chap 11-16
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Difference Amplifier: Example
Problem: Determine V
o
, V
+
, V
-
, I
o
, I
1
, I
2
, I
3
.
Given Data: R
1
= 10 kO, R
2
= 100 kO, V
1
= 5 V, V
2
= 3 V
Assumptions: Ideal op amp - hence, V
-
= V
+
and I
-
= I
+
= 0.
Analysis: Using dc values,


V
+
=V
-
=
R
2
R
1
+R
2
V
2
=
100kO
10kO+100kO
3V =2.73 V


I
1
=I
2
=
V
1
V
-
R
1
=
5V-2.73V
10kO
=227 A

V
O
=V
1
I
1
R
1
I
2
R
2
=5V(227A)(110kO)=20.0 V

I
O
=I
2
=227 A
Chap 11-17
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Instrumentation Amplifier
Combines 2 non-inverting amplifiers
with the difference amplifier to
provide higher gain and higher input
resistance.


v
O
=
R
4
R
3
(v
a
v
b
)
v
a
iR
2
i(2R
1
)iR
2
=v
b
But, i =
v
1
v
2
2R
1
v
O
=
R
4
R
3
1+
R
2
R
1
|
\




|
.
|
|
|
|
(v
1
v
2
)
Input resistance is infinite because
input current to both op amps is zero.
Output resistance is set to zero by the
difference amplifier.
O k 15
Chap 11-18
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Instrumentation Amplifier: Example
Problem:Determine V
O
, V
A
, V
B
.
Given Data: R
1
= 15 kO, R
2
= 150 kO, R
3
= 15 kO, R
4
= 30 kO,
V
1
= 2.5 V, V
2
= 2.25 V
Assumptions: Ideal op amp. Hence, V
-
= V
+
and I
-
= I
+
= 0.
Analysis:Using dc values,


V
O
=
R
4
R
3
1+
R
2
R
1
|
\




|
.
|
|
|
|
(V
1
V
2
)=
30kO
15kO
1+
150kO
15kO
|
\


|
.
|
|
(2.52.25)=5.50V
I =
V
1
V
2
2R
1
=
2.5V -2.25V
2(15kO)
=8.33 A
V
A
=V
1
+IR
2
=2.5+(8.33A)(150kO)=+3.75 V
V
B
=V
2
+IR
2
=2.25(8.33A)(150kO)=1.00 V
Chap 11-19
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Active Low-Pass Filter
A generalized inverting amplifiers gain is


A
v
(s)=
V
o
(s)
V
s
(s)
=
Z
2
(s)
Z
1
(s)
In a single-pole low-pass filter,




Z
1
(s)= R
1
Z
2
(s)=
R
2
1
sC
|
\


|
.
|
|
R
2
+
1
sC
=
R
2
sCR
2
+1


A
v
(s)=
R
2
R
1
1
(1+sCR
2
)
=
R
2
R
1
1
(1+
s
e
H
)


e
H
=2tf
H
=
1
R
2
C
Chap 11-20
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Active Low-Pass Filter (cont.)
Single pole at e
H
At frequencies below

e
H
amplifier is an inverting
amplifier with gain set by ratio
of resistors R
2
and R
1
.
At frequencies above e
H
, the
amplifier response rolls of at
-20dB/decade.
Cutoff frequency and gain can
be independently set.
Chap 11-21
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Active Low-pass Filter: Example
Problem: Design an active low-pass filter
Given Data: A
v
= 40 dB, R
in
= 5 kO, f
H
= 2 kHz
Assumptions: Ideal op amp, specified gain represents low-frequency
gain.
Analysis:
Input resistance is controlled by R
1
and voltage gain is set by R
2
/ R
1
.




Closest capacitor value of 160 pF lowers cutoff frequency to 1.95 kHz.
Another choice of 150 pF raises cutoff frequency to 2.08 kHZ.

A
v
=10
40dB/20dB
=100

R
1
=R
in
=5 kO and A
v
=
R
2
R
1
R
2
=100R
1
=500 kO
C=
1
2tf
H
R
2
=
1
2t(200kHz)(510kO)
=156 pF
Chap 11-22
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Inverting Integrator
Feedback resistor R
2
in the inverting
amplifier is replaced by capacitor C.
The circuit uses frequency-dependent
feedback.

i
S
=
v
S
R
i
C
=C
dv
O
dt
Voltage at the circuits output at
time t is given by the initial
capacitor voltage integral of the
input signal from start of
integration interval, here, t = 0.
Integration of an input step signal
results in a ramp at the output.
Chap 11-23

Since i
C
= i
S
,
dv
O
}
=
1
RC
}
v
S
dt
v
O
t
( )
=
1
RC
v
S
t
( )
0
t
}
dt + v
O
0
( )
v
O
0
( )
= V
C
0
( )
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Differentiator
Input resistor R
1
in the inverting
amplifier is replaced by capacitor C.
Derivative operation emphasizes high-
frequency components of input signal,
hence it is less often used than the
integrator.

i
R
=
v
O
R
i
S
=C
dv
S
dt

Since i
R
=i
S
, v
O
=RC
dv
S
dt
Output is scaled version of the
derivative of the input voltage.
Chap 11-24
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Cascaded Amplifiers
Connecting several amplifiers in cascade can meet design specifications not
met by a single amplifier (output of one stage connected to input of next).
Each amplifier is built by using an op amp with parameters A, R
id
, R
o
, called
the open-loop parameters that describe the op amp with no external elements.
A
v
, R
in
, R
out
are closed-loop parameters that describe both the closed-loop op
amp with the feedback network as well as the overall composite (cascaded)
amplifier.
Chap 11-25
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Two-port Model for 3-stage Cascade
Amplifier
Each amplifier in the 3-stage cascaded amplifier is replaced by its 2-port
model.

v
o
= A
vA
v
s
R
inB
R
outA
+R
inB
|
\




|
.
|
|
|
|
A
vB
R
inC
R
outB
+R
inC
|
\




|
.
|
|
|
|
A
vC

A
v
=
v
o
v
s
=A
vA
A
vB
A
vC
If R
out
= 0
R
in
= R
inA
and

R
out
= R
outC
= 0
Chap 11-26
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Non-ideal Operational Amplifier
Various error terms arise in practical operational amplifiers due to non-
ideal behavior.
Some of the non-ideal characteristics include:
Finite open-loop gain that results in gain error
Non zero output resistance
Finite input resistance
Finite CMRR
Common-mode input resistance
DC offst voltage and input currents
Output voltage and current limits
Chap 11-27
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Finite Open-loop Gain

v
1
=
R
1
R
1
+R
2
v
o
=|v
o
|=
R
1
R
1
+R
2
is called the
feedback factor.

v
o
= Av
id
= A(v
s
v
1
)= A(v
s
|v
o
)
A
v
=
v
o
v
s
=
A
1+A|
A| is called the loop gain.
For A| >>1,

A
ideal
=
1
|
=1+
R
2
R
1

v
id
=v
s
v
1
=v
s
|v
o
v
id
=v
s

A|
1+A|
v
s
=
v
s
1+A|
Although no longer zero, v
id
is
small for large A|.
Chap 11-28
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Gain Error
Gain Error is given by
GE = (ideal gain) - (actual gain)
For non-inverting amplifier,


Gain error is also expressed as a fractional or percentage
error.


GE=
1
|

A
1+A|
=
1
|(1+A|)


FGE=
1
|

A
1+A|
1
|
=
1
1+A|
~
1
A|
Chap 11-29
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Gain Error: Example
Problem: Find ideal, actual gain and gain error in percent
Given data: Closed-loop gain of 200 (46 dB); open-loop gain of op
amp is 10,000 (80 dB).
Approach: Amplifier is designed to give ideal gain and deviations
from ideal case are determined. Hence,

R
1
and R
2
are not noramlly designed to compensate for finite open-loop
gain of amplifier.
Analysis:
200
1
= |


A
v
=
A
1+A|
=
10
4
1+
10
4
200
=196 FGE=
200196
200
=0.02 or 2%
Chap 11-30
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Non-zero Output Resistance
Output terminal is driven by test source v
x
and
current i
x
is calculated to determine output
resistance (all independent sources are turned
off). The equivalent circuit is same for both
inverting and non-inverting amplifiers.

R
out
=
v
x
i
x
Chap 11-31
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Non-zero Output Resistance (cont.)


i
x
=i
o
+i
2
i
o
=
v
x
- Av
id
R
o
i
2
=
v
x
R
1
+R
2
Analysis:
Also, v
id
= -v
1
and

v
1
=
R
1
R
1
+R
2
v
x
=|v
x

1
R
out
=
i
x
v
x
=
1+A|
R
o
+
1
R
1
+R
2
or R
out
=
R
o
1+A|
R
1
+R
2
|
\

|
.
|
Since, R
o
/(1+A|)<<(R
1
+R
2
),

R
out
~
R
o
1+A|
If A is infinite, R
out
= 0
Thus, shunt feedback at the output reduces R
out.
Chap 11-32
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Open-loop Gain Design: Example
Problem: Design non-inverting amplifier and find open-loop gain
Given Data: A
v
= 35 dB, R
out
= 0.2 O, R
o
= 250 O
Analysis:

A
v
=10
35dB/20dB
=56.2 and |=
1
A
v
=
1
56.2

R
out
=
R
o
1+A|
s0.2O
A>
1
|
R
o
R
out
1
|
\




|
.
|
|
|
|
=56.2
250
0.2
1
|
\


|
.
|
|
=7.0310
4
=96.9 dB
Chap 11-33
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Finite Input Resistance: Non-inverting
Amplifier
Test voltage source v
x
is applied to
input and current i
x
is calculated.

i
x
=
v
x
v
1
R
id
Assuming i
-
<<i
2
implies i
1
= i
2
.

v
1
=i
1
R
1
~i
2
R
1

v
1
~
R
1
R
1
+R
2
v
o
=|v
o
v
1
=|(Av
id
)= A|(v
x
v
1
)
v
1
=
A|
1+A|
v
x
i
x
=
v
x

A|
1+A|
v
x
R
id
=
v
x
(1+A|)R
id
R
in
=R
id
(1+A|)
Chap 11-34
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Finite Input Resistance: Inverting
Amplifier


R
in
=
v
x
i
x
=
i
x
R
1
+v
-
i
x
=R
1
+
v
-
i
x
R
1
removed


i
1
=i
-
+i
2
=
v
1
R
id
+
v
1
v
o
R
2
=
v
1
R
id
+
v
1
Av
1
R
2

G
1
=
i
1
v
1
=
1
R
id
+
1+A
R
2
R
in
=R
1
+ R
id
R
2
1+A
|
\



|
.
|
|
|
~R
1
+
R
2
1+A
|
\


|
.
|
|
For large A, R
in
= R
1
Chap 11-35
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Finite Common-Mode Rejection Ratio
(CMRR)
A (or A
dm
)= differential-mode gain
A
cm
= common-mode gain
v
id
= differential-mode input voltage
v
ic
= common-mode input voltage
A real amplifier responds to the signal
common to both inputs, called the
common-mode input voltage. In
general,


v
o
= A v
id
+
A
cm
v
ic
A
|
\



|
.
|
|
|
= A v
id
+
v
ic
CMRR
|
\


|
.
|
|
CMRR=
A
A
cm
Ideal amplifier has A
cm
= 0, but for a real
amplifier,

v
1
=v
ic
+
v
id
2
v
2
=v
ic

v
id
2

v
o
=A(v
1
v
2
)+A
cm
v
1
+v
2
2
|
\


|
.
|
|
v
o
=A(v
id
)+A
cm
(v
ic
)
Chap 11-36
Actual sign of CMRR isnt known before hand
as only a lower bound is given.
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Finite Common-Mode Rejection Ratio:
Example
Problem: Find error introduced by finite CMRR.
Given Data: A = 2500, CMRR = 80 dB, v
1
= 5.001 V, v
2
= 4.999 V
Assumptions: Op amp is ideal except for finite gain and CMRR. Here,
CMRR of 80 dB corresponds to CMRR of 10
4
. Assume CMRR = + 10
4
.
Analysis:





Error introduced by common-mode input is 25% of differential input voltage.
Also,


v
id
=5.001V 4.999V =0.002 V
v
ic
=
5.001V +4.999V
2
=5.000 V
v
o
= A v
id
+
v
ic
CMRR
|
\


|
.
|
|
=2500 0.002+
5.000
10
4
|
\


|
.
|
|
V =6.25 V
whereas desired output is v
o
= Av
id
=5.00 V


A
cm
=
A
CMRR
=
2500
10000
=0.25 or 12 dB
Chap 11-37
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Voltage Follower Gain Error
due to CMRR

v
id
=v
s
v
o
v
ic
=
v
s
+v
o
2
v
o
= A v
s
v
o
( )
+
v
s
+v
o
( )
2CMRR
|
\



|
.
|
|
|
A
v
=
v
o
v
s
=
A1+
1
2CMRR
|
\


|
.
|
|
1+A1
1
2CMRR
|
\


|
.
|
|
Ideal gain for the voltage follower
is unity. The gain error is

GE=1A
v
=
1
A
CMRR
1+A1
1
2CMRR
|
\


|
.
|
|
Since, both A and CMRR are
normally >>1,


GE~
1
A

1
CMRR
First term is due to finite amplifier
gain; second term shows that CMRR
may introduce an even larger error.
Chap 11-38
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Common-mode Input Resistance
When a pure common-mode signal v
ic
is applied to amplifier input(v
id
= 0),
total resistance presented to source is . R
ic
is common-mode
input resistance.
Normally, R
ic
>> R
id
.
For a purely differential-mode input signal, input resistance is


2R
ic
2R
ic
=R
ic

R
in
=R
id
4R
ic
Chap 11-39
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
DC Error Sources
Input-Offset Voltage
With inputs being zero, the
amplifier output actually
rests at some non-zero dc
voltage level. The equivalent
dc input offset voltage is

The amplifier is connected as
a voltage-follower to give an
output voltage equal to the
offset voltage.


V
OS
=
V
O
A


v
O
= A v
id
+
v
ic
CMRR
+V
OS
|
\


|
.
|
|
To include effect of offset voltage,

If v
id
= 0,



Thus, CMRR is a measure of how
total offset voltage changes from
its dc value when common-mode
voltage is applied.


v
O
=A
v
ic
CMRR
+V
OS
|
\


|
.
|
|
=A(v
OS
)
CMRR=
v
ic
v
OS
Chap 11-40
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
DC Error Sources
Input-Offset Voltage (Example)
Problem: Find quiescent dc voltage
at output.
Given data: R
1
= 1.2 kO, R
2
= 99
kO,
Assumptions: Ideal op amp except
for non-zero offset voltage.


V
OS
s3mV
Output voltage is given by


Actual sign of V
OS
is unknown as
only upper bound is given.
Note: Offset voltage of most IC op
amps can be manually adjusted by
adding a potentiometer as shown.


V
OS
s 1+
99kO
1.2kO
|
\


|
.
|
|
(0.003)=0.25 V
Chap 11-41
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
DC Error Sources
Power Supply Rejection Ratio (PSRR)
Power supply voltages change due to long-term drift or noise on
supplies.
Equivalent input offset voltage changes in response to power supply
voltage changes.
PSRR measures the ability of amplifier to reject power supply
variations.
PSRR indicates how offset voltage changes in response to change in
power supply voltages.


Generally PSRR values for v
+
and v
-
are different.
Both CMRR and PSRR both degrade rapidly with frequency increase.


PSRR
+
=
v
+
v
OS
(usually expressed in dB)
PSRR

=
v
-
v
OS
(usually expressed in dB)
Chap 11-42
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
DC Error Sources
Input-Bias and Offset Currents

I
OS
=I
B1
I
B2
Bias currents I
B1
and I
B2
(

base
currents in BJTs or gate currents in
MOSFETs or JFETs) are similar in
value with directions depending on
internal amplifier circuit type.
In inverting amplifier shown, I
B1
is
shorted out by ground connection.
Since, inverting input is at virtual
ground, amplifier output is forced to
supply I
B2
through R
2
.
Sign of offset current is unknown
as only upper bound is given.

V
O
=+I
B2
R
2
Chap 11-43
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
DC Error Sources: Input-Bias and Offset
Currents - Bias Current Compensation
Bias current compensation
resistor R
B
is used in series with
non-inverting input. Output due
to I
B1
alone is

V
O
=I
B1
R
B
1+
R
2
R
1
|
\




|
.
|
|
|
|
By superposition,



if .

Since, offset current is typically 5-10
times smaller than the individual bias
currents, dc output voltage error can be
reduced by using bias compensation.

V
O
=I
B2
R
2
I
B1
R
B
1+
R
2
R
1
|
\




|
.
|
|
|
|
V
O
=(I
B2
I
B1
)R
2
=I
OS
R
2

R
B
=
R
1
R
2
R
1
+R
2
|
\




|
.
|
|
|
|
Chap 11-44
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
DC Error Sources: Input-Bias and Offset
Currents - Errors in Integrator
At t < 0, reset switch is closed,
circuit becomes a voltage-
follower,

V
O
=V
OS
At t = 0, reset switch is opened, and
circuit starts integrating its own offset
voltage and bias current. Using
superposition analysis,


Output becomes ramp with slope
determined by V
OS
and I
B2
, and it
eventually saturates at one of the
power supplies.

v
O
(t)=V
OS
+
V
OS
RC
t +
I
B2
C
t
Chap 11-45
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Output Voltage and Current Limits
Practical op amps have limited
output voltage and current ranges.
Voltage: Limited to several volts
less than power supply span.
Current: Limited by internal
circuitry (to limit power
dissipation or protect against
accidental short circuits).
Current limit specified as
minimum load resistance that the
amplifier can drive with a given
voltage swing. e. g.:



i
O
s
10V
5kO
=2 mA
For inverting amplifier,

i
O
=i
L
+i
F
=
v
O
R
L
+
v
O
R
2
+R
1
=
v
O
R
EQ
R
EQ
=R
L
(R
1
+R
2
)

R
EQ
=R
L
R
2
Chap 11-46
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Output Voltage and Current Limits:
Example
Problem: Design inverting
amplifier with given
specifications.
Given Data: A
v
= 20 dB,

Magnitude of output
current less than 2.5 mA.

R
L
>5 kO, v
O
s10 V
Assumptions: Ideal op amp except for
limited output current.
Analysis:




We choose R
1
= 10 kO and R
2
= 100 kO,
providing an input resistance of 10 kO.
Maximum output current will be:

R
EQ
=R
L
R
2
>
10V
2.5mA
=4 kO

i
O
s
10V
100kO
+
10V
5kO
=2.1 mA<2.5 mA
Chap 11-47

Since R
L
> 5kO, R
2
> 20kO
For A
v
= 20dB, R
2
=10R
1
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Frequency Response of Op Amps:
General Case
Op amps: Low-pass amplifier with
high gain at dc and a single-pole
frequency response.




e
B
= open loop bandwidth of op amp.
e
T
= unity gain frequency or gain
bandwidth product (frequency at
which magnitude of gain is unity).


A(s)=
A
O
e
B
s+e
B
=
A
o
e
T
s+e
B
A( je) =
A
O
e
B
e
2
+e
B
2
=
A
O
1+
e
2
e
B
2




For e >>e
B
, product of
magnitude of amplifier gain
and frequency is a constant
value equal to the unity gain
frequency.
Hence, e
T
is also called gain-
bandwidth product.

For e>>e
B
, A( je) ~
A
O
e
B
e
=
e
T
e

At e=e
T
, A( je) =
e
T
e
=1
A( je) e=e
T
Chap 11-48
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Frequency Response of Op Amps:
General Case (Example)
Problem: Find transfer
function describing frequency-
dependent amplifier voltage
gain.


A
O
=10
80dB/20dB
=10
4
e
B
=10
3
rad/s
A
v
( s )=
A
O
e
B
s+e
B
=
10
7
s+10
3
Frequency values are often
expressed in Hz.

f
B
=
e
B
2t
=159 Hz
f
T
=
e
T
2t
=1.59 MHz
Chap 11-49
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Frequency Response of Op Amps:
Noninverting Amplifier
For a closed-loop feedback amplifier:


A
v
( s )=
A(s)
1+A(s)|
=
A
O
e
B
s+e
B
(1+A
O
|)
A
v
( s )=
A
O
1+A
O
|
s
(1+A
O
|)e
B
+1
=
A
v
(0)
s
e
H
+1
e
H
=(1+A
O
|)e
B
=
e
T
A
v
(0)
For A
O
| >>1,

A
v
(0)~
1
|
e
H
~|e
T
At low frequencies, gain is set by the
feedback, but at high frequencies, it
follows the gain of the amplifier.
Chap 11-50
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Frequency Response of Op Amps:
Non-inverting Amplifier (Example)
Problem: Characterize frequency response of a non inverting amplifier.
Given data: A
o
= 10
5
= 100 dB, f
T
= 10
7
Hz, desired A
v
= 1000 = 60 dB
Assumptions: Amplifier is described by a single-pole transfer function.
Analysis:

f
B
=
f
T
A
O
=
10
7
Hz
10
5
=100Hz
f
H
= f
B
(1+A
O
|)=100(1+10
5
10
3
)=10.1 kHz
|=
1
A
v
(0)
=
1
1000
=10
3
A
v
(s)~
A
O
e
B
s+e
B
=
10
5
(2t)(10
2
)
s+(2t)(10
2
)
=
2t 10
7
s+200t
A
v
(s)=
A
O
e
B
s+e
B
(1+A
O
|)
=
2t 10
7
s+2.02t 10
4

Op amp transfer
function
Non-inverting amplifier
transfer function
Chap 11-51
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Frequency Response of Op Amps:
Inverting Amplifier


A
v
( s )=
R
2
R
1
|
\




|
.
|
|
|
|
A(s)|
1+A(s)|
A
v
( s )=
R
2
R
1
|
\




|
.
|
|
|
|
A
O
e
B
s+e
B
|
1+
A
O
e
B
s+e
B
|
=

R
2
R
1
|
\


|
.
|
|
A
O
|
1+A
O
|
s
(1+A
O
|)e
B
+1
For A
o
| >>1,


A
v
( s )=

R
2
R
1
|
\


|
.
|
|
A
O
|
1+A
O
|
s
e
H
+1
~

R
2
R
1
|
\


|
.
|
|
s
e
H
+1

e
H
=
e
T
A
O
1+A
O
|
~|e
T
Chap 11-52
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Frequency Response of Op Amps:
Inverting Amplifier (Example)
Problem: Characterize frequency response of inverting amplifier.
Given data: A
o
= 2x10
5
, f
T
= 5x10
5
Hz, desired A
v
= -100 or 40 dB
Assumptions: Amplifier is described by single-pole transfer function.
Analysis:

f
B
=
f
T
A
O
=
510
5
Hz
210
5
=2.5 Hz
f
H
= f
B
(1+A
O
|)=2.5Hz(1+
210
5
101
)=4.95 kHz
A
v
(s)=
A
O
e
B
s+e
B
=
e
T
s+e
B
=
510
5
(2t)
s+(2t)(2.5)
=
10
6
t
s+5t
A
v
(s)=
R
2
R
1
|
\




|
.
|
|
|
|
A
O
|e
B
s+e
B
(1+A
O
|)
=
9.9010
5
t
s+9.9110
3
t
Op amp transfer
function
Inverting amplifier
transfer function

|=
1
1+ A
v
(0)
=
1
101
Chap 11-53
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Frequency Response of Cascaded
Amplifiers


A
v
(s)=
V
oN
(s)
V
s
(s)
=
V
o1
V
s
V
o2
V
o1
...
V
oN
V
o(N -1)
A
v
(s)=A
v1
(s)A
v2
(s)...A
vN
(s)
Assume that stages do not interact,

A
v
(s)=
A
v1
(0)
1+
s
e
H1
|
\




|
.
|
|
|
|
A
v2
(0)
1+
s
e
H2
|
\




|
.
|
|
|
|
...
A
vN
(0)
1+
s
e
HN
|
\




|
.
|
|
|
|

A
v
(0)=A
v1
(0)A
v2
(0)...A
vN
(0)
Bandwidth of the cascade
amplifier is the frequency at
which gain is reduced by -3
dB from its low frequency
value.

A
v
( je
H
) =
A
v1
(0)A
v2
(0)...A
vN
(0)
2
For identical stages,

A
v
( je
H
) =
A
v1
(0)



(

(
N
2
e
H
=e
H1
2
1/ N
1
Chap 11-54
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Frequency Response of Cascaded
Amplifiers: Example
Problem: Calculate gain and
bandwidth of a 2-stage
amplifier with


Approach: A
v
= A
v1
A
v2

Find A
v
(0), apply definition of
bandwidth to find f
H
.
Analysis:

A
v1
=
500
1+
s
2000
A
v2
=
250
1+
s
4000

A
v
(s)=
125,000
1+
s
2000
|
\


|
.
|
|
1+
s
4000
|
\


|
.
|
|
A
v
(0)=(500)(250)=125,000 or 102 dB

A
v
( je) =
1.2510
5
1+
e
2
2000
2
1+
e
2
4000
2
e
H
is defined by


A( je
H
) =
A
mid
2
=
A
v
(0)
2
=
1.2510
5
2
1+
e
2
2000
2
|
\




|
.
|
|
|
|
1+
e
2
4000
2
|
\




|
.
|
|
|
|
=2 f
H
=267 Hz
Bandwidth of the cascaded amplifier is
less than that of the individual stages.
Chap 11-55
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Large Signal Limitations
Slew Rate and Full-Power Bandwidth
Slew rate: Maximum rate of change of
voltage at output of op amp. Typical
values range from 0.1V/s to 10V/s.







For given frequency, slew rate limits
maximum signal amplitude that can be
amplified without distortion.

v
O
=V
M
sinet
dv
O
dt
max
=V
M
coset
max
=V
M
e
For no signal distortion,


Full-power bandwidth is highest
frequency at which a full-scale
signal can be developed.

V
M
esSR
V
M
s
SR
e

f
M
s
SR
2tV
FS
Chap 11-56
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
Operational Amplifier Macro Model for
Frequency Response
Macro Models are simplified circuit representations that model terminal behavior of
op amps and attempt to include all non-ideal limitations of op amps - A large number
of parameters can be adjusted to model op amp behavior.
To model single-pole roll-off, an auxiliary dummy loop (voltage-controlled voltage
source v
1
in series with R and C) is added to original 2-port.
RC product chosen to give desired -3dB point for open loop amplifier.


A
v
(s)=
v
o
(s)
v
1
(s)
=
A
O
e
B
s+e
B
for e
B
=
1
RC
Chap 11-57
Jaeger/Blalock
01/03/04
Microelectronic Circuit Design
McGraw-Hill
End of Chapter 11
Chap 11-58