Zebrev Interface Trap Extraction MIEL May 2012

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International Conference on Microelectronics International Conference on Microelectronics, , 15 15 May May 201 2012 2 gizebrev@mephi.ru gizebrev@mephi.ru
0
G
G
.
.
I.
I.
Zebrev
Zebrev
, E. A.
, E. A.
Melnik
Melnik
,
,
D.K.
D.K.
Batmanova
Batmanova
NATIONAL RESEARCH NUCLEAR UNIVERSITY MEPHI
NATIONAL RESEARCH NUCLEAR UNIVERSITY MEPHI
MOSCOW, RUSSIA
MOSCOW, RUSSIA
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1
OUTLINE
Introduction
Physics of Interface Traps in FETs
Extraction Procedure
Unresolved Problems
Conclusions
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2
Introduction
Graphene field
Graphene field
-
-
effect devices
effect devices
- Interface Traps Problem is Unavoidable
Scourge of all Field-Effect Devices
- Interface Traps in FETs determine a shape
of:
- Transfer I-V transfer characteristics
(transconductance and field-effect
mobility)
- Low-frequency C-V gate
characteristics
The purpose is characterization of interface trap
energy density based on low-freq C-V curves
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3
INTERFACE TRAPS
C
it
=e
2
D
it

Interface Trap DOS
(localized carriers)
c
t

E
F

C
Q
=e
2
dn
S
/dc
F
Graphene DOS
(mobile carriers)
V
NP

Defect
level
Reversible carrier exchange
between graphene and interfacial
defects
E
F
V
NP
V
G
>V
NP
E
F

c
t

c
t

V
G
< V
NP
(a)

(a) (b)
++++++
-----------
V
G
GRAPHENE
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4
d
ox
GATE OXIDE
GRAPHENE
eV
G
>0
c
F
=
graphene
e(
gate

graphene
)
E
F
E
V
E
C
F
,
= const(x)
E
i
Chemical potential
INTERFACE TRAPS in GRAPHENE
& Si-MOS FETs
Main Differences for graphene:
Main Similarity: Occupancy of Interface traps is controlled
by the Fermi energy position at the interface
1. No depletion layer (stems from monolayer nature)
2. Huge role of quantum capacitance (stems from absence
of forbidden gap )
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5
GATE and CHANNEL capacitance in FEDs
1
1 1
GATE
G
G ox Q it
e N
C
V C C C
| |
| | c
= +
|
|
|
c +
\ .
\ .
ox Q
S
CH
G Q ox it
C C
e n
C
V C C C
| | c
=
|
c + +
\ .
1
G it
CH Q
C C
C C
= +
Gate Capacitance (from C-V exp-ts)
Channel Capacitance (from
I-V exp-ts )
Coincided at Cit = 0!
Similar but not the same!
1. Gate capacitance C
G
increases with C
it
(Input cap
increases)
2. Channel capacitance C
CH
decreases with C
it
,
transconductance g
m
and field-effect mobility degrade (+)
0
1
ox
ox
ox ox
C
d d
c c
=
Gate Capacitance is the quantity immediately
measured from C-V experiments and not C
ox
!
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COMPARISON OF CAPACITANCES
IN GFET AND MOSFETS
Quantumcapacitanceis
ahugeproblemin
graphene
A.Geim
2
S
Q
F
dn
C e
dc
| |
=
|
\ .
Quantum capacitance C
Q
similar to inversion layer cap in
Si-MOSFET which traditionally
ignored in Si electronics. Why?
C
IT
C
Q
in graphene
C
inv
in MOSFETs
Threshold in
MOSFET
No threshold in
GFET
C
inv
>> C
ox
C
ox
C
inv
<< C
D
,C
it
V
G
C
Q
too low in subthreshold
compared to C
it
C
depl
in Si-
MOSFETs
C
Q
too large above threshold
compared to C
ox
Due to zero bandgap the C
Q
in
graphene is always
comparable with C
D
,Cit
and cannot be ignored in
equivalent circuit
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BERGLUND TECHNIQUE in GRAPHENE
( ) ( )
2 2
0
F
S
G NP it F
ox ox
e n e
e V V D d
C C
c
c c c = + +
}
( ) ( )
1
Q F it F
G
F ox
C C
dV
e
d C
c c
c
+
= +
( ) ( )
1
G
it ox Q
F
dV
C C C
d
c c
c
| |
=
|
\ .
( ) ( )
1
G
it ox D
S
dV
C C C
d
c c
| |
=
|
\ .
Si-MOS in subthreshold mode Graphene FET equivalent circuit
Berglund technique in Si-MOS
Depletion layer
cap
Quantum cap
Berglund technique in graphene
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Fermi energy as function of gate bias extracted
from low-frequency C-V curves
( )
( )
( )
/
/
1
G
NP
LF
V
G G
F G G
ox V
C V
V dV
C
c
| |
|
=
|
\ .
}
To obtain C
it
one needs to know
c
F
(V
G
)
The c
F
(V
G
) dependence extracted
immediately from experimental
low-freq C-V curve
The c
F
(V
G
) is simply square of the
shaded area
Numerical analysis yields:
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Results and Unresolved Problems
( )
8
0
( 1.0 10 / )
Q
C v cm s c =
( )
(exp)
G
Q it G
F
dV
C C C
d e c
+ =
Self-consistent description of C-V date from two independent
experimental groups imposes limitation on the lower magnitude of v
0
!
( )
it
C c
( )
8
0
( 1.3 10 / )
Q
C v cm s c =
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CONCLUSIONS
Low frequency C-V method of interface trap
density characterization in graphene field-
effect devices has been proposed
Similarities and differences between
graphene and silicon FETs are discussed
It was found that uncertainty in graphene
velocity numerical value directly influences
on uncertainty in interface trap density
spectrum

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