International Journal of Applied Engineering Research and Development (IJAERD) ISSN 22501584 Vol.

2, Issue 2 June 2012 1-18 TJPRC Pvt. Ltd.,

PID CONTROLLER BASED ELECTRIC VEHICLE USING FIELD PROGRAMMABLE GATE ARRAY
Atul Kumar Dewangan1, Sashai Shukla2 and Nibedita Chakraborty3
1

Department of Electrical Engineering, Kirodimal Govt. Polytechnic, Swami Chhattisgarh

Swami Vivekananda Technical University, Raigarh 496001, Chhattisgarh, India dewangan.atul@yahoo.in atul.dewangan@rediffmail.com 2 Department of Electronics and Telecommunication Engineering, Kirodimal Govt. Polytechnic, Swami Chhattisgarh Swami Vivekananda Technical University, Raigarh 496001, Chhattisgarh, India shukla.shashi46@gmail.com 3 Department of Computer Science Engineering, Kirodimal Govt. Polytechnic, Swami Chhattisgarh Swami Vivekananda Technical University, Raigarh 496001, Chhattisgarh, India

ABSTRACT
Direct Current motors, specifically the shunt motors are popular these days for electric vehicles. The speed of the motor has to be controlled, which in turn controls the vehicle dynamics to run the vehicle. Therefore, the main aim is to determine the motor speed, which drives the vehicle. In this regard, parameters such as acceleration, braking, energy status, gear and terrain are considered. This system, which functions as a closed loop system, also takes the motor speed as a reference along with the above-mentioned parameters to estimate the variation of the motor speed. This paper, advocates a novel approach to implement the fuzzy logic controller for speed control of electric vehicle by using FPGA.

KEY WORDS: FPGL, HDL, ADC 0808, PWM, Chopper

Bimal Kumar Mishra, Upendra Kumar & G. Sahoo

INTRODUCTION
Fuzzy Logic has been successfully applied to a large number of control applications. The most commonly used controller is the proportional-plusintegral-plus-derivative (PID) controller, which requires a mathematical model of the system. Fuzzy logic controller provides an alternative to PID controller since it is a good tool for the control of systems that are difficult in modeling. The control action in fuzzy logic controllers can be expressed with simple ifthen rules. Hardware implementation of the controller can be achieved in a number of ways to create new products. The most popular method of implementing fuzzy controller is using a general-purpose microprocessor or microcontroller. Generally, an 8-bit microprocessor can handle most of the necessary computations. Microprocessor based controllers are more economical and flexible, but often face difficulties in dealing with control systems that require high processing and input/output handling speeds. Rapid advances in digital technologies have given designers the option of implementing a controller on a variety of Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), etc. One of the hardware solutions is the ASIC, which is used in situations where high-speed operation is required, and is faster than general-purpose microprocessors. The disadvantage of ASIC is that no change can be made once the chip is created. Another hardware solution is the use of an FPGA, which is suitable for fast implementation and quick hardware verification. FPGA based systems are flexible and can be reprogrammed unlimited number of times.

ELECTRIC VEHICLE SYSTEM AND CONTROLLER

The major components of an electric vehicle system are the motor, controller, power source, charger for electric vehicle although other promising battery technologies are emerging in the horizon.

PID Controller based Electric Vehicle using Field Programmable Gate Array

Figure 1 : Block Diagram of Electric Vehicle The controller is needed for controlling the parameters of the vehicle, taking into consideration the overall performance of the vehicle. A DC shunt motor is used, in which the field windings and the armature may be connected in parallel across a constant voltage supply. In adjustable speed application as it is used in electric vehicle the field is connected across an independent adjustable voltage supply. Since the motor is of primary importance to the electric vehicle system, the determination of the speed of the motor for the various terrains is considered here. FIELD PROGRAMMABLE GATE ARRAY (FPGA) A Field Programmable Gate Array is a digital integrated circuit that can be programmed to do any type of digital function. There are two main advantages of an FPGA over a microprocessor chip for controller:1) An FPGA has the ability to operate faster than a microprocessor chip. 2) The new FPGAs that are on the market will support hardware that is upwards of one million gates. FPGAs are programmed using support software and a download cable connected to a host computer. Once they are programmed, they can be disconnected from the computer and will retain their functionality until the power is removed from the chip. The FPGAs can be programmed while they run, because they can be reprogrammable in the order of microseconds. This short time means that the system will not even sense that the chip was reprogrammed and there may be a

Bimal Kumar Mishra, Upendra Kumar & G. Sahoo

small waiting period, but the system will not have to be shut down. The FPGA consists of three major configurable elements: 1. Configurable Logic Blocks (CLBs) arranged in an array that provides the functional elements and implements most of the logic in an FPGA. 2. Input-output blocks (IOBs) that provide the interface between the package pins and internal signal lines. 3. Programmable interconnect resources that provide routing path to connect inputs and outputs of CLBs and IOBs onto the appropriate network.

HARDWARE DESCRIPTION LANGUAGES (HDL)

HDL describes how hardware behaves. There are two main differences between traditional programming languages and HDL: 1. Traditional languages are a sequential process whereas HDL is a parallel process. 2. HDL runs forever whereas traditional programming languages will only run if directed. A digital design can be created using schematic digital design editor that uses graphic symbols of the circuit or by using hardware description languages such as Verilog, Very High Speed Integrated Circuit hardware description language (VHDL). One of the key features of using VHDL is that it can be used to achieve all the goals for documentation, simulation, verification and synthesis of digital designs, thus saving a lot of effort and time. VHDL can be used to model a digital system at many levels of abstraction, ranging from the algorithmic level to the gate level. The VHDL language can be regarded as an integrated amalgamation of the following factors, such as, Sequential language + Concurrent language + Net-list language + timing-specifications + waveform generation language = VHDL. Therefore, the language has constructs that enable one to express the concurrent or sequential behavior of a digital system with or

PID Controller based Electric Vehicle using Field Programmable Gate Array

without timing. In this paper, the implementation of the controller on a FPGA using VHDL is presented.

IMPLEMENTATION OF FPGA CONTROLLER

The design of the controller consists of an FPGA, analog-to-digital converter & toggle switches for the inputs, motor and LCD for the input. A block diagram for the controller is shown in Figure 2.

Figure 2 : Block Diagram of the controller with FPGA Hardware Futures The hardware consists of one 20 character by 4 line LCD screen, potentiometers for acceleration and braking, battery, ADC 0808, motor, IR sensor, PWM driver circuit and five toggle switches. Figure 3 shows the hardware interface for the design. To get the acceleration data, a 47K potentiometer is used. Likewise, another potentiometer is used to get the brake data. A lead acid battery of 12V 7.5 AH is used to give the power supply to the whole module. A voltage regulator circuit is used to provide the 5V that is needed from the 12V available to other components in the circuit. The voltage for the motor (12V) is taken directly from the battery and a voltage regulator circuit is used to step down the 12V to 5V in order to drive the Xilinx, ADC and LCD components. The ADC 0808 is an 8-channel, 8-bit analog to digital converter from National Semiconductor. Its operating voltage is 5V DC with 100s conversion times. A 12V DC motor of 2400 rpm is used. In total five

Bimal Kumar Mishra, Upendra Kumar & G. Sahoo

toggle switches are used; three switches are used for the gear selection. Among the eight combinations, 000 represents neutral, 001 is for 1st, 010 is for 2nd, 011 is for 3rd, 110 is for 4th, 101 is for reverse gear and the other left out combinations remain unused. Another two switches are for terrain (00-smooth, 01-rough, 10-uphill, and 11-downhill) selection. The speed of the motor will differ for each terrain based on the other inputs. A separate battery charger circuit is designed using bridge rectifier and LM317 voltage regulator for the offline battery charging. A power supply circuit is designed using LM7805 voltage regulator to convert the 12V to 5V in order to drive the Xilinx, ADC and LCD components.

Figure 3 : Hardware Interface Data Acquisition Unit The data acquisition unit drives the ADC 0808 to get the crisp inputs (acceleration, braking & state of charge). The analog inputs are taken from potentiometers of from the battery. The analog values have to be converted into digital values before being given to the FPGA. Therefore, analog to digital converter (ADC 0808) chip is used. The ADC 0808 chip allows monitoring up to 8 different transducers using only one chip. Here, only three channels are used to get the acceleration, braking and state of charge of the battery. The 8 analog inputs channels are multiplexed and selected using the address pins A, B and C.

PID Controller based Electric Vehicle using Field Programmable Gate Array

The A, B and C address to select IN0 IN7 and activate ALE (Address Latch Enable) to latch in the address. START is for start of conversion. EOC is for End of Conversion and OE is for Output Enable (READ). The following steps are to be carried out for data conversion by the ADC 0808 chip: 1. Select an analog channel by providing bits to A, B and C addresses (000 acceleration, 001 braking and 010 for battery). 2. Activate the ALE (Address Latch Enable) pin. It needs an L to H pulse to latch inthe address. 3. 4. Activate START by an H to L pulse to initiate conversion. Check the EOC to see whether conversion is finished. H to L output indicates that the data is converted and is ready to be read. 5. An H to L pulse to the OE pin will read 8 bit data out. All the above steps have to be carried out at the 8 KHz clock frequency. Therefore, a VHDL clock divider module is written to generate the 8 KHz clock for the data conversion since the conversion time is approximately 100s. Figure 4 shows the signals, which are involved in the conversion of analog data to digital. Here, channel IN0 is used for the acceleration input, channel IN1 is used for braking, channel IN2 is used for the battery input and the remaining channels are left unused. Therefore, the multiplexing is done only for the first three channels.

Bimal Kumar Mishra, Upendra Kumar & G. Sahoo

Figure 4 : Interfacing of ADC 0808 with FPGA The generation of the control signals and addresses for the channel selection at the appropriate moments and reading the 8-bit digital data are coded in VHDL using the finite state machine. The Mealy type state machine is used. In this type of state machine, the outputs not only depend on the state of the machine but also on its inputs. This type of machine can be modeled by using two processes in VHDL coding, one process that models the synchronous aspect of the finite state machine and one that models the combination part. Implantation of Fuzzy Controller The components of the fuzzy controller for the DC motor are implemented in VHDL [6]. The specifications for the implementation of the FLC are; number of input variables = 6, number of output variable = 1, number of bits required to

PID Controller based Electric Vehicle using Field Programmable Gate Array

represent the input variables =8, number of fuzzy sets for the variables vary from 3 to 6 and all the variables use to non overlapping rectangular membership functions. The input parameters are 1) Speed 2) Acceleration 3) Braking 4) State of charge of battery 5) Gear and 6) Terrain. The output of the fuzzy system is the duty cycle of the PWM signal. In this controller design, the speed is taken in the range of 00-FF. The range is divided into three linguistic variables namely short, medium and high. The Gear is taken in the range of 0-6. The range is divided into five linguistic variables namely Neutral, 1st gear, 2nd gear, 3rd gear, 4th gear and Reverse. The State of charge of the battery is taken in the range of 00-FF. The range is divided into three linguistic variables namely low, normal and high. The Terrain is taken in the range of 1-4. The range is divided into four linguistic variables namely Smooth, Rough, Uphill and Downhill. The output parameter duty cycle of the PWM signal is taken in the range of 00-64. The range is divided into four linguistic variables namely very low, low, medium and high.

Figure 5 : Block Diagram of the fuzzy control scheme for DC motor The implementation process is subdivided into three components namely fuzzifier, rule base and defuzzifier. The complete structures of the fuzzy

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controller with other blocks are shown in figure 5. the function of the fuzzifier is to transform crisp inputs into fuzzy inputs. Crisp inputs for the accelerator, brake and battery are 8-bit binary value representing the current reading, 3-bit binary value for gear, 2-bit binary value for gear and stream of pulses for speed. The first step is to convert the crisp inputs to fuzzy inputs; for those, compare the crisp inputs with the membership function parameters of variables respectively. Rule evaluation is the second step of the fuzzy logic process, and determines what control action should occur in response to a given set of input values. A rule base for this system is created as shown in table 1, 2, 3, 4. Totally, there are 70 rules written for this design. Sample lists of rules are shown in the matrix format. The rule evaluation method used is min-max inferences, since it takes the minimum of the antecedents to determine rule strength and the maximum of the rule strengths for each consequent to determine fuzzy outputs. When Terrain Sm, Gear 4, Table 1 : Rule base for smooth terrain Speed/soc F M S VS When Terrain R ,Gear-4 Table 2 : Rule base for rough terrain Speed/soc F M S H H M L N M M L L L L L H H H M L N H M M L L M L L VL

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PID Controller based Electric Vehicle using Field Programmable Gate Array

VS When Terrain U, Gear-4

VL

VL

VL

Table 3 : Rule base for uphill terrain Speed/soc F M S VS When Terrain D, Gear-4 Table 4 : Rule base for downhill terrain Speed/soc F M S VS H M M L VL N M L L VL L L VL VL VL H M M L VL N M L L VL L L L L VL

Defuzzification is the last step in fuzzy logic process, which transforms the fuzzy outputs to crisp output based on the output membership function. In defuzzification, all significant outputs will be combined into a specific, comprehensive result to get crisp output. One of the most common defuzzification techniques called center of gravity or centroid method is used here.

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PWM Driver Unit In this unit, the output from the fuzzy controller to the motor is considered. The input to the motor can be given in terms of the pulse width modulation signal. Since this system has been designed as closed-loop, the feedback from the motor has to be taken. A feedback devices basic function is to transform a physical parameter into an electrical signal for use by a motion controller. Common feedback devices are encoders for position feedback, tachometers for velocity feedback, and accelerometers for acceleration feedback. Among the above-mentioned ways to measure the speed of the motor, the optical encoder technique is used here. The crisp output from the defuzzifier is given to the pulse width generator to generate the PWM signal to drive the motor. The motor is connected to the FPGA through the driver circuit as shown in figure 6. Actually, this PWM signal is given as a gate signal to the MOSFET in the drive unit, which in turn drives the motor, depending upon the duty cycle of the signal.

Figure 6 : Chopper and optical encoder circuit A totem pole transistor is used before the MOSFET to decide whether the MOSFET is to be turned on or off. Also, the direction of rotation (i.e.) clockwise or anticlockwise direction is decided by the control signal, which is generated by

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PID Controller based Electric Vehicle using Field Programmable Gate Array

the FPGA. When the gear is chosen to be reverse, then the control signal is set to 0 to make the motor rotate in the anticlockwise direction. Otherwise, this control signal is set to 1 for all other gears to make the motor rotate in clockwise direction. For achieving this operation, a relay coil with DPDT switch is used. For 100% duty cycle, the motor runs at its maximum speed and for 10%, it runs at its lowest speed. The PWM signal is generated with reference to the external clock signal. Since the motor is running at a speed of 100 Hz, the PWM signal is generated at this frequency. The on and off period of the PWM signal is varied with reference to the generated clock frequency. These feedback signals from the motor that are generated are then fed into the controller where pulses are counted based on the signals received and the speed is determined internally to decide the speed for the successive moments for the motor. Display Unit The function of the display unit is to display the terrain type, gear chosen, accelerator status, braking status, battery charge status and speed of the motor in Liquid Crystal Display (LCD). In order to display any information in LCD, first it has to be first initialized and then the data is sent. The one factor to be considered here is sending the information to LCD in terms of ASCII. So the LCD module has to change the decimal value to ASCII or std_logic_vector to ASCII respectively. Three control signals such as Enable, Register Select and Read/Write are generated from the FPGA and given to LCD. And, ASCII values are passed to LCD through 8-bit data lines. Figure 7 shows the interfacing of LCD with FPGA.

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Figure 7 : Interfacing LCD with FPGA Here, 20 * 4 LCD display is used. To display any information in any row, the appropriate row address has to be selected and the cursor has to be removed there. The cursor address for this LCD is given below. 80 81 82 . 93 ---- 1st row C0 C1 C2 D3 ---- 2nd row 94 95 96 ..A7 ---- 3rd row D4 D5 D6 E7 ---- 4th row To initialize the LCD, the following steps have to be carried out for the initialization process, waiting for required period of time after the execution of each step. 1. 2. 3. 4. 5. Send 38h to LCD for function set Send 0Eh for display on and cursor on Send 01h for clear display Send 1Ch for shift the entire display to the right Send 02h for return home

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PID Controller based Electric Vehicle using Field Programmable Gate Array

Then, send the row address to LCD and the information to display. The required clock for this module is generated internally with reference to the external clock. OBSERVATION FROM THE CONTROLLER All the modules are integrated and synthesized using Xilinx project navigator and support tools. The synthesized VHDL source code is placed and routed. Finally, a bit file is created. This bit file is programmed into the Xilinx XC2S300E-6PQ208 FPGA and interfaced with the input and output devices. Table 5 shows the synthesis report of the controller. The motor has been tested for various terrain and various gears conditions. Here, initially, the system is in neutral gear, smooth terrain type, with the available battery status, no acceleration and braking. To start the system, choose 1st gear and the motor runs at the minimum speed. Then proceed by changing the gear for increasing the speed. The vehicle can switch over from one terrain to another terrain by setting the terrain thumb wheel switch position appropriately. Similarly moving the switch position also carries out gear switching. The module has been checked for various input conditions. Some of the cases are listed below. Table 5 : Synthesis report of the controller Specification of the Drive Used by this Xilinx XC2S300E FPGA Number of CLBs used Number 4 input LUTs Number of IOBs Number of gates used for design 1536 6144 142 300000 757 2648 39 24585 design

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When Terrain is Sm, SOC is H, AA nil, BR nil, gear is 4th and speed is F then the output duty cycle is 100% and PWM signal generated for this output is given to the motor. The feedback from the motor is measured through CRO as shown in figure 8. From the figure, it is inferred that it took 28ms to complete one revolution. Now in this condition, the motor is running at the speed of 2127rpm.

Figure 8 : Pulses from the motor for 100% duty cycle input When the input parameters Terrain is R, SOC is H, AA M, BR nil, gear is 3rd and speed is M then the output duty cycle is 65% and PWM signal generated for this output is given to the motor. The feedback from the motor is measured through CRO as shown in figure 9. From the figure, it is inferred that it took 41.4ms to complete one revolution. Now in this condition, the motor is running at the speed of 1450rpm. By using this controller, the motor has been controlled to go at the maximum speed of 2127rpm for smooth terrain, 1725rpm for rough terrain, 1345rpm for uphill terrain and 1161rpm for downhill terrain.

Figure 9 : Pulses from the motor for 65% duty cycle input

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PID Controller based Electric Vehicle using Field Programmable Gate Array

CONCLUSIONS AND FUTURE WORKS

The real time implementation of the fuzzy logic controller for the various driving conditions and terrains has been achieved on a Xinlinx Spartan 2E FPGA using VHDL. This controller has been implemented for four different types of terrains. The implementation of this controller for the fuzzy module along with other blocks such as ADC and LCD in the closed-loop control system of a DC motor is performed. Further progress in the controller is, in the development of controller for battery monitoring that could alarm the state of charge (SOC) and time of recharge.

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REFERENCES [1] Pee C.C.(1991), Fuzzy logic in control system: Fuzzy logic controller part I and part II,IEEE transactions on ystems, man and cybernetics, Vol. 20, No. 2, pp 44 56. [2] Mahmoud A. Manzoul and D. Jayabharathi (1995), FPGA for fuzzy controllers, IEEE transactions on systems, man and cybernetics, vol. 25, No. 1, January. [3] Wing-Du Pzou and Hau-Jean Hsu,(1997), FPGA realization of SpaceVector PWM control IC for three-phase pwm inverters, IEEE transactions on power electronics, Vol. 10, No. 6,Novemeber. [4] Laniel Carrica, Macros A. Funes, and Sergio A. Gonzalez, (2003) Novel stepper motor controller based on FPGA Hardware Implementation, IEEE/ASME transactions on mechatronics, Vol. 8, No. 1, March.. [5] Siels D. Schouten, Mutasim A. Salman, and Naim A. Kheir,(2003) Fuzzy Logic control for parallel Hybrid Vehicles, IEEE transactions on Control Systems Technology, Vol. 10, No. 3, May. [6] Q.Dhasker, VHDL Primer, Addison Wesley Longman Singapore Pte Ltd, Third edition. [7] Michael John Sebastian Smith ,(2003) Application-Specific Integrated Circuits, Pearson education inc.. [8] Muhammad Ali Mazidi and Janice Gillispie Mazidi, The 8051 Mircocontroller and embedded systems, Pearson eduction inc. [9] Xilinx Inc, Xilinx Software manuals online, support.Xilinx.com

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PID Controller based Electric Vehicle using Field Programmable Gate Array

APPENDIX List of Abbreviations Used: VL L M H Sm R U D N F S VS Ne Re AA BR SOC Hz ms rpm Freq DRDT CRO Very Low Low Medium High Smooth Rough Uphill Down hill Normal Fast Slow Very Slow Neutral Reverse Acceleration Braking State of Charge Hertz milli seconds revolution per minute Frequency Double pole Double Throw Cathode Ray Oscilloscope