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Code No: 07A3EC03

Set No. 3

6. (a) Draw the ckt diagram of 4 bit ring ring counter using D ipops and explainits operation with the help of bit

pattern.(b) Dis tinguish b/w t ransition tabl e and excitati on table? [16] 7. Explain the following related to

sequential ckts with suitable examples.(a) St ate diagram(b) Stat e table( c ) S t a t e a s

s i g n m e n t . [ 1 6 ] 8. (a) For the given control state diagram obtain its equivalent ASM

chart.(b) Desig n control logic circuit as shown in gure 8b using multiplexers. [8 +8]Figure 8b

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Code No: 07A3EC03

Set No. 4
II B.Tech I Semester Reg ular Examinatio ns,

November 2008 SWITCHING THEORY AND LOGIC DESIGN( Common to Electrical & Electronic

Engineering, Electronics &Instrumentatio n Engineering, Bio-Medical Engineering, Electronics &Control

Engineering, Electronics & Computer Engineering andInstrumentat ion & Control Engineering)T i m e : 3

h o u r s M a x M a r k s : 8 0 Answer any FIVE QuestionsAll Questions carry equal marks

1. (a) Explain the 7 bit Hamming code.(b) A rece iver with even parity Hamming code

is received the data as 1110110.D e t ermine th e correct code. [1 0 + 6 ] 2. (a) St ate and prove

the following Boolean laws:i. Commut ativeii. Associativeiii. Distributive.(b) Find the complement of

the following B oolean functions and reduce the m tominimum number of literals:i. (bc+ ad) (ab +

cd)ii. bd + abc + acd + abc(c) Which gate can be used as parit y checker? W hy? [6+8+2] 3 . (a) List the

Boolean function simplication rules in the Kmap(b) Simplif y the following Boolean function for

minimal SOP form using Kmapand implement using NAND gates.F ( W , X , Y,Z) = (1, 3,7,11,15)

+ d(0,2,5) [ 4 + 1 2 ] 4. Design a combinational circuit that converts a decimal digit from 2,4,2,1

code to8 , 4 , - 2 , 1 c o d e . [ 1 6 ] 5. (a) The following memory units

are specied by the no of words times the numberof bits per word. How many address lines

and inputoutput data lines areneeded in each case?i. 4K

16ii. 2G

8iii. 16M

32iv. 256K

64.(b) Give the numb er of bytes sto red in the mem ories listed ab ove. [16]6. (a)

Distinguish between a state table and a ow table?1 of 2

Code No: 07A3EC03

Set No. 4
(b) Draw the logic diagram and write functional of
table

an SR latch using NANDg a t e s . Explain the oper ation. [1 6 ] 7. For the given minimal

state table:(a) Give proper assignment.( b ) And design the circuit u sing D Flip-

ops. [6+10 ] Present Stat e Next state, out putX=0 X= 1 X=0 X =1 ( Z)


q

q
2

q
1

00
q
2

q
3

q
1

00
q
3

q
4

q
5

00
q
4

q
4

q
1

00
q
5

q
2

q
1

1 08. (a) How do you indicate moore outputs and mealy outputs in an ASM block.(b) Obtai n the ASM chart

for the following state transition.Start for State


T
1

; then if xy=00, go to
T

if xy=01, go to
T
3

; if xy=10 go to
T
1

; otherwise go to
T

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