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D D D D D D
3-Terminal Regulators Output Current up to 100 mA No External Components Internal Thermal-Overload Protection Internal Short-Circuit Current Limiting Direct Replacements for Fairchild A78L00 Series
1 2 3 4
8 7 6 5
NC No internal connection
description
This series of fixed-voltage integrated-circuit voltage regulators is designed for a wide range of applications. These applications include on-card regulation for elimination of noise and distribution problems associated with single-point regulation. In addition, they can be used with power-pass elements to make high-current voltage regulators. One of these regulators can deliver up to 100 mA of output current. The internal limiting and thermal-shutdown features of these regulators make them essentially immune to overload. When used as a replacement for a zener diode-resistor combination, an effective improvement in output impedance can be obtained, together with lower bias current. The A78L00C series is characterized for operation over the virtual junction temperature range of 0C to 125C.
AVAILABLE OPTIONS PACKAGED DEVICES TJ VO(NOM) (V) SMALL OUTLINE (D) PLASTIC CYLINDRICAL (LP) OUTPUT VOLTAGE TOLERANCE 5% 2.6 5 6.2 8 9 10 12 15 A78L02ACD A78L05ACD A78L06ACD A78L08ACD A78L09ACD A78L10ACD A78L12ACD A78L15ACD 10% A78L05CD A78L06CD A78L08CD A78L09CD A78L12CD A78L15CD 5% A78L02ACLP A78L05ACLP A78L06ACLP A78L08ACLP A78L09ACLP A78L10ACLP A78L12ACLP A78L15ACLP 10% A78L02CLP A78L05CLP A78L06CLP A78L08CLP A78L09CLP A78L10CLP A78L12CLP A78L15CLP
SOT-89 (PK)
CHIP FORM (Y) 10% A78L02Y A78L05Y A78L06Y A78L08Y A78L09Y A78L10Y A78L12Y A78L15Y
0C to 125C
D and LP packages are available taped and reeled. Add the suffix R to the device type (e.g., A78L05ACDR). The PK package is only available taped and reeled (e.g., A78L02ACPKR). Chip forms are tested at TA = 25C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
schematic
INPUT
20 k
OUTPUT 1 k to 14 k
1.4 k
absolute maximum ratings over operating temperature range (unless otherwise noted)
A78Lxx Input voltage VI voltage, A78L02AC, A78L05CA78L09C, A78L10AC A78L12C, A78L12AC, A78L15C, A78L15AC D package Package thermal impedance, JA (see Notes 1 and 2) Virtual junction temperature range, TJ Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds Storage temperature range, Tstg LP package PK package 30 35 97 156 52 0 to 150 260 65 to 150 C C C C UNIT V
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/JA. Operating at the absolute maximum TJ of 150C can impact reliability. Due to variations in individual device electrical characteristics and thermal resistance, the built-in thermal-overload protection may be activated at power levels slightly above or below the rated dissipation. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.
Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current Bias current change
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current Bias current change
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current Bias current change
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
Input voltage g regulation Ripple rejection Output voltage g regulation Output noise voltage Dropout voltage Bias current Bias current change
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current Bias current change
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current Bias current change
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current Bias current change
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
dB
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
electrical characteristics at specified virtual junction temperature, VI = 9 V, IO = 40 mA, TJ = 25C (unless otherwise noted)
PARAMETER Output voltage Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current VI = 4.75 V to 20 V VI = 5 V to 20 V VI = 6 V to 20 V, IO = 1 mA to 100 mA IO = 1 mA to 40 mA f = 10 Hz to 100 kHz f = 120 Hz TEST CONDITIONS A78L02Y MIN TYP 2.6 20 16 51 12 6 30 1.7 3.6 MAX UNIT V mV dB mV V V mA
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
electrical characteristics at specified virtual junction temperature, VI = 10 V, IO = 40 mA, TJ = 25C (unless otherwise noted)
PARAMETER Output voltage Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage VI = 7 V to 20 V VI = 8 V to 20 V VI = 8 V to 18 V, IO = 1 mA to 100 mA IO = 1 mA to 40 mA f = 10 Hz to 100 kHz f = 120 Hz TEST CONDITIONS A78L05Y MIN TYP 5 32 26 49 15 8 42 1.7 MAX UNIT V mV dB mV V V
Bias current 3.8 mA Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
electrical characteristics at specified virtual junction temperature, VI = 12 V, IO = 40 mA, TJ = 25C (unless otherwise noted)
PARAMETER Output voltage Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current VI = 8.5 V to 20 V VI = 9 V to 20 V VI = 10 V to 20 V, IO = 1 mA to 100 mA IO = 1 mA to 40 mA f = 10 Hz to 100 kHz f = 120 Hz TEST CONDITIONS A78L06Y MIN TYP 6.2 35 29 48 16 9 46 1.7 3.9 MAX UNIT V mV dB mV V V mA
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
electrical characteristics at specified virtual junction temperature, VI = 14 V, IO = 40 mA, TJ = 25C (unless otherwise noted)
PARAMETER Output voltage Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage VI = 10.5 V to 23 V VI = 11 V to 23 V VI = 13 V to 23 V, IO = 1 mA to 100 mA IO = 1 mA to 40 mA f = 10 Hz to 100 kHz f = 120 Hz TEST CONDITIONS A78L08Y MIN TYP 8 42 36 46 18 10 54 1.7 MAX UNIT V mV dB mV V V
Bias current 4 mA Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
electrical characteristics at specified virtual junction temperature, VI = 16 V, IO = 40 mA, TJ = 25C (unless otherwise noted)
PARAMETER Output voltage Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current VI = 12 V to 24 V VI = 13 V to 24 V VI = 15 V to 25 V, IO = 1 mA to 100 mA IO = 1 mA to 40 mA f = 10 Hz to 100 kHz f = 120 Hz TEST CONDITIONS A78L09Y MIN TYP 9 45 40 45 19 11 58 1.7 4.1 MAX UNIT V mV dB mV V V mA
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
electrical characteristics at specified virtual junction temperature, VI = 14 V, IO = 40 mA, TJ = 25C (unless otherwise noted)
PARAMETER Output voltage Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage VI = 13 V to 25 V VI = 14 V to 25 V VI = 15 V to 25 V, IO = 1 mA to 100 mA IO = 1 mA to 40 mA f = 10 Hz to 100 kHz f = 120 Hz TEST CONDITIONS A78L10Y MIN TYP 10 51 42 44 20 11 62 1.7 MAX UNIT V mV dB mV V V
Bias current 4.2 mA Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
electrical characteristics at specified virtual junction temperature, VI = 19 V, IO = 40 mA, TJ = 25C (unless otherwise noted)
PARAMETER Output voltage Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage VI = 14.5 V to 27 V VI = 16 V to 27 V VI = 15 V to 25 V, IO = 1 mA to 100 mA IO = 1 mA to 40 mA f = 10 Hz to 100 kHz f = 120 Hz TEST CONDITIONS A78L12Y MIN TYP 12 55 49 42 22 13 70 1.7 MAX UNIT V mV dB mV V V
Bias current 4.3 mA Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
electrical characteristics at specified virtual junction temperature, VI = 23 V, IO = 40 mA, TJ = 25C (unless otherwise noted)
PARAMETER Output voltage Input voltage regulation Ripple rejection Output voltage regulation Output noise voltage Dropout voltage Bias current VI = 17.5 V to 30 V VI = 20 V to 30 V VI = 18.5 V to 28.5 V, IO = 1 mA to 100 mA IO = 1 mA to 40 mA f = 10 Hz to 100 kHz f = 120 Hz TEST CONDITIONS A78L15Y MIN TYP 15 65 58 39 25 15 82 1.7 4.6 MAX UNIT V mV dB mV V V mA
Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-F capacitor across the input and a 0.1-F capacitor across the output.
10
APPLICATION INFORMATION
VI 0.33 F A78Lxx VO 0.1 F
+ VI
IN
A78Lxx COM
OUT IL
VO
Input
A78Lxx IO 0.33 F R2 R1
Output
0.1 F
Input 0.33 F
11
APPLICATION INFORMATION
1N4001
VO = 15 V
0.1 F
1N4001 VO = 15 V
1N4001
VI
VO
reverse-bias protection
Occasionally, the input voltage to the regulator can collapse faster than the output voltage. This can occur, for example, when the input supply is crowbarred during an output overvoltage condition. If the output voltage is greater than approximately 7 V, the emitter-base junction of the series-pass element (internal or external) could break down and be damaged. To prevent this, a diode shunt can be employed as shown in Figure 7.
VI
A78Lxx
VO
12
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