IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO.

2, FEBRUARY 1998

243

IV. CONCLUSION The algorithm described by Li was examined and found to be suboptimal. However, it performs well in the region up to 12-bit word lengths. Like the optimal MAG algorithm, it is an exhaustive search method, and is therefore time consuming. The general BHM algorithm is probably a more useful suboptimal algorithm due to its speed. REFERENCES
[1] A. G. Dempster and M. D. Macleod, Multiplication by an integer using minimum adders, in IEE Colloquium Math. Aspects Signal Processing, Dig. No. 1994/034, Feb. 1994, pp. 11/111/4. , Constant integer multiplication using minimum adders, Proc. [2] Inst. Elect. Eng., vol. 141, pp. 407413, Oct. 1994. [3] R. Bernstein, Multiplication by integer constants, Softw.Pract. Exp., vol. 16, pp. 641652, July 1986. [4] A. G. Dempster and M. D. Macleod, General algorithms for reducedadder integer multiplier design, Electron. Lett., vol. 31, pp. 18001802, Oct. 1995. [5] D. R. Bull and D. H. Horrocks, Primitive operator digital lters, Proc. Inst. Elect. Eng., vol. 138, pt. G, pp. 401412, June 1991. [6] A. G. Dempster and M. D. Macleod, Use of minimum-adder multiplier blocks in FIR digital lters, IEEE Trans. Circuits Syst. II, vol. 42, pp. 569577, Sept. 1995. , Use of multiplier blocks to reduce lter complexity, in Proc. [7] ISCAS94, London, MayJune 1994, vol. 4, pp. 263266. [8] A. G. Dempster, Digital lter design for low-complexity implementation, Ph.D. dissertation, Univ. Cambridge, England, June 1995.

Harmonic Distortion on Class CMOS Current Output Stages

Fig. 2. Programmable multiplier using four adders, redesigned to account for all topologies in Fig. 1.

G. Palmisano, G. Palumbo, and S. Pennisi

AbstractLinearity performance in class AB CMOS current output stages is discussed, and simplied equations are derived for the harmonic distortion. It was found that channel-length modulation and transistor mismatches are the main sources of distortion in current output stages. A novel high-performance class AB current output stage is also presented which is based on active-gain enhanced cascoded mirrors. It overcomes the nonlinearity caused by channel-length modulation and provides a very high output resistance. The linearity performance of the proposed circuit is only limited by the fundamental constraints due to transistor mismatches.

of graphs of cost-4 that Li searches before commencing the cost-5 search. Based on Lis Fig. 2, a hardware implementation of a four-adder multiplier, we present here in Fig. 2 the circuit that would synthesize all of the graphs in Fig. 1. This design requires eight shifts and eight switches, compared with Lis ve shifts and four switches. III. MULTIPLIERLESS DIGITAL FILTERS The motivation for Lis paper is to the reduce the complexity of digital lters with xed-point multipliers. For multiplierless digital lters, we have found that the graphical methods used above for single multipliers are equally applicable to the multicoefcient case [5][7]. This method exploits redundancy between the coefcients and has proved to be far more efcient in terms of adders than any other multiplierless methods we have studied [8], particularly those where products are produced by individual multipliers. The contribution made to overall complexity by the coefcient multiplications using this method is far less than that of the structural adders and delays. For instance, the example used by Li produces coefcients for an order-48 lter which requires 28 adders using discrete multipliers, designed using Lis method or the MAG algorithm, and only 16 adders using the RAG-n algorithm of [6].

I. INTRODUCTION Circuits based on the current-mode approach [1][6], such as current conveyors [7][10], operational oating conveyors [11], [12], operational oating ampliers [13], [14], current ampliers [15][20], etc. References [1][3] and [21][25] seem to have a better signal dynamic range and closed-loop bandwidth performance than conventional voltage ampliers [26][29]. Moreover, they are particularly suitable whenever the input source and/or the output are current
Manuscript received December 14, 1995; revised July 25, 1996. This paper was recommended by Associate Editor G. W. Roberts. The authors are with the Dipartimento Elettrico Elettronico e Sistemistico, Universit di Catania, I-95125 Catania, Italy (e-mail: a gpalmisano@dees.unict.it; gpalumbo@dees.unict.it; spennisi@dees.unict.it). Publisher Item Identier: S 1057-7130(98)01645-0.

10577130/98$10.00 1998 IEEE

244

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 2, FEBRUARY 1998

signals [30][32], and have the interesting feature of achieving a true multioutput circuit since several current output stages can be embedded. A critical, but often necessary, section in most analog integrated circuits with either the current or the voltage approach is the nal power section that has to drive low resistive loads. Current-mode power ampliers use a current output stage (COS) as a nal stage, which is the most critical block in the implementation of current ampliers. Indeed, while for low drive capability a class A COS can protably be used [33], when large current levels have to be supplied, a class AB COS is mandatory. Unfortunately, since it is not included within the feedback loop, it is the main source of nonlinearity. High-performance COSs must exhibit high output impedance and accurate current transfer; therefore, simple current mirrors cannot be employed. Cascode mirrors, instead, provide both high output resistance and linearity, but their poor current swing makes them impractical for high-current applications. Moreover, the low-voltage cascode current mirror rst proposed in [34] and further discussed in [35] does not provide a high dynamic range due to the xed bias voltage. Actually, the use of current mirrors with cascoded output is mandatory in the implementation of a COS. A COS has two main sources of nonideality which cause deviation from the ideal dc transfer characteristic and affect linearity: the channel-length modulation error of mirroring transistors, the mismatches of the mirror transistors. The channel-length modulation error of the mirroring transistors can be reduced by increasing their channel length. However, this means larger chip area and worse frequency response. Mismatches are due to transconductance gain  and threshold-voltage tolerances in the mirroring transistors [37][39]. They give the ultimate limit to the COS linearity, and can only be reduced by a careful layout design. In the COS based on cascoded mirrors which is shown in Fig. 1(a), the channel-length modulation still limits the linearity which is primarily affected by a third-order harmonic distortion. A rst solution to reduce it was that of using the cascoded mirror with dynamic matching, shown in Fig. 1(b), as proposed in [12]. It exhibits a reduced nonlinearity by a factor of 2. A better solution to reduce the harmonic distortion due to channel-length modulation is achieved by implementing the COS with the current mirror with improved dynamic matching shown in Fig. 1(c) and proposed in [36]. However, close investigation reveals that while third-order harmonic distortion is minimized, a second-order harmonic distortion appears normally negligible in the other topologies. This is dependent on the mismatches of the n- and p-transistor threshold voltages, and if a twin-tub process is not used, it is further increased by the body effect. Therefore, the linearity could be still unsatisfactory for a high-performance current amplier. In this paper, after an analytical determination of the harmonic distortion in the COSs shown in Fig. 1, a novel COS is presented which exhibits better linearity performance than that of previously presented solutions. The harmonic distortion due to channel-length modulation is reduced by a gain stage, and its value is pushed down to the fundamental limitation caused by mismatch errors. This limitation is evaluated, and analytical results are compared with SPICE simulations.

(a)

(b)

(c) Fig. 1. Current output stages: (a) cascoded, (b) cascoded with dynamic matching, and (c) cascoded with improved dynamic matching.

is suggested in [45], and has been rearranged for class AB COSs in Appendix A. A. COS Based on Cascoded Mirrors The COS with cascoded mirrors is shown in Fig. 1(a). Without loss of generality, we only consider the n-type cascoded mirror A (i.e., MA1MA3), and assume transistors MA1MA3 to be ideally matched and to have the same transconductance gain (i.e., the same aspect ratio W=L). VDS , which is set by MA3 and VGA must (VDS = VGS ) in order be set equal to the voltage VGS to guarantee in quiescent conditions an accurate matching between MA1 and MA2. The value of VGA which provides such a condition is given by

II. HARMONIC DISTORTION DUE TO CHANNEL-LENGTH MODULATION Let us evaluate the harmonic distortion due to the channel-length modulation in the previously proposed COSs which are shown in Fig. 1. Most commonly used approaches [40][44] are not suitable for class AB ampliers operating in large swing conditions since the two half circuits work alternately. A useful approach for such circuits

VGA

VDS

+ VGS

 2VTN + 2 =

IQ N

(1)

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 2, FEBRUARY 1998

245

where IQ is the quiescent current. Hence, it follows that

iA 2 =

1 + N (VGA

1 + N vGS 2 pN 

0 vGS

TABLE I TRANSISTORS MA1, MA2, MA3 MA4 MA5, MA6 MA7, MA8 MB1, MB2, MB3 MB4 MB5, MB6 MB7, MB8 W/L 600/1.5 200/1.5 60/1.5 60/3 1500/1.5 20/1.5 150/1.5 20/3

iA1

 =
N (VT N

1+

IQ 0 iA1
1 + N

VT N +

iA1 N

iA1 :

(2)

Taking the derivative of iA2 with respect to iA1 and, since the term iA1 =N ) is usually much lower than 1, we obtain +

@iA2 @iA1

2  1 + pN =

IQ 0

3 2

iA1 :

(3)

M B 1MB 3, and assuming the transconductance gain to be equal for both current mirrors (i.e., N = P =  ), HD2 and HD3
are calculated from (A3) and (A4) of Appendix A:

Following the same steps for the p-type current mirror

 HD2  N =  HD3  N =

0 P
4 + P 8

IQ  IQ 

3 2

IM IQ IM IQ

01

(4a)

01

Considering current mirror A, transistors MA1M A3 implement a cascoded mirror and transistor MA4 is a common drain performing the same function as in Fig. 1(b). But a current proportional to that of the output branch is now replicated in MA5MA7 and supplied to MA4 by means of the current mirror MA7MA8.1 Unlike the circuit in Fig. 1(b), with a proper design, the gatesource voltage of MA4 follows that of MA3, and hence, the drainsource voltage of MA2 accurately matches that of MA1, even for large input currents. Assume the current mirror MA7M A8 to be ideal, and set

(4b)

VSG

VGS

0VT P

where IM is the magnitude of the sinusoidal input current. Harmonic distortions HD2 and HD3 are dependent upon the relative magnitude of the input signal and N and P . As expected from current mirrors with ideally matched transistors and equal transconductance gain, the even-order harmonic distortion is very low. Indeed, it is proportional to the difference between the two channel-length modulation parameters. Therefore, third-order harmonic distortion is the dominant contribution which can be reduced by increasing the transconductance gain and/or the channel length of the transistors. It should be noticed that with a single-well technology, threshold voltages are affected by the body effect, but this effect is a second-order source of nonlinearity and can be neglected. B. COS Based on Cascoded Mirrors With Dynamic Matching The rst circuit solution to reduce harmonic distortion in COS due to channel-length modulation was presented in [12] and is shown in Fig. 1(b). Thanks to the common drain MA4 (MB 4), the gate voltage of the common-gate transistor MA3 (MB 3) follows the gate (VDS ) constant. voltage of MA1 (MB 1), thus keeping VDS This improves the linearity performance since a better dynamic matching between MA1 (MB 1) and MA2 (MB 2) is achieved. = VGS (i.e., 0VT P + IA =P = VT N + Setting VSG IQ =N ); MA1 and MA2 are matched in quiescent conditions, and we get

IQ nP

VT N

IQ N

(6)

where n = A2 =A5 = A3 =A6 , and IQ =n is the bias current of MA4. Transistors MA1 and MA2 are matched in quiescent conditions, and the output current can be approximated by

iA2  [1 + N (jVT P =

j 0 VT N

)]iA1 :

(7)

There is only a gain error which is very low if the threshold voltages are about equal. A similar equation holds for the p-type mirror. Since iA2 and iB2 are linearly related to iA1 and iB1 , respectively, the approach discussed in Appendix B has been adopted. It gives only even harmonics with

HD2  =

jVT P j 0 VT N ) 0 P (VT N 0 jVT P j)]  (N + P )(jVT P j 0 VT N ) (8) = 3

3 2 2 [N (

which is proportional to the channel-length modulation coefcients and to the differences between VT N and VT P . Moreover, unless we use a twin-tub process, the differences between VT N and VT P depend on the body effect, and can heavily reduce the linearity. D. Simulation Results In order to evaluate the accuracy of the proposed analysis, the circuits in Fig. 1 [for simplicity, we refer to them as circuits (a), (b), and (c)] were used as the output stage in a current buffer (like that used in [36]), which was simulated using SPICE and the model parameters of a 1.2-m CMOS process. They were biased with a current IQ equal to 200 A using the transistor aspect ratios in Table I. The calculated and simulated harmonic distortions of the short-circuit output current for a relatively low-frequency input signal of 100 kHz are shown in Fig. 2. It is apparent that THD decreases from circuit (a) to (c). Moreover, as expected, the THD of circuit (b) is about half that of circuit (a) (i.e., 6 dB better), and according to (8), the THD of circuit (c)2 is almost independent of the signal amplitude. For the hand calculations
1 A positive-feedback exists which involves transitors MA6MA8, but its loop gain 1=(gmA4 rdA5 ) is much lower than 1. 2 Where a twin-tub process was assumed since bulk was connected with source.

iA2 =

1 + N (vGS

1 + N vGS

+ vSG

0 vGS p

iA1 iA1 :
(5)

 =

1+

N p

IQ 0 iA1 VT N +

N 1 + N

Comparing (2) and (5), the transfer error is reduced by a factor of 2. Hence, HD2 and HD3 are also reduced by a factor of 2. C. COS Based on Cascoded Mirrors With Improved Dynamic Matching Recently, an improved COS was proposed which is based on cascoded current mirrors with improved dynamic matching [36]. It is shown in Fig. 1(c). The current mirrors MA1M A8 and MB 1MB 8 provide a nominally zero transfer error.

246

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 2, FEBRUARY 1998

Fig. 2. Harmonic distortion due to channel-length modulation versus the ratio of input current IM to quiescent current IQ for circuits a), b), and c).

Deriving (9) and neglecting the 2 terms, we get

@iA2 @iA1

@vDS  1 + N @iA1 =

1 + N vGS

0 @vGS1 @iA
@vGS

@iA1 +

iA1 1 + N vGS :

:
(10) (11)

The amplier A1 establishes the following relationship:

@vDS @iA2 @iA1

1+A

1 0 1 + A @vGS

Substitution of (11) into (10) yields

1+ =

(1 + A)

where the terms N vGS Following the same calculation for the p-type current mirror, and assuming the transconductance gain for both current mirrors to be equal, it follows from (A3) and (A4) of Appendix A that the harmonic distortions HD2 and HD3 of the output current are given by
Fig. 3. Proposed current output stage.

N A1 and @vGS =(1+ A) have been neglected.

N

pIiQ 0 2piA1

(12)

HD2  = HD3  =

8(1 + A)

N

0 p P

2IM

pI0 IQ
M
2

(13a)

of HD, N , and P were set to 0.012 A/V2 , and the values of the threshold voltages and channel-length modulation coefcients were extracted from the model parameters. It was found that N  0:04 = V01 ; P  0:05 V01 , and VTN 0 jVT P j  100 mV. In addition, it = = is conrmed that HD3 is the main distortion component for circuits (a), (b), and HD2 for circuit (c). A very good agreement between the calculations and simulations for all of the circuits was observed.

24(1 + A)

N

+ P

IQ 

IM IQ

01

(13b)

HD2 and HD3 depend on the difference and the sum of N and P , respectively. However, the proposed topology provides a very low-distortion COS since HD2 and HD3 are greatly reduced by the
amplier gain. The harmonic distortion was simulated with SPICE, using the output stage in Fig. 3 in a current buffer (like that used in [36]), and employing a single-stage differential amplier for A1 and A2 whose gain is about 30. The simulated and calculated THD of the short-circuit output current is shown in Fig. 4. THD is better than 070 dB up to current signals 30 times higher than the bias current. It has to be pointed out that the THD in Fig. 4 are far from the typical THD performance of a real current amplier for two reasons. First, due to the nite loop gain, nonlinearity in the rst stage (usually implemented with a transimpedance amplier) has to be considered. Second, as discussed below, mismatch errors in the mirror transistors set the fundamental limitation of the COS linearity performance, and are the dominant sources of nonlinearity for the circuit in Fig. 3. However, unlike the circuits in Fig. 1, in the proposed COS, the contribution to THD due to channel-length modulation is negligible. IV. HARMONIC DISTORTION DUE TO MISMATCHES Let us consider the effects on harmonic distortion of threshold voltage and transconductance mismatches [37], [39]. Without loss of generality, we conne our analysis to the mismatch errors in a simple current mirror MA1MA2.

III. A VERY LINEAR COS The proposed COS is shown in Fig. 3. It is made up of two complementary active-gain enhanced mirrors which base their performance on a principle quite similar to that of the gain-boosting technique [46][48]. The two current mirrors are composed of transistors M A1M A3 and MB 1MB 3 and two auxiliary voltage ampliers A1 and A2, whose gains are both assumed to be equal to A. Thanks to A1 and A2, the drain voltages of MA1, MA2 and MB 1, MB 2 are almost equal, even for large input currents. Thus, a COS with high linearity performance is achieved. Moreover, the use of A1 and A2 also provides a very high output resistance given by ro  (gm rd rd A)j j(gm rd rd A). = Considering the n-type current mirror, we can write

iA2 =

1 + N

vDS

1 + N vGS

0 vGS

iA1 :

(9)

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 2, FEBRUARY 1998

247

Fig. 4. Harmonic distortion due to channel-length modulation versus the ratio of input current IM to quiescent current IQ for the proposed circuit.

A. Mismatches of Threshold Voltage VT Neglecting the channel-length modulation and any other source of nonlinearity, except that caused by mismatches in VT , we can write

iA 2 =

(14) where VTN and VTN are the threshold voltages of M A and MA , respectively, and where VTN VTN 0 VTN is the threshold mismatch. Deriving (14), we get

vGS vGS

0 VTN 0 VTN

iA1 = N

1VTN +

iA1 N

Following the same steps for the p-type current mirror, dening its VTP 0 VTP , and assuming the threshold mismatch as VTP P ), from (A3) transconductance gains to be equal (i.e.,  N and (A4) of Appendix A, we have

@iA2 @iA1

= 1 + 1VTN =

N : iA1

(15)

is independent of the signal amplitude, and is proportional to the difference between the transconductance mismatches. The third-order harmonic distortion is about equal to zero according to (A4). Comparisons between simulations and calculations are shown in Fig. 6. Three curves are plotted for different values of the percentage error  in the worst case condition, which is dened by setting either N or P equal to zero. The absence of third-order harmonic distortion is conrmed since the simulated THD is about equal to the calculated HD2 which is underestimated by less than 0.5 dB. From Figs. 5(a), 5(b), and 6, it is apparent that the distortion caused by mismatches cannot be neglected. This is obviously true not only for the proposed low-distortion COS, but also for circuits (a), (b), and (c) in which all of the different contributions to distortion are of the same order.

1 1

V. CONCLUSION In this paper, simple equations for the hand calculation of harmonic distortion in class AB CMOS current-mode output stages have been determined. They are based on the transcharacteristic of the two complementary current mirrors which implement the COS. Simulations have been performed which are in good agreement with the analytical results. Channel-length modulation and mismatch errors have been found to be the source of distortion of COSs. The distortion due to channel-length modulation can be reduced by adopting proper circuit solutions, while that due to mismatches is a fundamental limitation of current-mode circuits. Mismatch errors similarly affect any topology, and can only be reduced by a careful layout design. A novel COS is also proposed which greatly reduces the effect of channel-length modulation and makes it negligible. It is based on two complementary active-gain enhanced mirrors. As a nal remark, it is worth noting that, unlike voltage-mode ampliers, in current-mode ampliers, the dependence of the overall linearity on the mismatches of the output stage does not allow the use of such circuits in applications where high linearity performance is needed. APPENDIX A HARMONIC DISTORTION FOR CLASS AB COS Let us consider the output stage of a current amplier, and assume a sinusoidal input current iin IM !t . Neglecting power terms higher than third-order ones, the output current iout t can be expressed as

1 8 1 HD3 = 24
HD2 =

 (1VTN 0 1VTP ) IM 

(16a) (16b)

1 pI 0 1 I
M

(1VTN + 1VTP ): 1 =1 1

In order to establish the accuracy of (16a) and (16b), SPICE simulations and the results calculated from (16) are shown in Fig. 5. In the evaluation of the harmonic distortion components, VTN 0 VTP is chosen to estimate HD2 and VTN VTP to estimate HD3 . Three curves are plotted for different values of the percentage error VT versus the input current normalized to the bias current. It is conrmed that HD2 or HD3 are the main distortion components in one of the two cases, and THD is predicted with a maximum error of 4.5 dB. The slight deviation between the calculated and simulated curves is due to the mobility degradation effect that was neglected in our analysis. Indeed, since the surface mobility depends on the gatesource voltage, the transconductance parameter  cannot be assumed to be constant, as has been done.

B. Mismatches of Transconductance Parameter  A second mismatch error which gives rise to harmonic distortion is the mismatch of the transconductance gain of the mirror transistors. Let NA1 and NA2 be the transconductance gains of MA1 and MA2 , and let us neglect any other source of error. Since the output current N =N iA1 , considering also the p-type is given by iA2 current mirror, from (B3) of Appendix B, it follows that

=(

sin( )

()

are the transconductance mismatches. The second-order harmonic distortion

1 N 0 P 8 N P where 1N = N 0 N
HD2  =

 1 j1N j 0 j1P j = 8 N P and 1P = P 0 P

(17)

iout (t) = a0 + a1 iin + a2 i2 + a3 i3 (A1) in in where parameter a0 is an offset current and the parameter a1 is
dened by the mirror ratios since around the quiescent point is

1iA1 = 01iB1 = iin =2.

248

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 2, FEBRUARY 1998

(a)

(b) Fig. 5. (a) Second-order harmonic distortion due to thresholdvoltage mismatches versus the ratio of input current IM to quiescent current IQ for the proposed circuit. (b) Third-order harmonic distortion due to thresholdvoltage mismatches versus the ratio of input current IM to quiescent current IQ for the proposed circuit.

Fig. 6. Harmonic distortion due to transconductancegain mismatches versus the ratio of input current IM to quiescent current IQ for the proposed circuit.

Parameters a2 and a3 can be calculated according to the approach proposed in [8], assuming the following approximation for the behavior of the class AB COS:

H D3

= =

1 1 a3 2 2 a3 IM IM = 4 a1 4 1 24 1 24

A1 = iin ; iB 1 = iin ;
i

for iin for i

 Q in  0 Q
I I

(A2)

A2 A1 I @ iA2 @ iA1 I
@i @i

B2 B1 I @ iB 2 @ iB 1 I
@i @i

02 0

a1

@i @i

A2 A1 I

@i @i

B2 B1 I
(A4)

where IQ is the quiescent current of the output branch. Taking the derivative of iout with respect to iin , evaluated at the maximum and minimum input signal (+IM and 0IM ), H D2 and H D3 are given by
H D2

where a mirror ratio equal to 1 has been assumed (i.e., a1 = 1). APPENDIX B ACCURATE DETERMINATION

= =

1 a2 1 a2 IM IM = 2 a1 2 1 8
@i @i

OF

H D2

A2 A1 I

@i @i

B2 B1 I

(A3)

In class AB COSs in which the two current mirrors have transfer gains independent of the input signal but with different values, the odd harmonic distortions are zero, and the even ones can be determined

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 2, FEBRUARY 1998

249

by applying the exact method described below. Actually, in these cases, this method is much more accurate than the one in Appendix A which has been found to lead to an error of about 4.5 dB. Again, consider a sinusoidal input signal with amplitude IM , and assume an ideal class B operation with different gains a1 , b1 for the two half waves. Current iA2 and iB 2 can be expressed as

iA2 = a1 iA1 = iB2 = b1 iB1 =

0;

for 0 < t < for

T
2

0a1 iin ;

T b1 iin ; for 0 < t < 2 T 0; for < t < T.

2

<t<T

(B1a)

(B1b)

By expanding iA2 and iB 2 in Fourier series and neglecting the even higher order terms, we get

iout = iB2 0 iA2 = 1 (a1 + b1 )IM sin(!t) 2

+ 3 2 (b1

0 a1 )IM cos(2!t)
(b1

(B2)

which means, assuming a mirror ratio about equal to 1,

HD2 =

3

0 a1 ):

(B3)

REFERENCES
[1] C. Tomazou, F. Lidgey, and D. Haigh, Analogue IC Design: The Current-Mode Approach. London, U.K.: IEE, 1990. [2] B. Wilson, Recent developments in current conveyors and current-mode circuits, Proc. Inst. Elect. Eng., vol. 137, pt. G, pp. 6377, Apr. 1990. [3] C. Toumazou, F. Lidgey, and C. Makris, Extending voltage-mode op amps to current-mode performance, Proc. Inst. Elect. Eng., vol. 137, pt. G, pp. 116130, Apr. 1990. [4] Z. Wang, Current-Mode Analog Integrated Circuits and Linearization Techniques in CMOS Technology. Hartung-Gorre Verlag Konstanz, 1990. , Current-mode CMOS integrated circuits for analog computation [5] and signal processing: A tutorial, Int. J. Analog Integrated Circuits Signal Processing, no. 1, pp. 287295, 1991. [6] B. Wilson, Trend in current conveyor and current-mode amplier design, Int. J. Electron. vol. 23, no. 3, pp. 573583, 1992. [7] K. Smith and A. Sedra The current conveyorA new circuit building block, Proc. IEEE, vol. 56, pp. 13681369, 1968. [8] A. Sedra and K. Smith, A second-generation current conveyor and its applications, IEEE Trans. Circuit Theory, vol. CT-17, pp. 132133, Feb. 1970. [9] B. Wilson, Performance analysis of current conveyors, Electron. Lett., vol. 25, pp. 15961598, Nov. 1989. [10] A. Sedra, G. Roberts, and F. Gohh, The current conveyor: History, progress and new results, Proc. Inst. Elect. Eng., vol. 137, pt. G, pp. 7887, Apr. 1990. [11] C. Toumazou, A. Payne, and F. Lidgey, Operational oating conveyor, Electron. Lett., vol. 27, pp. 651652, Apr. 1991. [12] G. Palmisano, G. Palumbo, and S. Pennisi, A CMOS operational oating conveyor, in Proc. IEEE Midwest94, Lafayette, IN, Aug. 1994. [13] J. Huijsing, Operational oating amplier, Proc. Inst. Elect. Eng., vol. 137, pt. G, pp. 131136, Apr. 1990. , Design and application of operational oating amplier (OFA): [14] The most universal operational amplier, Int. J. Analog Integrated Circuits Signal Processing, no. 4, pp. 115129, 1993. [15] P. Allen and M. Terry, The use of current ampliers for high performance voltage applications, IEEE J. Solid-State Circuits, vol. SC-15, pp. 155162, Apr. 1980. [16] T. Kaulberg, A CMOS current-mode operational amplier, IEEE J. Solid-State Circuits, vol. 28, pp. 849852, July 1993. [17] I. Mucha, Towards a true current operational amplier, in Proc. IEEE ISCAS94, London, U.K., May 1994, pp. 389392. , Thousand and one improvements on current operational ampli[18] ers, in Proc. IEEE ISCAS94, London, U.K., May 1994, pp. 533536.

[19] R. Ducan, K. Chan, and A. Sedra, Design for a wideband current amplier and a current conveyor, IEEE Trans. Circuits Syst. I, vol. 41, pp. 727280, Apr. 1994. [20] E. Bruun, Bandwidth optimization of a low power, high speed CMOS current op amp, Analog Integrated Circuits Signal Processing, vol. 7, pp. 1119, 1995. [21] J. Haslett and M. Rao, A high quality controlled current source, IEEE Trans. Instrum. Meas., vol. IM-28, pp. 132140, June 1979. [22] J. Haslett, M. Rao, and L. Bruton, High-frequency active lter design using monolithic nullors, IEEE J. Solid-State Circuits, vol. SC-15, pp. 955962, Dec. 1980. [23] T. Vanisri and C. Toumazou, Wideband and high gain current-feedback opamp, Electron. Lett., vol. 28, pp. 17051707, Aug. 1992. [24] B. van den Dool and J. Huijsing, Indirect current feedback instrumentation amplier with a common-mode input range that includes the negative rail, IEEE J. Solid-State Circuits., vol. 28, pp. 743749, July 1993. [25] W. Su, F. Lidgey, S. Porta, and Q. Zhu, Analysis of op-amp power supply current sensing, in Proc. IEEE ISCAS94, London, U.K., May 1994, pp. 541544. [26] B. Wilson, Constant bandwidth voltage amplication using current conveyor, Int. J. Electron., vol. 65, no. 5, pp. 983988, 1988. [27] E. Bruun, Constant-bandwidth current mode operational amplier, Electron. Lett., vol. 27, pp. 16731674, Aug. 1991. [28] , Feedback analysis of transimpedance operational amplier circuits, IEEE Trans. Circuits Syst. I, vol. 40, pp. 275277, Apr. 1993. [29] , A high-speed CMOS current op amp for very low supply voltage operation, in Proc. IEEE ISCAS94, London, U.K., 1994. [30] T. Vanisri and C. Toumazou, On the design of low-noise currentmode optical preampliers, Int. J. Analog Integrated Circuits Signal Processing., no. 2, pp. 179195, 1992. [31] L. van den Broeke and A. Nieuwkerk, Wide-band integrated receiver with improved dynamic range using a current switch at the input, IEEE J. of Solid-State Circuits., vol. 28, pp. 862864, July 1993. [32] R. Kauert, W. Budde, and A. Kalz, A monolithic eld segment photo sensor system, IEEE J. Solid-State Circuits., vol. 30, pp. 807811, July 1995. [33] A. Arbel and L. Goldminz, Output stage for current-mode feedback ampliers, theory and applications, Analog Integrated Circuits Signal Processing, vol. 2, pp. 243255, 1992. [34] P. Crawley and G. Roberts, High-swing MOS current mirror with arbitrarily high output resistance, Electron. Lett., vol. 28, pp. 361363, Feb. 1992. [35] E. Bruun and P. Shah, Dynamic range of low-voltage cascode current mirrors, in Proc. IEEE ISCAS95, Seattle, WA, May 1995, pp. 13281331. [36] G. Palmisano, G. Palumbo, and S. Pennisi, High linearity CMOS current output stage, Electron. Lett., vol. 31, pp. 789790, May 1994. [37] J. Shyu, G. Temes, and F. Krummenacher, Random error effects in matched MOS capacitors and current sources, IEEE J. Solid-State Circuits, vol. SC-19, pp. 948955, Dec. 1984. [38] K. Lakshmikumar, R. Hadaway, and M. Copeland, Characterization and modeling of mismatch in MOS transistors for precision analog design, IEEE J. Solid-State Circuits, vol. SC-21, pp. 10571066, Dec. 1986. [39] M. Pelgrom, A. Duinmaijer, and A. Welbers, Matching properties of MOS transistors, IEEE J. Solid-State Circuits, vol. 24, pp. 14331440, Dec. 1989. [40] Y. Tsividis and D. Fraser, Harmonic distortion in single-channel MOS integrated circuits, IEEE J. Solid-State Circuits, vol. SC-16, pp. 694702, Dec. 1981. [41] E. Fong and R. Zeman, Analysis of harmonic distortion in singlechannel MOS integrated circuits, IEEE J. Solid-State Circuits, vol. SC-17, pp. 8386, Feb. 1982. [42] B. Wu and J. Mavor, Distortion in CMOS operational amplier circuits, Proc. Inst. Elect. Eng., vol. 131, pt. G, pp. 129134, Aug. 1994. [43] M. AbuelmaAtti, Harmonic performance of single-channel MOS integrated circuits, IEEE J. Solid-State Circuits, vol. SC-20, pp. 860864, Aug. 1985. [44] M. Thoma, W. Baumann, and C. Westgate, A method to predict harmonic distortion in small-geometry MOS analog integrated circuits, IEEE J. Solid-State Circuits, vol. SC-22, pp. 106109, Feb. 1987. [45] D. Pederson and K. Mayaram, Analog Integrated Circuits for Communication (Principles, Simulation and Design). Norwell, MA: Kluwer Academic, 1991. [46] K. Bult and G. Geelen, A fast-settling CMOS op amp for SC cir-

250

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 2, FEBRUARY 1998

cuits with 90-dB DC gain, IEEE J. Solid-State Circuits, vol. 25, pp. 13791384, Dec. 1990. , The CMOS gain-boosting technique, Int. J. Analog Integrated [47] Circuits Signal Processing, no. 1, pp. 119135, 1991. [48] J. Lloyd and H.-S. Lee, A CMOS op amp with fully-differential gainenhancement, IEEE Trans. Circuits Syst. II, vol. 41, pp. 241243, Mar. 1994.

TABLE I APPROXIMATING sin(2t); 0

t1

A Comment on the Approximation of Signals by Gaussian Functions

Paulo Jorge S. G. Ferreira

AbstractWe point out that an approximation property of Gaussian functions, derived in a recent work, is a direct corollary to the work of Wiener on the closure of translations in L1 and L2 . This observation not only simplies the proof of the approximation property, but also renders the result applicable, in a more general setting, to other functions (not necessarily Gaussian). Index Terms Approximation methods, closure of translations, Gaussion functions, nonlinear approximation, nonlinear functions, signal representations, superpositions.

I. INTRODUCTION The purpose of this note is to comment on certain side aspects of a recent and interesting work [1]. Our remarks in no way compromise the main results and conclusions presented in that paper, which addresses the approximation of nite-energy signals by linear combinations of Gaussian functions:
i

Hilbert spaces of functions f such that jf j and jf j2 is Lebesgue integrable over (01; +1). Wiener showed that any function belonging to L1 can be approximated to any prescribed tolerance, in the L1 norm, by linear combinations of the translates of a single function 2 L1:

i=1

ai (t

0 ti )

ai g (t 0 ti ; i )
1 p

where

g(t; i ) =

i

2

e0t =2 :

It is not our intention to shift attention from the main results and conclusions presented in [1], but simply to address this approximation problem in the light of Wieners results on the closure of translations which, despite their usefulness and importance, do not seem to be as well known as some of the other works. We hope that our observations might be of use to researchers interested in nonlinear approximation problems such as this, and who remain unaware of Wieners results. The purpose of the long Appendix in [1] is to prove that any nite-energy signal which vanishes outside a certain interval can be arbitrarily well approximated by linear combinations of Gaussian functions. This is done very much in the spirit of Lauricellas theorem [2], that is, by showing that any sinusoidal signal sin(2kt=T ); 0  t  T , can be approximated by Gaussian functions. Our aim is to show that similar, and indeed more general, conclusions follow from the approximation results due to Wiener on the closure of translations in L1 and L2 respectively, the Banach and
Manuscript received November 16, 1995; revised April 24, 1996. This paper was recommended by Associate Editor R. W. Newcomb. The author is with the Departamento de Electr nica e o Telecomunica oes/INESC, Universidade de Aveiro, 3810 Aveiro, Portugal c (e-mail: pjf@inesca.pt). Publisher Item Identier S 1057-7130(98)01638-3.

if and only if the Fourier transform of has no zeros. He also showed that a similar result holds in L2 if and only if the set of zeros of the Fourier transform of has zero measure. Proofs of these results can be found in [3] and [4], for example. The Gaussian function g(t; ) clearly belongs to L1 and L2 , independently of  , and its Fourier transform certainly has no zeros. Thus, the results obtained by Wiener imply that, for any f 2 L1 and  > 0, there is an integer N and constants (ai )1iN and (ti )1iN such that

01 1

f (t)

i=1 N

ai g(t

0 ti ; )

dt < :

A similar result holds for any f in the L2 norm:

2 L2, the approximation now being 0 ti ; )

2
dt < :

01

f (t)

i=1

ai g(t

These conclusions generalize those obtained, at much greater length, in [1]. The approximation property just discussed holds no matter the value of  , a somewhat surprising result: the spaces L1 and L2 contain very rapidly varying functions, and the results mentioned imply that even very spread-out Gaussian curves can somehow be combined to closely approximate these signals. Unfortunately, the methods used by Wiener are not constructive, and do not offer any hints on how to pick N; (ai )1iN and (ti )1iN . For example, the approximation of sinusoids as discussed in [1, Appendix] is based on Gaussian curves of xed width translated to predetermined locations (the extrema of the sinusoid). Much better

10577130/98$10.00 1998 IEEE