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H8DMR-82 H8DMR-i2
USERS MANUAL
Revision 1.0d
The information in this Users Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this manual, please see our web site at www.supermicro.com. Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software, if any, and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or reduced to any medium or machine without prior written consent. IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA. Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Super Micro's total liability for all claims will not exceed the price paid for the hardware product. FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturers instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense. California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate
WARNING: Handling of lead solder materials used in this product may expose you to lead, a chemical known to the State of California to cause birth defects and other reproductive harm.
Manual Revision 1.0d Release Date: March 13, 2009
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document. Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders. Copyright 2009 by Super Micro Computer, Inc. All rights reserved.
Preface
Preface
About This Manual
This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the H8DMR-82/H8DMR-i2 serverboard. The H8DMR-82/H8DMR-i2 is based on the nVidia MCP55 Pro/NEC uPD720400 chipset and supports single or dual AMD OpteronTM 2000 Series Socket F type processors and up to 64 GB of DDR2-667 /533/400 registered ECC SDRAM. Please refer to the serverboard specications pages on our web site for updates on supported processors (http://www.supermicro.com/aplus/). This product is intended to be professionally installed.
Manual Organization
Chapter 1 includes a checklist of what should be included in your serverboard box, describes the features, specications and performance of the serverboard and provides detailed information about the chipset. Chapter 2 begins with instructions on handling static-sensitive devices. Read this chapter when installing the processor(s) and memory modules and when installing the serverboard in a chassis. Also refer to this chapter to connect the oppy and hard disk drives, the serial ports, the mouse and keyboard and the twisted wires for the power and reset buttons and the system LEDs. If you encounter any problems, see Chapter 3, which describes troubleshooting procedures for the video, the memory and the setup conguration stored in CMOS. For quick reference, a general FAQ (Frequently Asked Questions) section is provided. Instructions are also included for contacting technical support. In addition, you can visit our web site for more detailed information. Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility. Appendix A provides BIOS Error Beep Code Messages. Appendix B lists BIOS POST Checkpoint Codes.
iii
Table of Contents
Preface
About This Manual ...................................................................................................... iii Manual Organization ................................................................................................... iii
Chapter 1: Introduction
1-1 Overview ......................................................................................................... 1-1 Checklist ................................................................................................... 1-1 H8DMR-82/H8DMR-i2 Image ................................................................... 1-3 H8DMR-82/H8DMR-i2 Serverboard Layout ............................................. 1-4 H8DMR-82/H8DMR-i2 Quick Reference .................................................. 1-5 Serverboard Features .............................................................................. 1-6 nVidia MCP55 Pro Chipset: System Block Diagram ............................... 1-8 1-2 1-3 1-4 1-5 1-6 Chipset Overview ........................................................................................... 1-9 PC Health Monitoring ................................................................................... 1-10 Power Conguration Settings ....................................................................... 1-11 Power Supply ............................................................................................... 1-12 Super I/O ........................................................................................................ 1-13
Chapter 2: Installation
2-1 2-2 2-3 2-4 2-5 2-6 Static-Sensitive Devices ................................................................................. 2-1 Processor and Heatsink Installation ............................................................... 2-2 Mounting the Serverboard into a Chassis ...................................................... 2-5 Installing Memory ........................................................................................... 2-5 I/O Port and Control Panel Connections ........................................................ 2-8 Connecting Cables ......................................................................................... 2-9 ATX Power Connector .............................................................................. 2-9 Processor Power Connector .................................................................... 2-9 Auxiliary Power Connector ....................................................................... 2-9 MNI Button ............................................................................................... 2-9 Power LED ............................................................................................. 2-10 HDD LED ............................................................................................... 2-10 NIC1 LED ............................................................................................... 2-10 NIC2 LED ............................................................................................... 2-10 Overheat/Fan Fail LED .......................................................................... 2-10 Power Fail LED ...................................................................................... 2-11 Reset Button .......................................................................................... 2-11 Power Button .......................................................................................... 2-11
iv
Table of Contents
USB Ports .............................................................................................. 2-11 USB Headers ......................................................................................... 2-12 Serial Ports ............................................................................................. 2-12 Fan Headers .......................................................................................... 2-12 JLAN1/2 (Ethernet Ports) ....................................................................... 2-12 Power LED/Speaker ............................................................................... 2-13 ATX PS/2 Keyboard/Mouse Ports .......................................................... 2-13 Chassis Intrusion .................................................................................... 2-13 Overheat LED ........................................................................................ 2-13 Wake-On-LAN ........................................................................................ 2-14 Wake-On-Ring ........................................................................................ 2-14 PWR I2C ................................................................................................. 2-14 IPMB ....................................................................................................... 2-14 3rd Power Supply Alarm Header ........................................................... 2-15 Compact Flash Card PWR Connector ................................................... 2-15 SGPIO .................................................................................................... 2-15 Power Fail Header ................................................................................. 2-16 2-7 Jumper Settings ............................................................................................ 2-16 Explanation of Jumpers ......................................................................... 2-16 CMOS Clear ........................................................................................... 2-17 3rd Power Supply Fail Detect Enable/Disable ....................................... 2-17 VGA Enable/Disable ............................................................................... 2-17 Watch Dog Enable/Disable .................................................................... 2-18 PCI-X Slot Freq. Select .......................................................................... 2-18 I2C to PCI Enable/Disable ...................................................................... 2-18 Compact Flash Master/Slave ................................................................. 2-19 SCSI Controller Enable/Disable ............................................................. 2-19 SCSI Termination Enable/Disable .......................................................... 2-19 2-8 Onboard Indicators ....................................................................................... 2-20 LAN1/LAN2 LEDs .................................................................................. 2-20 +5V Standby Power LED ....................................................................... 2-20 SCSI Activity LEDs ................................................................................. 2-20 2-9 Floppy, IDE, SATA and SCSI Drive Connections ......................................... 2-21 Floppy Connector ................................................................................... 2-21 IDE Connectors ...................................................................................... 2-22 SATA Ports ............................................................................................. 2-22 SCSI Connectors ................................................................................... 2-23
2-10 Enabling SATA RAID .................................................................................... 2-24 2-11 Installing Additional Drivers .......................................................................... 2-26
Chapter 3: Troubleshooting
3-1 Troubleshooting Procedures ........................................................................... 3-1 Before Power On ..................................................................................... 3-1 No Power ................................................................................................. 3-1 No Video .................................................................................................. 3-1 Memory Errors ......................................................................................... 3-2 Losing the Systems Setup Conguration ................................................ 3-2 3-2 3-3 3-4 Technical Support Procedures ........................................................................ 3-2 Frequently Asked Questions ........................................................................... 3-3 Returning Merchandise for Service ................................................................ 3-4
Chapter 4: BIOS
4-1 4-2 4-3 4-4 4-5 4-6 Introduction ..................................................................................................... 4-1 Main Menu ...................................................................................................... 4-2 Advanced Settings Menu ............................................................................... 4-2 Boot Menu .................................................................................................... 4-16 Security Menu ............................................................................................... 4-17 Exit Menu ...................................................................................................... 4-18
Appendices
Appendix A: BIOS Error Beep Codes ...................................................................... A-1 Appendix B: BIOS POST Checkpoint Codes ........................................................... B-1
vi
Chapter 1: Introduction
Chapter 1 Introduction
1-1 Overview
Checklist
Congratulations on purchasing your computer serverboard from an acknowledged leader in the industry. Our boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance. Please check that the following items have all been included with your serverboard. If anything listed here is damaged or missing, contact your retailer. Included with retail box only One (1) H8DMR-82/H8DMR-i2 serverboard One (1) IDE cable (CBL-036L-02) One (1) oppy cable (CBL-022L) Two (2) heatsink retention modules with four (4) screws (BKT-0012L) One (1) CD containing drivers and utilities
1-1
Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: Fax: Email: +1 (408) 503-8000 +1 (408) 503-8008 marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Web Site: www.supermicro.com
Europe
Address: Super Micro Computer B.V. Het Sterrenbeeld 28, 5215 ML 's-Hertogenbosch, The Netherlands Tel: Fax: Email: +31 (0) 73-6400390 +31 (0) 73-6416525 sales@supermicro.nl (General Information) support@supermicro.nl (Technical Support) rma@supermicro.nl (Customer Support)
Asia-Pacic
Address: Super Micro Computer, Inc. 4F, No. 232-1, Liancheng Rd. Chung-Ho 235, Taipei County Taiwan, R.O.C. Tel: Fax: Web Site: Email: Tel: +886-(2) 8226-3990 +886-(2) 8226-3991 www.supermicro.com.tw support@supermicro.com.tw 886-2-8228-1366, ext.132 or 139
Technical Support:
1-2
Chapter 1: Introduction
Note: The H8DMR-82 is pictured. The H8DMR-i2 shares the same layout but with no SCSI components, connectors or jumpers.
1-3
PWR I2C
J32
JPW1 JPW2
MSE
USB0 /1
BIOS
DIMM 2A
H8DMR-82
Battery JI2C1/JI2C2
JPX1A/JPX1B
CPU2
ATI ES1000 NEC uPD720400
FAN3
SUPER
JPG1
FAN4
LAN1
PCI-Exp x8 PCI-Exp x8
LAN2
CPU1 nVidia
JPA3
VGA
MCP55
FAN5 JPA2 SGPIO1 SGPIO2 AIC-7902W
U320 SCSI CH B
JD1 USB2/3
COM2
Notes: 1. Jumpers not indicated are for test purposes only. 2. The H8DMR-i2 has the same layout as the H8DMR-82 but with no SCSI components, connectors or jumpers.
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Chapter 1: Introduction
Description
3rd Power Fail Detect En/Dis CMOS Clear Compact Flash Master/Slave I2C to PCI Enable/Disable SCSI Enable/Disable SCSI Channel A/B Term. VGA Enable/Disable PCI-X Slot #6 Freq. Select PCI-X Slots #7 Freq. Select Watch Dog
Default Setting
Closed (Enabled) See Section 2-7 Closed (Master) Closed (Enabled) Pins 1-2 (Enabled) Open (Enabled) Pins 1-2 (Enabled) Open (Auto) Open (Auto) Pins 1-2 (Reset)
Connectors
COM1, COM2 FAN 1-5 IPMB J32 JA1* JAR JB1* JD1 JF1 JFDD1 JIDE1 JL1 JOH1 JPW1 JPW2 JPWF JWF1 JWOL JWOR LAN1/2 PWR I2C SATA0 ~ SATA5 SGPIO1/SGPIO2 SIM1U USB0/1 USB2/3 *H8DMR-82 only
Description
COM1/COM2 Serial Port/Header System Fan Headers System Management Bus Header 4-pin Auxiliary Power Connector U320 SCSI Channel A Connector 3rd Power Supply Alarm Reset Header U320 SCSI Channel B Connector Onboard Speaker/Keylock/Power LED Front Panel Connector Floppy Disk Drive Connector IDE Drive Connector Chassis Intrusion Header Overheat Warning Header 20-Pin ATX Power Connector 8-Pin Processor Power Connector Power Fail Header Compact Flash Card Power Connector Wake-On-LAN Header Wake-On-Ring Header Gigabit Ethernet (RJ45) Ports Power Supply I2C Header Serial ATA Ports SGPIO Headers IPMI Card Slot Universal Serial Bus (USB) Ports 0/1 Additional USB Headers
1-5
Serverboard Features
CPU Single or dual AMD Opteron 2000 Series Socket F type 64-bit processors
Memory Eight dual/single channel DIMM slots supporting up to 64 GB of DDR2-667 /533/400 registered ECC SDRAM
Note: Memory capacities are halved for single CPU systems. Refer to Section 2-4 before installing.
Expansion Slots One (1) Universal PCI-X 133 MHz slot One (1) Universal PCI-X 100 MHz slot (supports ZCR on H8DMR-82 only) Two (2) PCI-Express x8 slots One (1) SIM1U slot (for IPMI card)
BIOS 8 Mb AMIBIOS LPC Flash ROM DMI 2.3, PCI 2.2, ACPI 2.0, Plug and Play (PnP)
PC Health Monitoring Onboard voltage monitors for two CPU cores, Hyper Transport (1.2V), memory banks (1.8V), chipset (1.5V) Fan status monitor with rmware/software on/off and speed control Watch Dog Environmental temperature monitoring via BIOS Power-up mode control for recovery from AC power loss System resource alert (via included utility program) Auto-switching voltage regulator for the CPU core
1-6
Chapter 1: Introduction
ACPI Features Slow blinking LED for suspend state indicator BIOS support for USB keyboard Main switch override mechanism Internal/external modem ring-on
Onboard I/O On-chip SATA controller supporting six (6) SATA ports (RAID 0, 1, 0+1 and 5) Adaptec AIC-7902W SCSI controller (RAID 0, 1 and 10, H8DMR-82 only) One (1) UltraDMA (ATA) 133/100 IDE port One (1) oppy port interface (up to 2.88 MB) Two (2) Fast UART 16550 compatible serial ports
On-chip (nVidia MCP55) Ethernet controller supports two Gigabit LAN ports ATI RN50 (ES1000) onboard graphics controller PS/2 mouse and PS/2 keyboard ports Four (4) USB (Universal Serial Bus) 2.0 ports/headers Other Wake-on-Ring Wake-on-LAN Onboard +5V power LED (DA4) SCSI channel activity LEDs (DA1, DA2, H8DMR-82 only) Chassis intrusion detection
Dimensions Extended ATX form factor, 12" x 13.05" (305 x 332 mm)
1-7
DDR2-667/533/400
DDR2-667/533/400
16 x 16 HT link (1 GHz)
PCI-X
CH B
PCI-X
CH A
NEC uPD720400
x8 PCI-E Bus
MCP55 Pro
USB Ports (4) ATI RN50 GLAN Ports (2)
AIC 7902W
PCI-E x8 Slot
LPC
Floppy
Kybd/ Mouse
Figure 1-3. nVidia MCP55 Pro/NEC uPD720400 Chipset: System Block Diagram Note: This is a general block diagram and may not exactly represent the features on your serverboard. See the previous pages for the actual specications of your serverboard.
1-8
Chapter 1: Introduction
1-2
Chipset Overview
The H8DMR-82/H8DMR-i2 serverboard is based on the nVidia MCP55 Pro/NEC uPD720400 chipset. The nVidia MCP55 Pro functions as Media and Communications Processor (MCP) and the NEC chip as a PCI-X Tunnel. Controllers for the system memory are integrated directly into the AMD Opteron processors.
NEC uPD720400
This I/O bridge chip provides two PCI-X domains. Each bridge supports PCI masters that include clock, request and grant signals. This hub connects to the MCP55 Pro through a PCI-Express x8 Bus. It also interfaces directly with the Adaptec SCSI controller.
HyperTransport Technology
HyperTransport technology is a high-speed, low latency point to point link that was designed to increase the communication speed by a factor of up to 48x between integrated circuits. This is done partly by reducing the number of buses in the chipset to reduce bottlenecks and by enabling a more efcient use of memory in multi-processor systems. The end result is a signicant increase in bandwidth within the chipset.
1-9
1-3
PC Health Monitoring
This section describes the PC health monitoring features of the H8DMR-82/H8DMRi2. The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring.
Onboard Voltage Monitors for two CPU cores, Hyper Transport (1.2V), memory banks (1.8V), chipset (1.5V)
The onboard voltage monitor will scan these voltages continuously. Once a voltage becomes unstable, it will give a warning or send an error message to the screen. Users can adjust the voltage thresholds to dene the sensitivity of the voltage monitor. Real time readings of these voltage levels are all displayed in BIOS.
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Chapter 1: Introduction
1-4
This section describes the features of your serverboard that deal with power and power settings.
Wake-On-LAN (JWOL)
Wake-On-LAN is dened as the ability of a management application to remotely power up a computer that is powered off. Remote PC setup, up-dates and access tracking can occur after hours and on weekends so that daily LAN trafc is kept to a minimum and users are not interrupted. The serverboard has a 3-pin header (JWOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has WOL capability. Wake-On-LAN must be enabled in BIOS. Note that Wake-On-LAN can only be used with an ATX 2.01 (or above) compliant power supply.
1-11
1-5
Power Supply
As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates. The H8DMR-82/H8DMR-i2 accommodates 12V ATX power supplies. Although most power supplies generally meet the specications required by the CPU, some are inadequate. A 2 amp current supply on a 5V Standby rail is strongly recommended. It is strongly recommended that you use a high quality power supply that meets 12V ATX power supply Specication 1.1 or above. Additionally, in areas where noisy power transmission is present, you may choose to install a line lter to shield the computer from noise. It is recommended that you also install a power surge protector to help avoid problems caused by power surges. Warning: To prevent the possibility of explosion, do not use the wrong type of onboard CMOS battery or install it upside down.
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Chapter 1: Introduction
1-6
Super I/O
The disk drive adapter functions of the Super I/O chip include a oppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock generator, drive interface control logic and interrupt and DMA logic. The wide range of functions integrated onto the Super I/O greatly reduces the number of components required for interfacing with oppy disk drives. The Super I/O supports two 360 K, 720 K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500 Kb/s or 1 Mb/s. It also provides two high-speed, 16550 compatible serial communication ports (UARTs), one of which supports serial infrared communication. Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and a processor interrupt system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support higher speed modems. The Super I/O supports one PC-compatible printer port (SPP), Bi-directional Printer Port (BPP) , Enhanced Parallel Port (EPP) or Extended Capabilities Port (ECP). The Super I/O provides functions that comply with ACPI (Advanced Conguration and Power Interface), which includes support of legacy and ACPI power management through a SMI or SCI function pin. It also features auto power management to reduce power consumption. The IRQs, DMAs and I/O space resources of the Super I/O can be exibly adjusted to meet ISA PnP requirements, which support ACPI and APM (Advanced Power Management).
1-13
Notes
1-14
Chapter 2: Installation
Chapter 2 Installation
2-1
Static-Sensitive Devices
Electrostatic Discharge (ESD) can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufcient to protect your equipment from ESD.
Precautions
Use a grounded wrist strap designed to prevent static discharge. Touch a grounded metal object before removing the board from the antistatic bag. Handle the board by its edges only; do not touch its components, peripheral chips, memory modules or gold contacts. When handling chips or modules, avoid touching their pins. Put the serverboard and peripherals back into their antistatic bags when not in use. For grounding purposes, make sure your computer chassis provides excellent conductivity between the power supply, the case, the mounting fasteners and the serverboard. Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do not install the CMOS onboard battery upside down, which may result in a possible explosion.
Unpacking
The serverboard is shipped in antistatic packaging to avoid static damage. When unpacking the board, make sure the person handling it is static protected.
Installation Procedures
Follow the procedures as listed below to install the serverboard into a chassis: 1. 2. 3. 4. Install the processor(s) and the heatsink(s). Install the serverboard in the chassis. Install the memory and add-on cards. Finally, connect the cables and install the drivers.
2-1
2-2
sor. Always connect the power cord last and always remove it before adding, removing or changing any hardware components.
1. Begin by removing the cover plate that protects the CPU. Lift the lever on CPU socket #1 until it points straight up. With the lever raised, lift open the silver CPU retention plate.
Triangles
2. Use your thumb and your index nger to hold the CPU. Locate and align pin 1 of the CPU socket with pin 1 of the CPU. Both are marked with a triangle.
2-2
Chapter 2: Installation
3. Align pin 1 of the CPU with pin 1 of the socket. Once aligned, carefully place the CPU into the socket. Do not drop the CPU on the socket, move the CPU horizontally or vertically or rub the CPU against the socket or against any pins of the socket, which may damage the CPU and/or the socket.
4. With the CPU inserted into the socket, inspect the four corners of the CPU to make sure that it is properly installed and ush with the socket. Then, gently lower the silver CPU retention plate into place.
5. Carefully press the CPU socket lever down until it locks into its retention tab. For a dual-processor system, repeat these steps to install another CPU into the CPU#2 socket. Note: if using a single processor, only the CPU1 DIMM slots are addressable for a maximum of 8 GB memory.
2-3
2-4
Chapter 2: Installation
2-3
All serverboards and motherboards have standard mounting holes to t different types of chassis. Make sure that the locations of all the mounting holes for both the serverboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the serverboard to the chassis. Make sure that the metal standoffs click in or are screwed in tightly. 1. Check the compatibility of the serverboard ports and the I/O shield The H8DMR-82/H8DMR-i2 serverboard requires a chassis that can support extended ATX boards of 12" x 13.05" in size. Make sure that the I/O ports on the serverboard align with their respective holes in the I/O shield at the rear of the chassis. 2. Mounting the serverboard onto the mainboard tray in the chassis Carefully mount the serverboard onto the mainboard tray by aligning the serverboard mounting holes with the raised metal standoffs in the tray. Insert screws into all the mounting holes in the serverboard that line up with the standoffs. Then use a screwdriver to secure the serverboard to the mainboard tray - tighten until just snug (if too tight you might strip the threads). Metal screws provide an electrical contact to the serverboard ground to provide a continuous ground for the system.
2-4
Installing Memory
CAUTION
Exercise extreme care when installing or removing memory modules to prevent any possible damage.
1. Insert each memory module vertically into its slot, paying attention to the notch along the bottom of the module to prevent inserting the module incorrectly (see Figure 2-2). See support information below. 2. Gently press down on the memory module until it snaps into place. Note: each processor has its own built-in memory controller, so the CPU2 DIMMs cannot be addressed if only a single CPU is installed. 128 MB, 256 MB, 512 MB, 1 GB and 2 GB memory modules are supported. It is highly recommended that you remove the power cord from the system before installing or changing any memory modules. Using DIMMs of the same type and speed is recommended.
2-5
Support The H8DMR-82/H8DMR-i2 supports single or dual-channel, registered ECC DDR2667/533/400 SDRAM. Both interleaved and non-interleaved memory are supported, so you may populate any number of DIMM slots (see note on previous page and charts on following page). The CPU2 DIMM slots can only be accessed when two CPUs are installed (however, the CPU2 DIMM slots are not required to be populated when two CPUs are installed). Populating two adjacent slots at a time with memory modules of the same size and type will result in interleaved (128-bit) memory, which is faster than non-interleaved (64-bit) memory. See charts on following page. Optimizing memory performance If two processors are installed, it is better to stagger pairs of DIMMs across both sets of CPU DIMM slots, e.g. rst populate CPU1 slots 1A and 1B, then CPU2 slots 1A, and 1B, then the next two CPU1 slots, etc. This balances the load over both CPUs to optimize performance. Maximum memory (two CPUs): 64 GB - if only one CPU is installed, maximum supported memory is halved.
Notch
Notch
To Install: Insert module vertically and press down until it snaps into place. The release tabs should close - if they do not you should close them yourself.
Release Tab
Note: Notch should align with its receptive point on the slot
Release Tab
Note the notch in the slot and on the bottom of the DIMM. These prevent the DIMM from being installed incorrectly.
To Remove: Use your thumbs to gently push each release tab outward to release the DIMM from the slot.
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Chapter 2: Installation
Notes: X indicates a populated DIMM slot. If adding at least four DIMMs (with two CPUs installed), the congurations with DIMMs spread over both CPUs (and not like the conguration in row 5) will result in optimized performance. Note that the rst two DIMMs must be installed in the CPU1 memory slots.
2-7
2-5
The I/O ports are color coded in conformance with the PC99 specication to make setting up your system easier. See Figure 2-3 below for the colors and locations of the various I/O ports. Figure 2-3. I/O Port Locations and Denitions
Ground x (key) Power LED HDD LED NIC1 NIC2 OH/Fan Fail LED Power Fail LED Ground Ground
2 1
NMI x (key) Vcc Vcc Vcc Vcc Vcc Vcc Reset Power
2-8
Chapter 2: Installation
2-6
Connecting Cables
ATX Power Connector
Pin# 11 12 13 14 15 16 17 18
ATX Power 20-pin Connector Pin Dentions (JPW1) Denition +3.3V -12V COM PS_ON COM COM COM Res (NC) +5V +5V Pin # 1 2 3 4 5 6 7 8 9 10 Denition +3.3V +3.3V COM +5V COM +5V COM PWR_OK 5VSB +12V
The primary ATX power supply connector (JPW1) meets the SSI (Superset ATX) 20-pin specication. Refer to the table on the right for the pin denitions of the ATX power connector. This connection supplies power to the chipset, fans and memory. Note: You must also connect the 8-pin (JPW2) and 4-pin (J32) power connectors to your power supply (see below).
19 20
Required Connection
Auxiliary Power Connector Pin Denitions (J32) Pins 1&2 3&4 Denition Ground +12V
Required Connection
NMI Button
The non-maskable interrupt button header is located on pins 19 and 20 of JF1. Refer to the table on the right for pin denitions.
2-9
Power LED
The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table on the right for pin denitions.
HDD LED
The HDD (IDE Hard Disk Drive) LED connection is located on pins 13 and 14 of JF1. Attach the IDE hard drive LED cable to display disk activity. Refer to the table on the right for pin denitions.
HDD LED Pin Denitions (JF1) Pin# 13 14 Denition Vcc HD Active
NIC1 LED
The NIC1 (Network Interface Controller) LED connection is located on pins 11 and 12 of JF1. Attach the NIC1 LED cable to display network activity. Refer to the table on the right for pin denitions.
NIC1 LED Pin Denitions (JF1) Pin# 11 12 Denition Vcc NIC1 Active
NIC2 LED
The NIC2 (Network Interface Controller) LED connection is located on pins 9 and 10 of JF1. Attach the NIC2 LED cable to display network activity. Refer to the table on the right for pin denitions.
NIC2 LED Pin Denitions (JF1) Pin# 9 10 Denition Vcc NIC2 Active
OH/Fan Fail LED Pin Denitions (JF1) Pin# 7 8 Denition Vcc Control State Solid
Blinking
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Chapter 2: Installation
Reset Button
The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to the hardware reset switch on the computer case. Refer to the table on the right for pin denitions.
Reset Button Pin Denitions (JF1) Pin# 3 4 Denition Reset Ground
Power Button
The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both pins will power on/off the system. This button can also be congured to function as a suspend button (see the Power Button Mode setting in BIOS). To turn off the power when set to suspend mode, depress the button for at least 4 seconds. Refer to the table on the right for pin denitions.
Universal Serial Bus Ports Pin Denitions (USB0/1) USB0 Pin # Denition 1 2 3 4 +5V POPO+ Ground USB1 Pin # Denition 1 2 3 4 +5V POPO+ Ground
2-11
USB Headers
Four additional USB2.0 headers (USB2/3) are included on the serverboard. These may be connected to provide front side access. A USB cable (not included) is needed for the connection. See the table on the right for pin denitions.
Universal Serial Bus Headers Pin Denitions (USB2/3) USB2 Pin # Denition 1 2 3 4 5 +5V POPO+ Ground Key 1 2 3 4 5 USB3/4 Pin # Denition +5V POPO+ Ground No connection
Serial Ports
Pin #
Serial Port Pin Denitions (COM1/COM2) Denition DCD RXD TXD DTR Ground 6 7 8 9 10 Pin # Denition DSR RTS CTS RI NC
The COM1 port is located on the I/O backplane. COM2 is a header (see layout diagram for location). Refer to the table on the right for pin denitions.
1 2 3 4 5
Fan Headers
The H8DMR-82/H8DMR-i2 has vefan headers, which are designated FAN1 through FAN5. See the table on the right for pin denitions. Note: when using active heatsinks (those with fans), connect the heatsink fans to the nearest fan header.
Fan Header Pin Denitions (FAN1-5) Pin# 1 2 3 Denition Ground (Black) +12V (Red) Tachometer
2-12
Chapter 2: Installation
Power LED/Speaker
On JD1, pins 1, 2, and 3 are for the power LED and pins 4 through 7 are for the speaker. See the tables on the right for pin denitions. Note: The speaker connector pins are for use with an external speaker. If you wish to use the onboard speaker, you should close pins 6 and 7 with a jumper.
Pin# 4 5 6 7 Pin# 1 2 3
PWR LED Connector Pin Denitions (JD1) Denition +Vcc Control Control Speaker Connector Pin Denitions (JD1) Denition Red wire, +5V No connection Buzzer signal Speaker data
PS/2 Keyboard and Mouse Port Pin Denitions Pin# 1 2 3 4 5 6 Denition Data NC Ground VCC Clock NC
Chassis Intrusion
A Chassis Intrusion header is located at JL1. Attach the appropriate cable to inform you of a chassis intrusion.
Chassis Intrusion Pin Denitions (JL1) Pin# 1 2 Denition Battery voltage Intrusion signal
Overheat LED
Connect an LED to the JOH1 header to provide warning of chassis overheating. See the table on the right for pin denitions.
2-13
Wake-On-LAN
The Wake-On-LAN header is designated JWOL. See the table on the right for pin denitions. You must have a LAN card with a Wake-On-LAN connector and cable to use the WakeOn-LAN feature. Note: Wake-On-LAN from S3, S4, S5 are supported by LAN1. LAN2 supports Wake-On-LAN from S1 only.
1 2 3 Wake-On-LAN Pin Denitions (JWOL) Pin# Denition +5V Standby Ground Wake-up
Wake-On-Ring
The Wake-On-Ring header is designated JWOR. This function allows your computer to receive and "wakeup" by an incoming call to the modem when in suspend state. See the table on the right for pin denitions. You must have a Wake-On-Ring card and cable to use this feature.
PWR I C
The PWR I2C header may be used to monitor the status of the power supply, fans and system temperature. See the table on the right for pin denitions.
Pin# 1 2 3 4 5
I2C Header Pin Denitions (PWR I2C) Denition Clock Data PWR Fail Gnd +3.3V
IPMB
The IPMB header is for the System Management Bus. Connect the appropriate cable here to utilize SMB on the system. See the table on the right for pin denitions.
SMBus Header Pin Denitions (IPMB) Pin# 1 2 3 4 Denition Data Ground Clock No Connection
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Chapter 2: Installation
PS Alarm Reset Header Pin Denitions (JAR) Pin# 1 2 Denition Ground Reset Signal
Compact Flash Power Header Pin Denitions (JWF1) Pin# 1 2 3 Denition +5V Ground Signal
SGPIO
The two headers labeled SGPIO1 and SGPIO2 are for SGPIO (Serial General Purpose Input/Output). SGPIO provides a bus between the SATA controller and the SATA drive backplane to provide SATA enclosure management functions. Connect the appropriate cables from the backplane to the SGPIO1 and SGPIO2 headers to utilize SAS/SATA management functions on your system.
SGPIO Header Pin Denitions (SGPIO1, SGPIO2) Pin# 1 3 5 7 Denition NC Ground Load NC Pin # 2 4 6 8 Denition NC Data Ground NC
2-15
Power Fail Header Pin Denitions (JPWF) Pin# 1 2 3 4 Denition P/S 1 Fail Signal P/S 2 Fail Signal P/S 3 Fail Signal Alarm Reset
Note: This feature is only available when using redundant Supermicro power supplies.
2-7
Jumper Settings
Explanation of Jumpers
To modify the operation of the serverboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram at right for an example of jumping pins 1 and 2. Refer to the serverboard layout page for jumper locations. Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the jumper is off the pins.
3 Connector Pins 2 1
Jumper
3 Setting
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Chapter 2: Installation
CMOS Clear
JBT1 is used to clear CMOS and will also clear any passwords. Instead of pins, this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS. To clear CMOS, 1) First power down the system and unplug the power cord(s). 2) With the power disconnected, short the CMOS pads with a metal object such as a small screwdriver for at least four seconds. 3) Remove the screwdriver (or shorting device). 4) Reconnect the power cord(s) and power on the system. Notes: Do not use the PW_ON connector to clear CMOS. The onboard battery does not need to be removed when clearing CMOS, however you must short JBT1 for at least four seconds.
3rd Power Supply Fail Signal Jumper Settings (J3P) Jumper Setting Open Closed Denition Disabled Enabled
VGA Enable/Disable
JPG1 allows you to enable or disable the VGA port. The default position is on pins 1 and 2 to enable VGA. See the table on the right for jumper settings.
VGA Enable/Disable Jumper Settings (JPG1) Jumper Setting Pins 1-2 Pins 2-3 Denition Enabled Disabled
2-17
Watch Dog
JWD controls Watch Dog, a system monitor that takes action when a software application freezes the system. Jumping pins 1-2 will cause WD to reset the system if an application is hung up. Jumping pins 2-3 will generate a non-maskable interrupt signal for the application that is hung up. See the table on the right for jumper settings. Watch Dog can also be enabled via BIOS.
Note: When enabled, the user needs to write their own application software in order to disable the Watch Dog timer. Watch Dog Jumper Settings (JWD) Jumper Setting Pins 1-2 Pins 2-3 Open Denition Reset NMI Disabled
PCI-X Slot Frequency Select Jumper Settings (JPX1A/JPX1B) Jumper Setting Open Pins 1-2 Pins 2-3 Denition Auto PCI-X 66 MHz PCI 66 MHz
I2C to PCI Enable/Disable Jumper Settings (JI2C1/2) Jumper Setting Closed Open Denition Enabled Disabled
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Chapter 2: Installation
Compact Flash Master/Slave Jumper Settings (JCF1) Jumper Setting Closed Open Denition Master Slave
SCSI Enable/Disable Jumper Settings (JPA1) Jumper Setting Denition Pins 1-2 Pins 2-3 Enabled Disabled
SCSI Term. Enable/Disable Jumper Settings (JPA2, JPA3) Jumper Setting Open Closed Denition Enabled Disabled
2-19
2-8
Onboard Indicators
LAN1/LAN2 LEDs
The Ethernet ports (located beside the VGA port) have two LEDs. On each Gb LAN port, one LED indicates activity when blinking while the other LED may be amber or off to indicate the speed of the connection. See the table on the right for the functions associated with the connection speed LED.
LAN LED (Connection Speed Indicator) LED Color Amber Off Denition 1 GHz 10/100 MHz
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Chapter 2: Installation
2-9
Use the following information to connect the oppy and hard disk drive cables. The oppy disk drive cable has seven twisted wires. A red mark on a wire typically designates the location of pin 1. A single oppy disk drive ribbon cable has 34 wires and two connectors to provide for two oppy disk drives. The connector with twisted wires always connects to drive A, and the connector that does not have twisted wires always connects to drive B. The 80-wire ATA133 IDE hard disk drive cable that came with your system has two connectors to support two drives. This special cable should be used to take advantage of the speed this new technology offers. The blue connector connects to the onboard IDE connector interface and the other connector(s) to your hard drive(s). Consult the documentation that came with your disk drive for details on actual jumper locations and settings for the hard disk drive.
Floppy Connector
The oppy connector is located beside the JIDE1 connector. See the table on the right for pin denitions.
Pin# 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33
Floppy Drive Connector Pin Denitions (JFDD1) Denition GND GND Key GND GND GND GND GND GND GND GND GND GND GND GND GND GND Pin # 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 Denition FDHDIN Reserved FDEDIN IndexMotor Enable Drive Select BDrive Select AMotor Enable DIRSTEPWrite DataWrite GateTrack 00Write ProtectRead DataSide 1 SelectDiskette
2-21
IDE Connector
There are no jumpers to congure the onboard JIDE1 connector. See the table on the right for pin denitions.
Pin# 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
IDE Drive Connector Pin Denitions (JIDE1) Denition Reset IDE Host Data 7 Host Data 6 Host Data 5 Host Data 4 Host Data 3 Host Data 2 Host Data 1 Host Data 0 Ground DRQ3 I/O Write I/O Read IOCHRDY DACK3 IRQ14 Addr1 Addr0 Chip Select 0 Activity Pin # 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 Denition Ground Host Data 8 Host Data 9 Host Data 10 Host Data 11 Host Data 12 Host Data 13 Host Data 14 Host Data 15 Key Ground Ground Ground BALE Ground IOCS16 Ground Addr2 Chip Select 1 Ground
SATA Ports
There are no jumpers to congure the SATA ports, which are designated SATA0 through SATA5. See the table on the right for pin denitions.
Pin # 1 2 3 4 5 6 7
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Chapter 2: Installation
2-23
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Chapter 2: Installation
2. Use the arrow keys to move to Advanced > Floppy/IDE/SATA Conguration > nVidia RAID Setup and press the <Enter> key. Once in the submenu, enable the "nVidia RAID Function" setting, which will cause the SATA0/1/2 Primary/Secondary settings to appear. Enable the SATA devices and channels you will be using. 3. Hit the <Esc> key twice and scroll to the Exit menu. Select "Save Changes and Exit" and hit <enter>, then hit <Enter> again to verify. 4. After exiting the BIOS Setup Utility, the system will reboot. When prompted during the startup, press the <F10> key when prompted to run the nVidia RAID Utility program.
2-25
Click the icons showing a hand writing on paper to view the readme les for each item. Click the computer icons to the right of these items to install each item (from top to the bottom) one at a time. After installing each item, you should reboot the system before moving on to the next item on the list. The bottom icon with a CD on it allows you to view the entire contents of the CD.
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Chapter 3: Troubleshooting
Chapter 3 Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the Technical Support Procedures and/or Returning Merchandise for Service section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any hardware components.
Before Power On
1. Check that the +5V standby power LED is lit (DA4 on the serverboard). 2. Make sure that the main ATX power connector at JPW1, the 8-pin connector at JPW2 and the 4-pin connecor at J32 are all connected to your power supply. 3. Make sure that no short circuits exist between the serverboard and chassis. 4. Disconnect all ribbon/wire cables from the serverboard, including those for the keyboard and mouse. 5. Remove all add-on cards. 6. Install a CPU and heatsink (making sure it is fully seated) and connect the internal (chassis) speaker and the power LED to the serverboard. Check all jumper settings as well. 7. Use the correct type of onboard CMOS battery as recommended by the manufacturer. To avoid possible explosion, do not install the CMOS battery upside down.
No Power
1. Make sure that no short circuits exist between the serverboard and the chassis. 2. Verify that all jumpers are set to their default positions. 3. Check that the 115V/230V switch on the power supply is properly set. 4. Turn the power switch on and off to test the system. 5. The battery on your serverboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on but you have no video, remove all the add-on cards and cables. 2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on beep codes.
3-1
NOTE
If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B.
Memory Errors
1. Make sure that the DIMM modules are properly and fully installed. 2. You should be using registered ECC DDR2 memory (see next page). Also, it is recommended that you use the same memory type and speed for all DIMMs in the system. See Section 2-4 for memory details and limitations. 3. Check for bad DIMM modules or slots by swapping modules between slots and noting the results. 4. Check the power supply voltage 115V/230V switch.
3-2
Before contacting Technical Support, please take the following steps. Also, note that as a serverboard manufacturer, we do not sell directly to end-users, so it is best to rst check with your distributor or reseller for troubleshooting services. They should know of any possible problem(s) with the specic system conguration that was sold to you. 1. Please review the Troubleshooting Procedures and 'Frequently Asked Questions' (FAQs) sections in this chapter or see the FAQs on our web site before contacting Technical Support. 2. BIOS upgrades can be downloaded from our web site. Note: Not all BIOS can be ashed depending on the modications to the boot block code.
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Chapter 3: Troubleshooting
3. If you still cannot resolve the problem, include the following information when contacting us for technical support: Serverboard model and PCB revision number BIOS release date/version (this can be seen on the initial display when your system rst boots up) System conguration An example of a Technical Support form is posted on our web site. 4. Distributors: For immediate assistance, please have your account number ready when contacting our technical support department by e-mail.
3-3
Question: What type of memory does my serverboard support? Answer: The H8DMR-82/H8DMR-i2 supports up to 64 GB of DDR2-667/533/400 registered ECC SDRAM with two CPUs installed. With only one CPU installed the maximum memory support is halved. See Section 2-4 for details on installing memory. Question: How do I update my BIOS? Answer: It is recommended that you not upgrade your BIOS if you are not experiencing problems with your system. Updated BIOS les are located on our web site. Please check our BIOS warning message and the information on how to update your BIOS on our web site. Also, check the current BIOS revision and make sure it is newer than your current BIOS before downloading. Select your mainboard model on the web page and download the corresponding BIOS le to your computer. Unzip the BIOS update le, in which you will nd the readme.txt (ash instructions), the afudos.exe (BIOS ash utility) and the BIOS image (xxx.rom) les. Copy these les to a bootable oppy disk, insert the disk into drive A and reboot the system. At the DOS prompt after rebooting, enter the command "ash" (without quotation marks) then type in the BIOS le that you want to update with (xxxx.rom). Question: What's on the CD that came with my serverboard? Answer: The supplied compact disc has quite a few drivers and programs that will greatly enhance your system. We recommend that you review the CD and install the applications you need. Applications on the CD include chipset drivers for Windows and security and audio drivers.
3-3
Question: Why can't I turn off the power using the momentary power on/off switch? Answer: The instant power off function is controlled in BIOS by the Power Button Mode setting. When the On/Off feature is enabled, the serverboard will have instant off capabilities as long as the BIOS has control of the system. When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count (the rst screen that appears when the system is turned on), the momentary on/off switch must be held for more than four seconds to shut down the system. This feature is required to implement the ACPI features on the serverboard. Question: How do I connect the ATA133 cable to my IDE device(s)? Answer: The 80-wire/40-pin high-density ATA133 IDE cable that came with your system has two connectors to support two drives. This special cable must be used to take advantage of the speed the ATA133 technology offers. Connect the blue connector to the onboard IDE header and the other connector(s) to your hard drive(s). Consult the documentation that came with your disk drive for details on actual jumper locations and settings.
3-4
A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton, and mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete. For faster service, RMA authorizations may be requested online (http://www. supermicro.com/support/rma/). This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alteration, misuse, abuse or improper maintenance of products. During the warranty period, contact your distributor rst for any product problems.
3-4
Chapter 4: BIOS
Chapter 4 BIOS
4-1
Introduction
This chapter describes the AMIBIOS Setup utility for the H8DMR-82/H8DMR-i2. The AMI ROM BIOS is stored in a ash chip and can be easily upgraded using a oppy disk-based program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to the Manual Download area of our web site for any changes to BIOS that may not be reected in this manual.
4-1
4-2
Main Menu
When you rst enter AMI BIOS Setup Utility, you will see the Main Menu screen. You can always return to the Main Menu by selecting the Main tab on the top of the screen with the arrow keys.
The Main Menu screen provides you with a system overview, which includes the version, built date and ID of the AMIBIOS, the type, speed and number of the processors in the system and the amount of memory installed in the system.
4-3
Quiet Boot
If Disabled, normal POST messages will be displayed on boot-up. If Enabled, this display the OEM logo instead of POST messages.
OS Installation
Change this setting if using a 64-bit Linux operating system. The available options are Other and 64-bit Linux 2.6.9.
ACPI Mode
Use this setting to determine whether ACPI mode will be used. The options are Yes and No.
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Chapter 4: BIOS
Headless Mode
Use this setting to Enable or Disable headless operation mode through ACPI.
MPS Revision
This setting allows the user to select the MPS revision level. The options are 1.1 and 1.4.
4-3
Floppy/IDE/SATA Conguration
Onboard Floppy Controller
Use this setting to Enable or Disable the onboard oppy controller.
Floppy A
Move the cursor to these elds via up and down <arrow> keys to select the oppy type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3", 1.44 MB 3, and 2.88 MB 3".
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Chapter 4: BIOS
Type
Select the type of device connected to the system. The options are Not Installed, Auto, CDROM and ARMD.
LBA/Large Mode
LBA (Logical Block Addressing) is a method of addressing data on a disk drive. The options are Disabled and Auto.
PIO Mode
PIO (Programmable I/O) mode programs timing cycles between the IDE drive and the programmable IDE controller. As the PIO mode increases, the cycle time decreases. The options are Auto, 0, 1, 2, 3, and 4. Select Auto to allow AMI BIOS to auto detect the PIO mode. Use this value if the IDE disk drive support cannot be determined. Select 0 to allow AMI BIOS to use PIO mode 0. It has a data transfer rate of 3.3 MBs. Select 1 to allow AMI BIOS to use PIO mode 1. It has a data transfer rate of 5.2 MBs. Select 2 to allow AMI BIOS to use PIO mode 2. It has a data transfer rate of 8.3 MBs. Select 3 to allow AMI BIOS to use PIO mode 3. It has a data transfer rate of 11.1 MBs. Select 4 to allow AMI BIOS to use PIO mode 4. It has a data transfer rate of 16.6 MBs. This setting generally works with all hard disk drives manufactured after 1999. For other disk drives, such as IDE CD-ROM drives, check the specications of the drive.
4-5
DMA Mode
Selects the DMA Mode. Options are SWDMA0, SWDMA1, SWDMA2, MWDMA0. MDWDMA1, MWDMA2, UDMA0. UDMA1, UDMA2, UDMA3, UDMA4 and UDMA5. (SWDMA=Single Word DMA, MWDMA=Multi Word DMA, UDMA=UltraDMA.)
S.M.A.R.T.
Self-Monitoring Analysis and Reporting Technology (SMART) can help predict impending drive failures. Select "Auto" to allow BIOS to auto detect hard disk drive support. Select "Disabled" to prevent AMI BIOS from using the S.M.A.R.T. Select "Enabled" to allow AMI BIOS to use the S.M.A.R.T. to support hard drive disk. The options are Disabled, Enabled, and Auto.
Type
Select the type of device connected to the system. The options are Not Installed, Auto, CDROM and ARMD.
LBA/Large Mode
LBA (Logical Block Addressing) is a method of addressing data on a disk drive. The options are Disabled and Auto.
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Chapter 4: BIOS
PIO Mode
PIO (Programmable I/O) mode programs timing cycles between the IDE drive and the programmable IDE controller. As the PIO mode increases, the cycle time decreases. The options are Auto, 0, 1, 2, 3, and 4. Select Auto to allow AMI BIOS to auto detect the PIO mode. Use this value if the IDE disk drive support cannot be determined. Select 0 to allow AMI BIOS to use PIO mode 0. It has a data transfer rate of 3.3 MBs. Select 1 to allow AMI BIOS to use PIO mode 1. It has a data transfer rate of 5.2 MBs. Select 2 to allow AMI BIOS to use PIO mode 2. It has a data transfer rate of 8.3 MBs. Select 3 to allow AMI BIOS to use PIO mode 3. It has a data transfer rate of 11.1 MBs. Select 4 to allow AMI BIOS to use PIO mode 4. It has a data transfer rate of 16.6 MBs. This setting generally works with all hard disk drives manufactured after 1999. For other disk drives, such as IDE CD-ROM drives, check the specications of the drive.
DMA Mode
Selects the DMA Mode. Options are SWDMA0, SWDMA1, SWDMA2, MWDMA0. MDWDMA1, MWDMA2, UDMA0. UDMA1, UDMA2, UDMA3, UDMA4 and UDMA5. (SWDMA=Single Word DMA, MWDMA=Multi Word DMA, UDMA=UltraDMA.)
S.M.A.R.T.
Self-Monitoring Analysis and Reporting Technology (SMART) can help predict impending drive failures. Select "Auto" to allow BIOS to auto detect hard disk drive support. Select "Disabled" to prevent AMI BIOS from using the S.M.A.R.T. Select "Enabled" to allow AMI BIOS to use the S.M.A.R.T. to support hard drive disk. The options are Disabled, Enabled, and Auto.
4-7
PCI/PnP Conguration
Load Onboard LAN Option ROM
Use this setting to Enable or Disable the onboard option ROM.
Clear NVRAM
Select Yes to clear NVRAM during boot-up. The options are Yes and No.
Palette Snooping
Select "Enabled" to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function properly. The options are Enabled and Disabled.
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Chapter 4: BIOS
Bank Interleaving
Select Auto to automatically enable interleaving-memory scheme when this function is supported by the processor. The options are Auto and Disabled.
4-9
DRAM BG Scrub
Corrects memory errors so later reads are correct. Options are Disabled and various times in nanoseconds and microseconds.
L2 Cache BG Scrub
Allows L2 cache RAM to be corrected when idle. Options are Disabled and various times in nanoseconds and microseconds.
SouthBridge Conguration
USB 1.1 Controller
Enable or disable the USB 1.1 controller.
MAC0 LAN0
Settings are Auto and Disabled for MAC0 LAN0.
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Chapter 4: BIOS
MAC1 LAN1
Settings are Auto and Disabled for MAC1 LAN1.
MTRR Mapping
This determines the method used for programming CPU MTRRs when 4 GB or more memory is present. The options are Continuous, which makes the PCI hole noncacheable, and Discrete, which places the PCI hole below the 4 GB boundary.
Power Now
This setting is used to Enable or Disable the AMD Power Now feature.
4-11
Console Redirection
Remote Access
Allows you to Enable or Disable remote access. If enabled, the settings below will appear.
Flow Control
Selects the ow control to be used for console redirection. Options are None, Hardware and Software.
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Chapter 4: BIOS
Options are Disable (no redirection after BIOS POST), Boot Loader (redirection during POST and during boot loader) and Always (redirection always active). Note that some OS's may not work with this set to Always.
Terminal Type
Selects the type of the target terminal. UTF8. Options are ANSI, VT100 and VT-
4-13
Level1 Temperature
Set the reference point to transfer to the next fan speed.
Level2 Temperature
Set the reference point to transfer to the next fan speed.
Other items in the submenu are systems monitor displays for the following information: CPU1 Temperature, CPU2 Temperature (for 2U systems), System Temperature, VCoreA, VCoreB (for 2U systems), CPU1 Mem VTT, CPU2 Mem VTT, CPU1 Mem, CPU2 Mem, VDD, 1.5V, MCP55 VCcore, 3.3V, 12V, -12V, 5V VSB and VBAT.
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Chapter 4: BIOS
IPMI Conguration
View BMC System Event Log
Pressing the Enter key will open the following settings. Use the "+" and "-" keys to navigate through the system event log.
IP Address
Use the "+" and "-" keys to select the parameter. The IP address and current IP address in the BMC are shown.
MAC Address
Use the "+" and "-" keys to select the parameter. The MAC address and current MAC address in the BMC are shown.
Subnet Address
Use the "+" and "-" keys to select the parameter. The subnet address and current subnet address in the BMC are shown.
4-15
Startup Delay
Use this setting to Enable or Disable the startup delay.
4-4
Boot Menu
1st Drive
Species the boot sequence for the 1st Hard Drive.
Removable Drives
This feature allows the user to specify the Boot sequence from available removable drives.
1st Drive
Species the boot sequence for the 1st Removable Drive. The options are 1st Floppy Drive and Disabled.
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Chapter 4: BIOS
CD/DVD Drives
This feature allows the user to specify the Boot sequence from available CD/DVD drives.
OS Installation
Change this setting if using a 64-bit Linux operating system. The available options are Other and 64-bit Linux 2.6.9.
4-5
Security Menu
AMI BIOS provides a Supervisor and a User password. If you use both passwords, the Supervisor password must be set rst.
4-17
4-6
Exit Menu
Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen.
Discard Changes
Select this option and press <Enter> to discard all the changes and return to AMI BIOS Utility Program.
4-18
A-1
Beep Code
1 beep
Description
Circuits have been reset. (Ready to power up.) No memory detected in system Video adapter missing or with faulty memory
5 short, 1 long
Memory error
8 beeps
A-1
Notes
A-2
B-1
B-1
B-2
Checkpoint E0h E1h E2h E6h Edh Eeh Efh F0h F1h F2h F3h F4h F5h FBh FCh FDh FFh
Code Description The onboard oppy controller if available is initialized. Next, beginning the base 512 KB memory test. Initializing the interrupt vector table next. Initializing the DMA and Interrupt controllers next. Enabling the oppy drive controller and Timer IRQs. Enabling internal cache memory. Initializing the oppy drive. Looking for a oppy diskette in drive A:. Reading the rst sector of the diskette. A read error occurred while reading the oppy drive in drive A:. Next, searching for the AMIBOOT.ROM le in the root directory. The AMIBOOT.ROM le is not in the root directory. Next, reading and analyzing the oppy diskette FAT to nd the clusters occupied by the AMIBOOT.ROM le. Next, reading the AMIBOOT.ROM le, cluster by cluster. The AMIBOOT.ROM le is not the correct size. Next, disabling internal cache memory. Next, detecting the type of ash ROM. Next, erasing the ash ROM. Next, programming the ash ROM. Flash ROM programming was successful. Next, restarting the system BIOS.
B-2
B-3
The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM.
Checkpoint 03h 05h 06h 07h 08h 0Ah 0Bh 0Ch 0Eh 0Fh 10h 11h
Code Description The NMI is disabled. Next, checking for a soft reset or a power on condition. The BIOS stack has been built. Next, disabling cache memory. Uncompressing the POST code next. Next, initializing the CPU and the CPU data area. The CMOS checksum calculation is done next. The CMOS checksum calculation is done. Initializing the CMOS status register for date and time next. The CMOS status register is initialized. Next, performing any required initialization before the keyboard BAT command is issued. The keyboard controller input buffer is free. Next, issuing the BAT command to the keyboard controller. The keyboard controller BAT command result has been veried. Next, performing any necessary initialization after the keyboard controller BAT command test. The initialization after the keyboard controller BAT command test is done. The keyboard command byte is written next. The keyboard controller command byte is written. Next, issuing the Pin 23 and 24 blocking and unblocking command. Next, checking if <End or <Ins> keys were pressed during power on. Initializing CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the <End> key was pressed. Next, disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2. The video display has been disabled. Port B has been initialized. Next, initializing the chipset. The 8254 timer test will begin next. Next, programming the ash ROM. The memory refresh line is toggling. Checking the 15 second on/off time next. Passing control to the video ROM to perform any required conguration before the video ROM test. All necessary processing before passing control to the video ROM is done. Looking for the video ROM next and passing control to it. The video ROM has returned control to BIOS POST. Performing any required processing after the video ROM had control Reading the 8042 input port and disabling the MEGAKEY Green PC feature next. Making the BIOS code segment writable and performing any necessary conguration before initializing the interrupt vectors. The conguration required before interrupt vector initialization has completed. Interrupt vector initialization is about to begin.
24h
B-3
Checkpoint 25h 27h 28h 2Ah 2Eh 2Fh 30h 31h 32h 34h 37h 38h 39h 3Ah 3Bh 40h 42h 43h 44h 45h 46h 47h 48h 49h 4Bh
Code Description Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. Any initialization before setting video mode will be done next. Initialization before setting the video mode is complete. Conguring the monochrome mode and color mode settings next. Bus initialization system, static, output devices will be done next, if present. See the last page for additional information. Completed post-video ROM test processing. If the EGA/VGA controller is not found, performing the display memory read/write test next. The EGA/VGA controller was not found. The display memory read/write test is about to begin. The display memory read/write test passed. Look for retrace checking next. The display memory read/write test or retrace checking failed. Performing the alternate display memory read/write test next. The alternate display memory read/write test passed. Looking for alternate display retrace checking next. Video display checking is over. Setting the display mode next. The display mode is set. Displaying the power on message next. Initializing the bus input, IPL, general devices next, if present. See the last page of this chapter for additional information. Displaying bus initialization error messages. See the last page of this chapter for additional information. The new cursor position has been read and saved. Displaying the Hit <DEL> message next. The Hit <DEL> message is displayed. The protected mode memory test is about to start. Preparing the descriptor tables next. The descriptor tables are prepared. Entering protected mode for the memory test next. Entered protected mode. Enabling interrupts for diagnostics mode next. Interrupts enabled if the diagnostics switch is on. Initializing data to check memory wraparound at 0:0 next. Data initialized. Checking for memory wraparound at 0:0 and nding the total system memory size next. The memory wraparound test is done. Memory size calculation has been done. Writing patterns to test memory next. The memory pattern has been written to extended memory. Writing patterns to the base 640 KB memory next. Patterns written in base memory. Determining the amount of memory below 1 MB next. The amount of memory below 1 MB has been found and veried. The amount of memory above 1 MB has been found and veried. Checking for a soft reset and clearing the memory below 1 MB for the soft reset next. If this is a power on situation, going to checkpoint 4Eh next.
B-4
Checkpoint 4Ch 4Dh 4Eh 4Fh 50h 51h 52h 53h 54h 57h 58h 59h 60h 62h 65h 66h 67h 7Fh 80h 81h 82h 83h 84h 85h
Code Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset. Saving the memory size next. Going to checkpoint 52h next. The memory test started, but not as the result of a soft reset. Displaying the rst 64 KB memory size next. The memory size display has started. The display is updated during the memory test. Performing the sequential and random memory test next. The memory below 1 MB has been tested and initialized. Adjusting the displayed memory size for relocation and shadowing next. The memory size display was adjusted for relocation and shadowing. The memory above 1 MB has been tested and initialized. Saving the memory size information next. The memory size information and the CPU registers are saved. Entering real mode next. Shutdown was successful. The CPU is in real mode. Disabling the Gate A20 line, parity, and the NMI next. The A20 address line, parity, and the NMI are disabled. Adjusting the memory size depending on relocation and shadowing next. The memory size was adjusted for relocation and shadowing. Clearing the Hit <DEL> message next. The Hit <DEL> message is cleared. The <WAIT...> message is displayed. Starting the DMA and interrupt controller test next. The DMA page register test passed. Performing the DMA Controller 1 base register test next. The DMA controller 1 base register test passed. Performing the DMA controller 2 base register test next. The DMA controller 2 base register test passed. Programming DMA controllers 1 and 2 next. Completed programming DMA controllers 1 and 2. Initializing the 8259 interrupt controller next. Completed 8259 interrupt controller initialization. Extended NMI source enabling is in progress. The keyboard test has started. Clearing the output buffer and checking for stuck keys. Issuing the keyboard reset command next. A keyboard reset error or stuck key was found. Issuing the keyboard controller interface test command next. The keyboard controller interface test completed. Writing the command byte and initializing the circular buffer next. The command byte was written and global data initialization has completed. Checking for a locked key next. Locked key checking is over. Checking for a memory size mismatch with CMOS RAM data next. The memory size check is done. Displaying a soft error and checking for a password or bypassing WINBIOS Setup next.
B-5
Code Description The password was checked. Performing any required programming before WINBIOS Setup next. The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next. Returned from WINBIOS Setup and cleared the screen. Performing any necessary programming after WINBIOS Setup next. The programming after WINBIOS Setup has completed. Displaying the power on screen message next. Programming the WINBIOS Setup options next. The WINBIOS Setup options are programmed. Resetting the hard disk controller next. The hard disk controller has been reset. Conguring the oppy drive controller next. The oppy drive controller has been congured. Conguring the hard disk drive controller next. Initializing the bus option ROMs from C800 next. See the last page of this chapter for additional information. Initializing before passing control to the adaptor ROM at C800. Initialization before the C800 adaptor ROM gains control has completed. The adaptor ROM check is next. The adaptor ROM had control and has now returned control to BIOS POST. Performing any required processing after the option ROM returned control. Any initialization required after the option ROM test has completed. Conguring the timer data area and printer base address next. Set the timer and printer base addresses. Setting the RS-232 base address next. Returned after setting the RS-232 base address. Performing any required initialization before the Coprocessor test next. Required initialization before the Coprocessor test is over. Initializing the Coprocessor next. Coprocessor initialized. Performing any required initialization after the Coprocessor test next. Initialization after the Coprocessor test is complete. Checking the extended keyboard, keyboard ID, and Num Lock key next. Issuing the keyboard ID command next. Displaying any soft errors next. The soft error display has completed. Setting the keyboard typematic rate next. The keyboard typematic rate is set. Programming the memory wait states next. Memory wait state programming is over. Clearing the screen and enabling parity and the NMI next. NMI and parity enabled. Performing any initialization required before passing control to the adaptor ROM at E000 next. Initialization before passing control to the adaptor ROM at E000h completed. Passing control to the adaptor ROM at E000h next.
88h 89h 8Ch 8Dh 8Fh 91h 95h 96h 97h 98h 99h 9Ah 9Bh 9Ch 9Dh 9Eh A2h A3h A4h A5h A7h A8h
B-6
Code Description Returned from adaptor ROM at E000h control. Performing any initialization required after the E000 option ROM had control next. Initialization after E000 option ROM control has completed. Displaying the system conguration next. Uncompressing the DMI data and executing DMI POST initialization next. The system conguration is displayed. Copying any code to specic areas. Code copying to specic areas is done. Passing control to INT 19h boot loader next.
B-7
(continued from front) The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
B-8