Professional Documents
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Index
Index.....................................................................................................................................................2 List of tables.........................................................................................................................................2 Abstract ................................................................................................................................................3 Motivations ..........................................................................................................................................3 Obsolete components: ..................................................................................................................3 Electromagnetic noise:.................................................................................................................3 Absolute GPS time stamp: ...........................................................................................................3 Control Loop ................................................................................................................................4 Reference documentation.....................................................................................................................5 Production activities status...................................................................................................................6 Production Task 1: Atomic GPS receiver ........................................................................................6 Short description ..........................................................................................................................6 Status of the task: .........................................................................................................................6 Production Task 2: Timing distribution board.................................................................................6 Short description ..........................................................................................................................6 Status of the task: .........................................................................................................................8 Production Task 3: MUX/DeMUX board........................................................................................9 Short description ..........................................................................................................................9 Status of the task: .........................................................................................................................9 Production Task 4: ADC board........................................................................................................9 Short description ..........................................................................................................................9 Status of the task: .........................................................................................................................9 Production Task 5: TOLM.............................................................................................................10 Short description ........................................................................................................................10 Status of the task: .......................................................................................................................10 Deliverables .......................................................................................................................................11 Collaborators involved in the production tasks..................................................................................11 Expenditures and future budget .........................................................................................................11 Production and Installation Planning .................................................................................................12 Automatic information fields .............................................................................................................14
List of tables
Table 1 - Reference documentation .....................................................................................................5 Table 2 - Collaborators involved in the production tasks ..................................................................11 Table 3 Expenditures ......................................................................................................................11 Table 4 - Foreseen budget..................................................................................................................11
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Abstract
The goal is to upgrade the current control and DAQ system by a new one. The mains motivations are: Replace the old obsolete components Reduce the electromagnetic noise. Provide a fast access to an absolute GPS time stamp to all the front end electronics Reduce the jitter at the sensing or acting level(ADC, DAC) Reduce the noise level of the ADC readout Provide faster readout (ADC readout up to 800kHz, main Loop at least running at 20kHz) Increase the control loop phase margin and the computing power This document does not described the new DSP or the new DAC developed by EGO/Pisa.
Motivations
Obsolete components:
As a typical example, the current GPS board is GPS bc635VME/bc350VXI. This board is a ten year old board and we raise some problems due to a local battery which damage some wire on the printed circuit. This board is based on a 10MHz VCXO oscillator. We use this opportunity to upgrade the oscillator and to have a more stabilized oscillator.
Electromagnetic noise:
The timing system is again a typical example: it is based on four signals propagated using fibers between each building and coaxial cable (BNC) between the building distributor crate and each Timing board. The GPS VME board and the translator board are located on VME crate with switched-mode power supply. The new timing system will based on: 2 signals: 1PPS IRIGB frame and a fast clock Optical distribution between all the building distributor boxes Optical distribution between a building distributor box and a rack distributor box Differential LVDS distribution between the rack distribution box and the TOLM Timing Short single ended distribution between the TOML Timing and the sensing/acting driver(ADC/DAC, ) A GPS receiver and a timing distribution box with linear power supplies
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Control Loop
Due to the technical choices done ten years ago, the control loop is based today on 3 pipeline elements running synchronously at 10 KHz. To reduce the control noise into the loop, there is the needed of complex filtering algorithms which required more computing power and enough phase margin. Today to deal with this challenge, the computation is distributed over the 3 components and the filtering algorithms complexity reduced to fulfil the phase margin constraint. To increase the control loop phase margin and to provide more power computation, we propose: to reduce the number of elements involved in the control loop(two or one elements) to use more powerful CPU/DSP (PC server @ 2GHz/DSP @300MHz) to improve the data access path (MUX/DEMUX board) and to run at higher frequency the control loop
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Reference documentation
Table 1 - Reference documentation
1. The Virgo DAQ System ; RTAI proceedings, May 2003 (Overview of the control/DAQ system) 2. Consequence of the jitter noise on ADC readout; D. Tombolato; VIR-NOT-LAP-1390274 (3/08/04) 3. Control System Upgrade of the VIRGO interferometer. Timing Interface & Optical Links; O. Chautemps, et al. VIR-NOT-LAP-1390-278 (11/08/04) 4. Proposal for the Timing & Optical Links Mezzanine (TOLM); O. Chautemps, et al. VIR-NOT-LAP-1390-279 (11/08/04) 5. Preliminary Timing system interface requirements; O. Chautemps, et al. VIR-NOTLAP-1390-280 (11/08/04) 6. Connectors pin-out of the TOLM ver1.0 prototype; N. Letendre, O. Chautemps; VIRNOT-LAP-1390-281 (14/09/04) 7. MUX/DEMUX optical card specifications; N. Letendre, VIR-NOT-LAP-1390-321 (15/03/06) 8. TOLM Boundary Scan Board specifications, N. Letendre VIR-NOT-LAP-1390-322 (05/04/06) 9. New timing distribution system for Virgo: prospect for a full system from the market; S. Karkar. June 9, 2006, VIR-NOT-LAP-1390-323 10. EGO R&D program R&D, Final report for the Electronic Upgrade; Part I (Timing; TOLM, ADC; Analog Electronic) June 2006 11. ADC tests for the general purpose acquisition board, VIR-NOT-LAP-1390-329 (October 25, 2006) 12. EGO R&D program; Final report. R&D for the Electronic Upgrade; Part I (Timing; TOLM, ADC; Analogue Electronic) LAPP Annecy (June 2006) 13. R&D for the Electronic Upgrade; Part I; Presentation during the STAC June 2006 meeting. 14. New control and DAQ electronic Architecture and cost estimate, November 2007 15. ADC Board: Analogue input stage; Presentation during the Advanced Virgo WG4 meeting, November 21, 2006 16. ADC Board; ADC choice; Presentation during the Advanced Virgo WG4 meeting, November 21, 2006 17. Characterization of RTAI/ Linux real-time performance on i386 hardware for the Virgo control loops, VIR-NOT-LAP-1390-335, (Jan 16, 2007) 18. PC server Realtime Performances with RTAI-Linux , Presentation during the Advanced Virgo WG4 meeting, January 24, 2007 19. Proposal for the Online architecture based on the new digital electronics with PC and DSP; Presentation during the Advanced Virgo WG4 meeting, January 24, 2007 20. News from Annecy Virgo+ electronic developments; Presentation during the Advanced Virgo WG4 meeting, January 24, 2007
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The timing distribution box characteristics are: 3 input signal types driven by a input selector: o 4 TTL inputs o 4 LVDS inputs o 2 optical receiver(1300mn,multimode, length < 5Km) 2 output configurations o Type A: 2 TTL outputs(1PPS Fast Clock) 32 LVDS outputs with variable delay line(10.5-255ns) 32 LVDS outputs o Type B: 2 TTL outputs(1PPS Fast Clock) 64 LVDS outputs 12 optical transmitter(1300mn,multimode, length < 5Km) Linear power supply 220VAC/1.6A The scheme of a timing distribution box channel is showed in the following picture:
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The results are reported in the following table: MEASURE with 10 MHz signal
TDBox n1 Input Output BNC BNC BNC RJ-45 BNC Optic BNC Optic Long. Cble 1m 1m 5m 3 Km TDBox n2 Input Output RJ-45 Optic Optic BNC BNC BNC Measures Delay 14,86 ns 44,56 ns 69,09 ns 15,84 s
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The Timing distribution box is fully tested and basically ready for the production. It remains to define the number of box of the different types according the new online architecture (spring 2007), and do minor fixes to the PCB before starting the production.
A prototype exists and has fulfilled the basic electrical test. The Writing of the VHDL code is in progress as well as the TOLM test software needed for a full test of the board. When the board will pass this full test then the production could start.
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IRIG B
IRIG B Decoding
1PPS
Loc al
G P S Ti
Configuration Registers
BUS PCI
We have implemented and tested on the TOLM board the following items: Users signal configuration from PCI the TCXO oscillator servo loop driven by the 1PPS IRIGB frame
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Deliverables
See the reference [14] for the list of the main components to provide. The other references give information about the specification of the different components. The delivery schedule of the various components is described in the following planning section.
Name Bouedo Thierry Nappa Jean-Marc Letendre Nicolas Masserot Alain Mours Benoit Pacaud Emmanuel Vilalte Sbastien XX
Activities/role Software Engineer Electronic Engineer Electronic Engineer Software Engineer Physicist Software Engineer Electronic Engineer Electronic Support (requested to LAPP)
The expenditures have been supported by the EGO R&D program. For details up to May 2006, see the reference [12]. Since then an additional 39610 Euros for expenditures have been spend on this program and the fellowship program completed
Table 4 - Foreseen budget
The foreseen budget is estimate in reference [14], section 3. Notice that this estimate does not include the taxes, the network upgrade or the DAQ main workstations (olservers) upgrades. Some parts could be order directly by EGO under the guidance of LAPP like the PCs (40kE + network + workstations, to be ordered in 2008), but the production of boards that required multiples orders needed to be directly handled by LAPP with a convention between EGO and LAPP as usual (estimate to 285kEuros without taxes in 2007).
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Remarks: This planning is focus on the construction of the real time components of the system. Other satellite task like the upgrade of the DAQ workstations are needed but not included in this planning, since it is not on the critical path. The first installation of some timing components will be in parallel of the existing system. Therefore it should be transparent for the user.
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The second installation phase ADC+ TOLM+ means a full stop of all the controls. Only the hardware installation is quoted here. Additional time (at least several weeks) will be needed to deploy the software and debug the full system. Support from EGO people doing the DAQ support will be welcome during the tests of the production and also during the installation at the site.
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