201O Interational Conference on Computer, Mechatronics, Control and Electronic Engineering (CMCE)

Research and Design of wireless transmission system based on nRF905

Wu Dengfeng
College of Computer Science and Technology
Jilin University
College of Computer Science and Technology
Changchun Normal University
Changchun,130012,China
wdC@163.com
Abstract--In this paper, LPC2200 Series processors and
wireless transceiver module nRF905 are used to build the
wireless network transmission system hardware platform.
The hardware interface and equipment performance of
LPC2200 processor and nRF905 are introduced and the
design is proposed. The architecture of hardware circuit
between embedded processor and wireless module is given,
the processor I / 0 pins control procedures is designed, SPI
bus data transfer function, driver of nRF905 and wireless
data transmission function are programmed . This paper
uses RFID technology to achieve a low rate of data
transmission functions. This paper provides some reference
for continue in-depth studying on wireless networks and
realizing data communications in short distance.
Keywords: Comuter Applcation wireless transmission
embedded system ARM7 nRF905
1. INTRODUCTION
The development of wireless transmission technology
has a profound impact on achitecture of wireless mobile
networks and protocols. How to transmit the data on
wireless mobile networks effciently has become a
research hotspot [1-4]. A variety of emerging wireless
communication technology develops, which provides a
vaiety of options for solving te wireless transmission
system. Through understading and studying these popular
wireless technology protocols, the advantages of these
technologies in performance mainly refect in their high
transmission speed. The data rate of Wi-Fi technology that
centers on 802.11 protocols can reach 54Mps. However,
the biggest drawback of these transmission technology
protocols is that their tansmission distance is short. Te
longest transmission distance of Wi-Fi whose transmission
technology bases on 802.11 protocols, can only reach
about 100 meters under the conditions of using no routers.
And even the transmission distance of Bluetooth is only
within 10 meters. This distance can not meet the needs of
users obviously, for a distance of 100 meters or more, an
increase of routing equipment has become an inevitable
choice. But the cost of overaJI system wiJI increase as the
routing equipment increases.
To solve this problem, this paper proposes the program
that uses wireless transceiver modules nF905 as wireless
data transmission equipment. The main aim of this method
is to attempt to study out the solution which improves
transmission distance at no additional routing equipment
and provide certain reference for the frther study of short
range wireless transmission systems.
978-1-4244-7956-6/1 0/$26.00 20 1 0 IEEE
316
Zhao Hongwei
*
, Du Hongyun, Qi Yiming
College of Computer Science and Technology
Jilin University
Changchun, China
zhaohw@jlu.edu.cn
II. SYSTEM HARDWARE DESIGN
A. wireless transmission system architecture
Wireless transmission system is mainly composed of
the wireless transmitter and wireless receiver. The data is
generated by the embedded processor, which is sent to the
equipment through the data bus, and control the sending
module's state. The data fom the wireless transmitter
module is converted to analog signals and is sent using
radio fequency technology trough the carrier. At the
receiving terminal, the receiver processor adjusts the
receiver module's confguration and status, then wireless
receiver modules converts the received carier data into a
digital signal and saves in buffer memory of the receiver
module, the processor gets the data by reading the receiver
module's buffer memory. Te structure of wireless
transmission system's hardware component is shown II
Figure 1.
Transmittina
Antenna
Wireless Data
Send Equipment
Acquisition side
Embedded
Equipment
1\,"i\'

,
)
X
,, ireless netwrk
$ ^
#
# %

~ ~ f ^
'
.
Receiving
Antenna
Wireless Data
Receive
Equipment
Receiving
Terminal
Embedded
Equipment
Figure 1. architecture of wireless transmission system
B. nRF905 wireless communication module
f
nRF905 is a single-chip radio transceiver which is
made by Norway's Nordic VLS1. nRF905 communicates
with a microcontroJIer by SPI interface, it is easy to
confgure. Communication module operating fequency of
nRF905 with an exteral antenna is 433Mz, the
maximum rate is 100kbps, the maximum emission power
is + 10 dBm, operation mode is half-duplex. This module
has 256 channels to meet a few more points and fequency
hopping communications, debug mode is GFSK; receiving
sensitivity is -lOOdBm, transmission distance is about 300-
500M or so in the open ground. As wireless
communication module are relatively weak anti-jamming
device, the module design and welding needs strong
technical and professional nature which involve knowledge
CMCE 2010
of electronics and communications. It is very diffcult to
self develop it, so nF905 communication module IS
choose, which is produced by the Suzhou Tianyi Co ..
C Embedded processor LPe2200 series
LPC2200 series are microcontrollers which take
ARM7TDMI-S as core, which is produced by PHILIPS.
ARM7TDMI-S is a general-purpose 32-bit microprocessor,
which has the features of high performance and low power
consumption. LPC2294 is 16/32-bit ARM7TDMI
STMCPU with 256k bytes of embedded high-speed Flash
memory, which based on a real-time simulation and
tracking. 128-bit wide memory interface and a unique
acceleration of structure make 32-bit code run at maximum
clock rate. This study uses MagicARM2200 experimental
development platform, which takes LPC2294 as the core.
D. System interface and connection circuits
nRF905 wireless communication module provides a
14-pin exteral which include one power supply pins
(VCC), two ground pins (GND), three state control pin
(TX_EN, CE, POWER_UP), one waveform output pin
(uPCLK), three state output pin (CD, DR, AM)and three
SPI pins.
nRF905 has three pins are used in the state output,
namely:
CD (Carrier Detect): If the receiver detects a carier
fequency bands, CD is high.
AM (address matching): Testing carier data in the
address byte, if it is same with the confgured receive
address, AM is high.
DR (Data Ready): If detecting the CRC checksum is
correct in the received data, the valid data bytes are stored
and set DR high. By reading the value of the pin level, it
can deterine whether the data has reached the registers of
reception equipment corectly.
nRF905 SPI bus includes four pins: CSN (SPI enabled),
SCK (SPI clock), MISO (Master In Slave Out) and MOSI
(master out fom the entry). Here, nRF905 is the slave
machine, the SPI clock has a wide range, fom I Hz-I0
MHz, so it is no need to judge the accuracy critical when
the processor control program is written.
nRF905 communicates with LPC2294 by using SPI
bus, therefore, nRF905 SPI pins are connected with
LPC2294 SPI pins. P0.4-PO.6 is a SPI fnctional pin, PO.4
receives SPI clock signal, the fnction of PO.5 is MISO
(Master In/Slave Out), the fnction of PO.6 is MaS I
(Master Out/Slave In). The other pins of nRF905 have
only input or output state except uPCLK, therefore it only
needs to select seven pins with 10 (input output) fnction.
nRF905 hardware circuit connection is shown in Figure 2.
III. SYSTEM SOFTWARE DESIGN
A. SP] Data Transfer Program Design
Considering fll communication protocols and CRC in
NRF905 module, the main work of study in this paper is
concentrated on how to achieve an effective initial
confguation of nRF905 module, and realize the
communication between LPC2294 and nRF905 module.
SPI is a fll-duplex serial interface, in data transmission,
the master always sends a byte of data to the slave and that
the slave always sends a byte of data to the host. In SPI bus
initialization, two registers should be confgured: SPCR
317
and SPCCR. SPCR controls te SPI transfer mode and
SPCCR controls the SCK clock fequency of the master.
Through the confguration of these two registers, SPI pins
of processor are initialized, such as timing etc.

GND

GND vcc

P1.17 +
EN CE
0

P1.16
PWR uPLK

PO 23
CD A

PO.24 +
DR MISO
8
l
PO.6

MOSI SCK

PO 20
CSN GND

Figure 2. Architecture of hardware circuit

Determine divisor and
control registers
Figure 3. Flow chart of SPI data trasfer
3V
P 1. 18
PO.15
PO.25
PO.5
PO.4
GND
Afer confguring SPI, the data transfer program
between the processor and nRF905 are programmed.
When the host sends data, the fequency division value and
contol registers are deterined at frst, and then the data
are sent directly into the data register SPDR that initiates
an SPI transfer, fnally SPIF in the highest bit of SPI status
register is set to I that indicates transmission is completed.
SPI data transfer process is shown in Figure 3.
When the host receives data, the way adopted are the
same with the host sending way, just the host sends data
can be arbitrary, and its main puose is to get the data sent
fom the slave machine. To simplif the procedures, two
fnctions are combined into one fnction.
uint8 SendData(uint8 data)
{
SOPDR = data;
While (0==(SOPSR&Ox80) );
II to wait for SPIF set, that IS waiting for data
transmission is completed
Retur (SOPDR);
}
B. nRF905 Module Programming
nRF90S has four operating modes: power-down mode,
standby mode, radio fequency receive mode and radio
fequency transmit mode. The four models can be selected
by controlling three nRF90S pins. When ever SPI data
exchange operations, nRF90S needs to switch to standby
mode.
Permit the slave machine to
work CSN=O
Send configration
order byte OOH
Forbid the slave machine to
workCSN=1
Figure 4. Flow chart of writing out R Confguration
Before using NRF90S, te radio fequency should be
confgured. The frst step is to switch operating mode to
standby mode, permit the slave machine to work, and then
send a command to write radio confguration, and then
send a radio confguration bytes, the last forbid the slave
machine to work, and complete nRF90S RF confguration
register settings. RF confguration register has 10 bytes
including the center fequency, the wireless transmit power
confguation, receiver sensitivity, the effective number of
bytes sent and received data, receiver address etc. RF
confguration process is shown in Figure 4.
Besides radio confguration, nRF90S driver fnctions
include read and write fnctions which send I receive
address and data buffer and so on.
As sending data: nRF90S is set standby mode
(PWR UP pin is high, TRX_CE pin is low), and then the
send a
d
dress and the data to be sent are written into the
coresponding register through the SPI bus, fnally nRF90S
is set at tansmit mode (PWR_UP, TRX_CE and TX_EN
are set high), the data is automatically sent via the antenna.
318
Switch to receive mode
N
y
Switch to standb mode
Figure 5. fow chart of receiving data packet
As receiving data: In the nRF90S standby mode, the
receiving address in the RF confguration register is
written, and set it at receive mode (PWR _ UP= 1,
TRX CE=I, TX EN=O), then nRF90S will automatically
recei
v
e the air ca
r
ier. If the data received is matched with
the addresses and checked, DR pin will automatically be
set higher, the signal is detected by LPC, nRF90S is set at
standby mode and the valid data is read fom the receive
data register through the SPI bus. Data packet reception
process is shown in Figure S.
C. Wireless Communication Softare Design
In order to monitor the sending process conveniently,
the SPI should be initialized and some other exteral
control devices should be confgured at frst. Then nRF90S
is initialized and the main work is to confgure radio
settings. Finally, data packets are send in the form of
repeated cycles through the serial port to the Pc. If the
statistical fnctions which is used to statistic the number of
data packets is build, the data transmission speed can be
calculated.
void mai_Tx (void)
{
Init 0; Ilinitialization
nRFconfg (RIxConO;
I I Send RF confguration
While (1)
{
I02SET = Oxffffffff;
II off shows that it begins to send data
DeiayNS (10);
TxPacket (TxAddr, RIxCon[3], TxBuf, RIxCon[3]);
Iisend data packet
RTxAddr (temp, 32);
Ilread sending address
Delay (1);
Uart (temp, 4);
Iidisplay sending address
RTxData (temp, RIxCon[4]);
Ilread sending data
}
}
Delay (1);
Uart (temp, RIxCon[4]);
Iidisplay sending data
I02CLR Oxffaaffff;
lion shows that it ends to send data
DelayNS (60);
In the procedure, InitO fnction is primarily
responsible for the serial port, SPI, and LED lights and
other equipment initialization; TxPacketO fnction
includes four parameters, the frst parameter indicates the
addess to send data, the second parameter indicates the
length of the address to send data, the third parameter
indicates the fst address to send data buffer, the fouh
parameter indicates the number of sending data. Uart(x, y)
sends data to the PC for observation through the serial port
to.
When testing wireless communication module
recelvmg terminal, frstly the transmitting terinal is
maintained at sendig state, then the receiver fnction is
r. Receiver fnction initializes the serial port, SPI bus,
LED lights and other equipments, and confgures the RF
confguration register of the receiving terminal, then
switches to receive mode, receives data packets and stores
the data in the buffer. The serial port program reads the
received data fom the receive data buffer and the data are
sent to the PC to show the results received.
IV. EXPERIMENT RESULTS
Afer testing, the speed of transmitting terminal is
about 4.2 Kbps. Apparently, it did not reach 100Kbps
which is the speed of nRF905 standard. Afer analysis, the
main factors are shown as follows: the processor and
nRF905 interface circuit, serial applications. The serial
port is responsible for reading the data packets, which is
relatively time-consuming operation, thus the sending rate
is reduced. Wireless communication technology is signal
sensitive, thus interface cicuit design is difcult. Limited
to equipment conditions, circuit between processor and
wireless modules is simple relatively, which is the main
factors affecting the speed.
V. CONCLUSION
This paper focuses on wireless data transmission
systems. Wireless commuication module nRF905 and the
ARM7 processor based on LPC2294 are selected to build
the program's hardware development platform. The
platform can meet the basic requirements of wireless
319
communications, which can build the communication
between some wireless communication nodes. The
experiment results verit the feasibility of that nRF family
of devices is used as wireless transmission system
hardware platform in the low-rate.
In the past, nRF family of devices always worked with
the 51 categories processors, but the 51 class processor SPI
interface can only simulate the transmission format, that
greatly reduces system performance. In this paper, ARM7
is used which provides a SPI fnctional pin. By this means,
not only the performance is improved, but also the
difculty of programming is reduced and the readability of
the program is improved.
Limited to equipment performance, this study did not
play the best device perforance, and subject to frther
research. Although this study is not adequately effective,
but the feasibility of the program is proved which provides
an alterative solution for the wireless communications
system.
ACKNOWLEDGMENT
The corresponding author is Zhao Hongwei. Te
authors are gratefl to the anonymous reviewers for their
helpfl and insightfl comments which have certainly
improved this paper.
This work is supported by Plan for Scientifc and
Technology Development of Jilin Province (20080527).
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