Department of Electronics & Communication Engineering

Project Seminar Report On Home Security System

B.E (ECE) IV Year, I Semester (2011-2012)

CONTENTS:
1. Introduction. 2. Circuit Description. 3. Working of the circuit. 4. Software Program. 5. Components.
y 5.1 Microcontroller AT89C51 y 5.2 NE555 IC y 5.3 Phase Locked Loop y 5.4 Programmable Peripheral Interface y 5.5 Voltage Regulators (7805,7809) y 5.6 Relay(12V, 200 ohm):

6. Applications of our Project. Summary References

1. Introduction:
Engineering is not only a theoretical study but it is a implementation of all we study for creating something new and making things more easy and useful through practical study. It is an art which can be gained with systematic study, observation and practice. In the college curriculum we usually get the theoretical knowledge of industries, and a little bit of implementation knowledge. Now, lets use this knowledge for our own security. Why take the chance of becoming victim of burglary, which is often accompanied by violence? Lets protect our family and valuables with this home security system that will let us rest our head knowing that should anyone try to break into our home, a siren will go off and the burglar would be startled and run away. The transmitter section continuously transmits IR rays which are received by the receiver section. The received signal is further amplified and given to the PLL section, where its frequency is locked to the transmitted frequency. When the IR signal is interrupted, the microcontroller starts working as per the program burnt into the EPROM and controls the siren via the respective relay. Thus, the system provides an excellent security when intruded. The entire system can be turned on or off with the help of a switch which monitors the power supply for both the transmitter and the receiver. Also with a few basic modifications this system forms the basis for many high security applications.

BLOCK DIAGRAM OF THE HOME SECURITY SYSTEM:

2. Circuit Description:
The circuit can be clearly split into two sections, one being the transmitter and the other being the receiving section for easier and better explanation of its working.

(A) Transmitter Section:

In the transmitter section, NE 555 (IC1) is wired as an astable multivibrator whose oscillating frequency is decided by resistors R1 and R2, preset VR1 and capacitor C1. Capacitor C3 bypasses the noise to ground, preventing any change in calculated pulse-width. The output of NE555 is fed to the base of the transistor T1, which drives an IR LED to transmit the modulated IR signal. R4 limits the current flowing through the IR LED. Preset VR1 is used to vary the modulating frequency.

(B) Receiver Section:

The transmitter and receiver are arranged such that the transmitted IR rays fall directly onto the phototransistor T2 LI4GI of the receiver. The signal received by T2 LI4GI is amplified by transistor T3 and operational amplifier A741 (IC2). Series input resistor R8 and feedback resistor R9 determine the gain of operational amplifier IC2. The amplified signal is applied to pin 3 of Phase Locked Loop (PLL) LM567 (IC3) through capacitor C4. IC LM567 is highly stable PLL with synchronous amplitude modulation lock detection and power output circuitry. It is primarily used as frequency decoder which drives a load whenever a sustained frequency falling within its detection band is present in its self biased input. The centre frequency is determined by the external components. In the absence of any input signal, the centre frequency of PLLs eternal free running current control oscillator is determined by resistor R12 and capacitor C8. Preset VR2 is used for tuning IC3 to the desired centre frequency in the 6-10 kHz range, which should match the modulating frequency of the transmitter. Capacitors C6 and C7 are used as low pass filters. When the received signal is locked to frequency of transmitter signal pin 8 of IC3 goes low and LED 1 glows. Resistor R11 limits the current flow through LED 1. Since pin 8 is connected to the base of transistor T4 through R13 its collector voltage rises. As a result transistor T5 is forward biased to energize the relay RL5 and the pole and normally closed contact of RL5 are connected to +5v. When the signal is not received, there is no frequency to lock which results in the pin 8 of IC3 to go high. Because of this the LED 1 does not glow. Also the arrangement of the transistors T4 and T5 causes the Relay RL5 to de-energise which results in the port A line of the Programmable Peripheral Interface which is interfaced to the microcontroller to go high. The low order multiplex address and data lines AD0 though AD7 of the microcontroller are connected to the EPROM through the latch, while its high order address line A8 through A10 are directly connected to the EPROM. Address lines A0 through A7 are separated from data lines D0 through D7 by latch enable single. Address latch enable pin 30 of the microcontroller is connected to latch enable pin 11 of the latch. When ALE is high the latch is transparent. The output changes according to the input data when ALE goes low, the low order address is latched at the input of the latch. Data lines D0 through D7 of microcontroller are connected to data lines of EPROM and Programmable Peripheral Interface each. Chip select signal for EPROM is generated by RD and IO/M lines with the help of NAND gate. The inverted IO/M signal provides CS signal through Programmable Peripheral Interface.

Out Of the three ports available in Programmable Peripheral Interface, port A is configured as input port and port B is configured as output port. Port A is used for interdetection and port B for activating the siren. A relay is used for the connection between the Programmable Peripheral Interface and the Siren. The AC mains are stepped down by transformer to deliver a secondary output of 12V AC at 300 mA. The transformer output is rectified by a full-wave bridge rectifier comprising four diodes. A Capacitor acts as a filter to eliminate ripples. Voltage Regulators provide regulated 5V and 9V power supplies. Two Capacitors bypass any ripples present in the regulated output. A Switch is used to act as an ON/OFF switch to disable the system when needed.

y Relay connections:
Relay RL5 oversees the main action of the entire system that is of alerting the microcontroller of the signal being intruded. Another Relay activates the siren whenever the IR signal being received is interrupted. Siren sounds continuously until the user presses the reset button.

3. Working of the Circuit:

The IR LED1 of the transmitter and phototransistor T2 LI4GI of the receiver are fitted on either sides of the door such that the IR rays emitted by the LED directly fall on the phototransistor. The IR LED transmits a train of IR pulses. These pulses are received by the receiver and amplified by the operational amplifier. Output pin 8 of the PLL (IC3) is low when the PLL network is locked to the transmitter frequency and relay RL5 energies to make port A lines of the Programmable Peripheral Interface low. When someone walks through the door to enter your home, the transmitted signal is interrupted. Output Pin 8 of the PLL network goes high and relay RL5 de-energies to make PA0 line of Programmable Peripheral Interface high. Now the microprocessor starts working as per the program loaded in the EPROM. Another Relay connected between the Programmable Peripheral Interface and the Siren energies to activate the siren. In order to deactivate the Siren the reset button has to be pressed. The system can be turned ON/OFF by the external switch which supplies the power to both the transmitting and receiving section.

Software Program:
Figure shows the flow chart of the Assembly language program to be loaded into the EPROM. The control word register of the Programmable Peripheral Interface is initialized with control word 90H. This turns port A of the Programmable Peripheral Interface to act as input port while port B acts the output port.

When the IR signal is interrupted the program loaded into the EPROM becomes active. After initialization, the AT89C51 microcontroller reads the status of port A. As long as the port A is low, it keeps on reading the port for it to go high. Port A remains to be low as long as there is no interruption of the IR signal. If there is an interruption, port A does go high and the output is seen through port B which results in the siren being activated. The siren sounds until the reset switch is pressed.

5. Components:
y 5.1 Microcontroller AT89C51 y 5.2 NE555 IC y 5.3 Phase Locked Loop y 5.4 Programmable Peripheral Interface y 5.5 Voltage Regulators (7805,7809) y 5.6 Relay(12V, 200 ohm):

5.1. Microcontroller AT89C51:

y Features:
Compatible with MCS-51 Products 4K Bytes of In-System Reprogrammable Flash Memory Endurance: 1,000 Write/Erase Cycles Fully Static Operation: 0 Hz to 24 MHz Three-level Program Memory Lock 128 x 8-bit Internal RAM 32 Programmable I/O Lines Two 16-bit Timer/Counters Six Interrupt Sources Programmable Serial Channel Low-power Idle and Power-down Mode

y Description:
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4Kbytes of Flash erase-able and programmable read only memory (EPROM). The device is manufactured using Atmels high-density non-volatile memory technology and is compatible with the industry standard MCS-51 instruction set and pin out. The on-chip Flash allows the program memory to be re-programmed in system or by a conventional non-volatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly flexible and cost-effective solution to many embedded control applications. y

Pin Configuration:

y Architecture:

The AT89C51 provides the following standard features: 4K bytes of Flash memory, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Powerdown Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

y Pin Description:
y VCC
Supply voltage.
y

GND

Ground. y

Port 0

Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode Port 0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification. y

Port 1

Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current because of the internal pull-ups. Port 1 also receives the loworder address bytes during Flash programming and verification.

Port 2

Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses. In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses, Port 2 emits the contents of the Port 2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. y

Port 3

Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89C51 as listed below:

RST

Reset input. A high on this pin for two machine cycles resets the device while the oscillator is running. y

ALE/PROG

Address Latch Enable outputs pulses for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash Programming: In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note that however one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. y

PSEN

Program Store Enable is used as the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. y

EA/VPP

External Access Enable (EA) must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP. y

XTAL1

It is the Input to both the inverting oscillator amplifier and the internal clock operating circuit.

XTAL2

It is the output from the inverting oscillator amplifier. It remains unconnected while XTAL1 is driven. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage, high and low time specifications must be observed. y

Idle Mode

In the Idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by the software. The content of the on-chip RAM and all the Special Function Registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when the idle mode is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when the idle mode is terminated by reset, the instruction following the one that invokes the idle mode should not be one that writes to a port pin or to an external memory.

yData Polling:
The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written data item on PO.7. Once the write cycle has been completed, true data are valid on all outputs and the next cycle may begin. Data Polling may begin at any time after a write cycle has been initiated.

yReady/Busy:
The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.

yProgramming Algorithm:
Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table. To program the AT89C51 the following steps are to be followed: 1. Input the desired memory location on the address lines. 2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V for the high-voltage programming mode. 5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The bytewrite cycle is self-timed and typically takes no more than 1.5 msec. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached.

y Programming Interface:
Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self timed and once initiated will automatically time itself until completion.

yProgram Verify:
If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. But indirectly the verification of the lock bits is achieved by observing the features that are enabled.

yChip Erase:
The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all 1s. The chip erase operation must be executed before the code memory can be re-programmed.

5.2. NE555 IC:

y Description:
The NE555 is a highly stable controller capable of producing accurate timing pulses. With monostable operation, the time delay is controlled by one external resistor and one capacitor. With astable operation, the frequency and duty cycle are accurately controlled with two external resistors and one capacitor.

y Features:
It provides high current drive capability (200mA). It has an adjustable duty cycle. Its timing ranges from few sec to few tens of hours.

y Applications:
Used in Precision Timing circuits. Used for Pulse Generation in analog circuits. Used for Time Delay Generation. Used for Sequential Timing in digital circuits.

y Internal Block Diagram:

y Astable Operation:
y Astable Circuit:

y Mono-stable Operation:
y Mono-stable Circuit:

y Waveforms of Mono-stable Operation:

5.3. Phase Locked Loop:

A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input "reference" signal. It is an electronic circuit consisting of a variable frequency oscillator and a phase detector. This circuit compares the phase of the input signal with the phase of the signal derived from its output oscillator and adjusts the frequency of its oscillator to keep the phases matched. The signal from the phase detector is used to control the oscillator in a feedback loop. Frequency is the derivative of phase. Keeping the input and output phase in lock step implies keeping the input and output frequencies in lock step. Consequently, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. The former property is used for demodulation and the latter property is used for indirect frequency synthesis.

y Internal Block Diagram:

y Applications:

y y y y y y

Widely used in radio, telecommunications, computers and other electronic applications Demodulation of both FM and AM signals Clock recovery Clock generation Clock distribution Spread spectrum

5.4 Programmable Peripheral Interface:

y Features:
y y y y Three 8-bit I/O ports Port A, Port B and Port C Port A can be set for modes 0, 1 and 2. Port B for 0and 1. Port C for mode 0 and for BSR Modes 1 and 2 are interrupt driven Port C has two 4-bit parts: Port C upper (PCU) and Port C lower (PCL). Each can be set independently for input or output. Each Port C bit can be set/reset individually in BSR mode

y y y y

Port A and PCU are Group A (GA) and Port B and PCL are Group B (GB) Address/data bus must be externally demux'd TTL compatible Improved dc driving capability

y Pin Configuration:

y Architecture:

y Operational Modes:
There are two main operational modes of 8255: Input/output mode & Bit set/reset mode.

1. Input/Output Mode:
There are three types of the input/output modes which are as follows: Mode 0: In this mode, the ports can be used for simple input/output operations without handshaking. If both port A and B are initialized in mode 0, the two halves of port C can be either used together as an additional 8-bit port, or they can be used as individual 4-bit ports. Since the two halves of port C are independent, they may be used such that one-half is initialized as an input port while the other half is initialized as an output port. The input/output features in mode 0 are as follows: 1. Outputs are latched. 2. Inputs are buffered but not latched. Mode 1: When we wish to use port A or port B for handshake (strobe) input or output operation, we initialise that port in mode 1. Some of the pins of port C function as handshake lines. For port B in this mode (irrespective of whether is acting as an input port or output port), PC0, PC1 and PC2 pins function as handshake lines. If port A is initialised as mode 1 input port, then, PC3, PC4 and PC5 function as handshake signals. Pins PC6 and PC7 are available for use as input/output lines. The mode 1 which supports handshaking has following features: 1. Two ports i.e. port A and B can be used as 8-bit I/O ports. 2. Each port uses three lines of port C as handshake signal and remaining two signals can be used to function as I/O port. 3. Interrupt logic is supported. 4. Input and Output data are latched. Mode 2: Only group A can be initialised in this mode. Port A can be used for bidirectional handshake data transfer. This means that data can be input or output on the same eight lines (PA0 - PA7). Pins PC3 - PC7 are used as handshake lines for port A. The remaining pins of port C (PC0 - PC2) can be used as input/output lines if group B is initialised in mode 0. In this mode, the 8255 may be used to extend the system bus to a slave microprocessor or to transfer data bytes to and from a floppy disk controller.

2. Bit Set/Reset Mode:

In this mode only port B can be used (as an output port). Each line of port C (PC0 - PC7) can be set/reset by suitably loading the command word register. No effect occurs in input-output mode. The individual bits of port C can be set or reset by sending the signal out instruction to the control word register.

5.5. Voltage Regulators (7805, 7809):

The LM78XX series of three terminal positive regulators are available with several fixed output voltages, making them useful in a wide range of applications. Each type employs internal current limiting, thermal shut down and safe operating area protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltages and currents.

y Features:
Output Current up to 1A Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24V Thermal Overload Protection Short Circuit Protection

y Internal Block Diagram:

5.6. Relay (12V, 200 ohm):

A relay is an electrical switch that opens and closes under control of another electrical circuit. The switch is operated by an electromagnet to open or close one or many sets of contacts. A relay is able to control an output circuit of higher power than the input circuit. Thus it can be considered as a form of an electrical amplifier.

y Operation:
When the current flows through the coil, the resulting magnetic field attracts an armature that is mechanically linked to a moving contact. The movement either makes or breaks a connection with a fixed contact. When the current to the coil is switched off, the armature is returned by a force that is half as strong as the magnetic force to its relaxed position. Usually this is a spring, but gravity is also used commonly in industrial motor starters. Relays are manufactured to operate quickly. In a low voltage application, this is to reduce noise. In a high voltage or high current application, this is to reduce arcing. If the coil is energized with DC, a diode is frequently installed across the coil, to dissipate the energy from the collapsing magnetic field at deactivation, which would otherwise generate a spike of voltage and might cause damage to circuit components. If the coil is designed to be energized with AC, a small copper ring can be crimped to the end of the solenoid. This shading ring creates a small out-of-phase current, which increases the minimum pull on the armature during the AC cycle.

y Description:
The contacts in a Relay can be either Normally Open (NO), Normally Closed (NC), or Change-Over contacts. Normally-open contacts connect the circuit when the relay is activated and disconnect it when the relay is inactive. It is also called Form A contact or make contact. Form A contact is ideal for applications that require to switch a high-current power source from a remote device. Normally-closed contacts disconnect the circuit when the relay is activated and connect it when the relay is inactive. It is also called Form B contact or break contact. Form B contact is ideal for applications that require the circuit to remain closed until the relay is activated. Change-over contacts control two circuits i.e., one normally-open contact and one normallyclosed contact with a common terminal. It is also called Form C contact or transfer contact.

y Applications:
y y Amplify a digital signal, switching a large amount of power with a small operating power Detect and isolate faults on transmission and distribution lines by opening and closing circuit breakers y y Logic functions Time delay functions

6. Applications of our Project:

y

Basically this project can be used for security. We are using this project here for providing security to our home, similarly we can use this project to protect any restricted area like power plant security, Border security etc.

This project can be used to operate any device automatically, in this application the interruption of the infrared waves is use to operate the device.

y y

It can be used for military purposes. It can be used as Power supply regulators.

Summary:
The transmitter section continuously transmits IR rays which are received by the receiver section. The received signal is further amplified and given to the PLL section, where its frequency is locked to the transmitted frequency. When the IR signal is interrupted, the microcontroller starts working as per the program burnt into the EPROM and controls the siren via the respective relay. Thus, the system provides an excellent security when intruded. The entire system can be turned on or off with the help of a switch which monitors the power supply for both the transmitter and the receiver. Hence, this is one the most economical and easy to setup systems which can be used to protect our homes.

References:
y y y y y

http://www.electronicsforyou.com http://www.atmel.com http://www.buldinggadgets.com http://www.123eng.com Microprocessors And Interfacing(Programming & Hardware)Douglas V. Hall

Vedam Subrahmanayam - Power Electronics.