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Design and Simulation of Power Converters using the Ansoft Power Suite

Presenter: Roberto Prieto


Universidad Politcnica de Madrid (UPM). Spain

Outline
The application: Interleaved converters Design of magnetic components for power converters using converters using PExprt Advantages of Integrated magnetics in Interleaved Converters Integrated magnetics component design using PExprt Converter design, including regulation loop: from PExprt to PExprt to Simplorer Digital control implementation with Simplorer System design: from the circuit level to the system level level

Ansoft Power Suite

Interleaved Converters Features

Paralleling

Load

+
Shift

+
Packaging

Advantages of Interleaved Converters (I)


IL1 L1 IL1 IL2 L2 IL2 IL1 IC IC

Ripple cancellation Ripple cancellation


Small COUT Small COUT

IL2
2 converters 4 converters d = 50% d = 25%

Advantages of Interleaved Converters (II)

Vs = 9V, Is = 10A

Vs = 24V, Is = 10A

Advantages of Interleaved Converters (III)

Load

IIN/N

Application of Interleaved Converters

Power Converter

Filter

Amp RF

Control

Interleaved converters: Automotive application

High

DC-DC

Low

DC-DC

42V

12V

DC-DC

400V

12V

Automotive Application: Multi-phase converters.


36 phases
Phase currents
2 1.5 1 0.5 0

Phase currents (A)

-0.5 0.0E+ 00

5.0E-06

1.0E-05

t (s)

1.5E-05

2.0E-05

2.5E-05

100.00

Very small size SMD components Output capacitors


E fficiency (% )

97.50 95.00 92.50 90.00 87.50 85.00 82.50 80.00 0 10

Only power stage Power stage + control

SMD is possible
20 30 40 50 60 70 Output current (A)

Interleaved Converters design with Simplorer (I)

SMPS Library elements SMPS Library elements

Simplorer SMPS library


SMPS library contains a wide list of averaged and switch level models

Interleaved Converters design with Simplorer (II)


Efficiency ~86% Efficiency ~86%
1.00

Current at each phase (1.6A p-p) Current at each phase (1.6A p-p)
5.00

4.00

500.00m
3.00

0 0 5.00 10.00

2.00 9.95m 9.96m 9.98m 10.00m

Output Voltage Output Voltage


6.00 5.00

2.50

2.00 0 500.00u 1.02m

Magnetic Component design with PExprt (I)

Design with PExprt. Step 1: Design

PExprt. Step 2: Select & Compare

PExprt. Step 2: Select & Compare

PExprt. Step 3: Optimize

PExprt. Step 4: Circuit level simulation with


Simplorer

Comparison of models at circuit level with Simplorer


Efficiency
1.00

1.00

86%
500.00m

max 84%
500.00m

Decrease due to parasitic effects


0 0 5.00 10.00

Efficiency Efficiency

0 0 5.00 10.00

5.00

Phase Currents

1.6A p-p
4.00

1.00

1.5A p-p
0

3.00

2.00 9.95m 9.96m 9.98m

10.00m

Current at each phase Current at each phase


-1.00

949.27u

960.00u

980.00u

999.90u

Integrated Magnetics vs Discrete Components


Integrated Magnetics Integrated Magnetics
Output Voltage 5.23 4.00
4.94 4.00

Discrete Components Discrete Components


Output Voltage

2.00

2.00

0 0 500.00u 800.00u

0 0 500.00u 800.00u

Phase Currents 2.00


13.98 10.00

Phase Currents

-2.00 360.08u 370.00u 380.00u 390.00u 400.00u

-12.27 360.05u 370.00u 380.00u 390.00u 400.00u

Integrated Magnetics Features in Interleaved Converters (I)


Multiphase Multiphase converters converters Magnetic Magnetic integration integration

Coupling Coupling

i1 v1 v2 v3 i2 i3 i4

i0
Load

Multiphase transformer (several implementations)

Integrated Magnetics Features in Interleaved Converters (II)


v1 v2 v3 iO

i2 i3

Load

Standard cores

Integrated Magnetics Features in Interleaved Converters (III)


Core A Core B Core A Core B Winding phase 3 Winding phase 1 Winding phase 2 Winding phase 4 Phase 2 Core A Phase 3 Phase 4
25% 0% Decoupled inductor Integrated transformer Integrated transformer + additional inductor

Winding phase 4
Volume comparison
125% 100% 75% 50%

Phase 1

Core B

Design of Integrated Magnetics with PExprt


Features
Frequency dependent Capacitive effects Nonlinear core

Simple procedure to define Integrated Magnetics in PExprt

Flexible Winding Setup Definition for each core leg

PExprt Model: Simplorer link

Different bobbins can be assigned to each core leg

Planar Integrated can also be defined

Circuit level simulation with Simplorer

M1

MOSFET_LEG pwm

pwm1

M2

AM1 PExprtLink1
n

M1

MOSFET_LEG pwm

pwm2

M2

AM2
n

PEX

R1 C1

M1

STEP1
MOSFET_LEG pwm

E1

pwm3

M2

AM3
n

Comparison of models at circuit level with Simplorer


M1
p
MOSFET_LEG pwm

pwm1

M2

Discrete Discrete
1.00

AM1 PExprtLink1
n

M1

MOSFET_LEG

Efficiency

pwm

Efficiency 1.00
PEX

Integrated Integrated

pwm2

M2

AM2
n

R1 C1

M1

STEP1
MOSFET_LEG pwm

E1

pwm3

M2

AM3
n

max 84%
500.00m

84%
500.00m

More stable behavior


0

0 0
1.00

5.00

10.00

5.00

10.00

1.5A p-p

2.00

2.2A p-p

-1.00 949.27u 960.00u 980.00u 999.90u

2.00

949.27u

The currents are in phase


960.00u 980.00u

999.90u

6.00 5.00

6.00 5.00

2.50

2.50

Faster than the uncoupled version


0
0 500.00u 1.02m

2.00

2.00 0 500.00u 1.02m

Particular geometries might require Maxwell 3D


2D is feasible 2D is feasible

3D is necessary 3D is necessary

Automotive Application: Multi-phase converters.


36 phases

Digital control is mandatory control is mandatory

Control Implementation: Alternatives


Analog Analog 1 1 Continuous blocks: S-Transfer function
G(s)

Digital Digital

2 2

Discrete blocks: Z-Transfer function

G(z)

Discrete_PID

3 3

Discrete Fixed-Point : Synthesized VHDL code

Digital Control for multiphase Converters

f = 3kHz

Digital Control Implementation


Analog Implementation

Output Voltage

Analog PID

Duty Cycle

Soft Start Simplorer blocks


(Electric circuit)

Digital Control Implementation


Digital Implementation

Discrete PID
(VHDL-AMS block)
Output Voltage

Duty Cycle

Simplorer blocks

Soft Start
(Electric circuit)

Digital Control Implementation: Simplorer Results


Continuous time PID (Analog) Continuous time PID (Analog)
20.00

Output Voltage 3.50

Phase Currents

10.00
3.00

2.50 250.00u 300.00u 400.00u 450.00u

-10.00 250.00u 300.00u 400.00u 450.00u

Discrete time PID (Digital): sampling = 600kHz Discrete time PID (Digital): sampling = 600kHz
Output Voltage 3.50
20.00 Phase Currents

10.00

3.00
0

2.50 250.00u 300.00u 400.00u 450.00u

-10.00 250.00u 300.00u 400.00u 450.00u

Digital Control Implementation: Simplorer based design


Overshot and settling time measurement

Initial simulations

Fitness function

Performance evaluation
(better when settling time is short) Tendency of the parameters

System and Sub-System levels


Complete system Power system

The power system can not be modeled as an ideal system

The power system involves: involves:


Losses Dynamic limitations Temperature issues Failures

Modeling approaches
Switch level models
Are based directly on the structure Provide information for each component in every switching cycle

Averaged models
Switching information is lost but structure is kept There are several techniques like: State space averaging Averaged switch modeling

Behavioral models
Based on the input-output behavior The model is a black box, the real structure is lost

Simulation time
Simulation time
Subs istemaBaterias
Vinp Vop

Buck Regulado
42V/28V

+
V

-Averaged models -> 157 seconds -Behavioral models ->

Vinp

AMbat VMbat

29 seconds

Vinm

Vom

Vinm

Subs istemaGenerad
Vp Vinp

+
V
Vm

Buck Regulado
42V/28V

Vop

+
V

Vinp

Half Bridge Regulado


28V/1.8V

Voutp

Vp

+
V

VM28
Vom Vinn

VMc
Voutn Vm

5 times faster!!!

VMin

Vinm

Subs istCargasReg

Vp

Vinp

Half Bridge Regulado


28V/1.8V

Voutp

43.00

Vm

Subs istemaCargas NoRe

Vinn

Voutn

30.00

20.00
Vp Vinp

Half Bridge Regulado


28V/1.8V

Voutp

+
V

Vp

10.00

VMc2
Voutn Vm

Vm

Vinn

0 0 25.00m 50.00m 75.00m 100.00m 150.00m

Subs istemaCargas NoReg2

Subs istCargasReg2

SMPS Library: PTool


Problems designing power systems
The lack of models for each DC/DC converter The lack of information on commercial converters Difficulty to develop the models Long simulation time All above problems multiplied by the number of converters

Get optimized VHDL-AMS models for DC/DC converters in minutes

SMPS Library: PTool


PTool converters features: Input characteristics Output characteristics Dynamic response Static response Remote control Thermal behavior Protections Power sharing Cross regulation

Simplorer System Level Models

vi_p

vo1_p

Behavioral
vi_n vo1_n

Simplorer System Level Models


vi_p vo1_p

Behavioral
vi_n vo1_n

Efficiency comparison 100.00


3.40

System Level and Switch

Behavioral
50.00

2.00

Switch level
0 0 5.00 10.00
0 0

Total simulation time: 700us

200.00u

400.00u

520.00u

Behavioral: 0.992s

Switch level: 352.54s

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