MEMRISTOR The Missing Element

Faiz Ahmed M.Tech ECE Geethanjali College of Engineering and Technology

Abstract- Memristor is a special kind of nonlinear circuit element, its appearance draws worldwide attention in electronic circuit research and designing, this property of memristance was first observed by Dr. Leon 0 Chua in 1971 and later H.P labs invented it in 2008. In this paper, mechanism of charge memory is proved mathematically by analyzing physical realization of memristor, physical model of memristor is described, analysis of 1T1M crossbar is done, the design and behavior of a memristive- based logic gate and as a memory unit is covered and hot issues about it are analyzed.
I. INTRODUCTION

Assoc.Prof A.Srinivas Geethanjali College of Engineering andTechnology

.This paper is organized as follows: Section II discusses the Memristor model, Section III discusses the practical approach to physically design a Memristor, Section IV discusses the mathematical expression for Memristor, Section V discusses how it can be used as a memory unit including 1T1M crossbar model and how it can be used to access data for reading and writing, section VI concludes the paper.
II. MEMRISTOR MODEL

Memristors are passive elements with varying resistance (also known as a memristance). In 1971, Professor Leon O. Chua predicted that there must be a missing circuit element; he called it memristor. After that, professor Chua and his student Sung M. Kang extended memristors concept to a broader one, named memristive system, and they found many special cases of that system. Over three to four decades, relative research remained in theory. Later in 2008, researchers who were guided by Stanley Williams from Hewlett Packard laboratory announced that they successfully made the worlds first physical memristor by nanotechnology, and their splendid achievement, had led research of memristor from theoretical stage to practical stage. The nanomemristor of HP lab was made by inserting some kind of titanium oxide between two platinum contacts. Mass of experiments had been done to describe the mechanism of memristors working. One of memristors most valuable advantages is the potential in information storage. Memristor can memorize charges that pass through it and remain the memory for quite a long time. Compared with dynamic random access memory (DRAM), which needs endless refreshments to hold information, memristor needs energy only when adjusting its resistance. If you dont need your information changing, you can leave it for a month or even longer. Another way of using for memristor is building a physical neural network that can imitate mans brain. Nowadays, the main problem of building such a network is neural synapse. This part has a amazing similarity to memristors characteristic. It is not a myth to see how a self-adaptive network that contains memristors learn by itself in the near future. Memristors can be used for numerous applications, such as memory, neuromorphic systems, and analog circuits .One interesting application of memristors is logic, using memristors as building blocks of logic gates.

The fundamental basic circuit elements are resistor, capacitor, and inductor. Resistor relates voltage and current . . (dv=R di), capacitor relates charge and voltage (dq=C dv), . and inductor relates flux and current (d=L di), respectively. The relation between flux and charge is evidently missing. As shown in Fig.1, the missing link between flux and charge is called memristance M. By definition, memristance is described as M (q) = d/dq The memristance M(q) is equal to voltage over current which is also known as the resistance in the linear case. Therefore, memristance has the same unit (Ohm) as resistance, and M(q) is logically a charge controlled resistance. Note that memristor based memories are very different from conventional memories such as CMOS memories since the storage is based on the resistance values, which do not have bi-stability properties This paper investigates the design of memory read/write schemes and peripheral circuits based on more realistic memristor models that have nonlinear drifts. We demonstrate the properties derived from the linear drift model can be successfully applied to more realistic nonlinear drift models that have trapping boundary issues.

Fig. 1 four fundamental elements R (V and I),L(I and Flux),C (V and charge )and M (Missing link i:e charge and flux)

III. PHYSICAL APPROACH FOR MEMRISTOR

Hewlett Packard demonstrated the first fabricated physical structure of a memristor device in 2008.The device is an electrically switchable semiconductor thin film sandwiched between two metal contacts. The semiconductor thin film has a certain length D, and consists of a doped and un-doped region as shown in Fig. 2.The internal state variable w represents the length of the doped region. The doped region has low resistance while that of the un-doped region is much higher. As an external voltage bias v(t) is applied across the device, the length w will change due to charged dopant drifting. Hence, the devices total resistivity changes. If the doped region extends to the full length D, that is w/D=1.0, the total resistivity of the device would be dominated by the low resistivity region, with a value measured to be Ron. Likewise, when the un-doped region extends to the full length D, i.e. w/D=0, the total resistance is denoted as Roff.

Above equation shows that memristors resistance RM is in a linear relationship with w. Memristors ability to memorize the charges that pass through it, namely the history of the device comes from the linear drift of boundary between doped area and undoped one. That means if the current that flows through memristor does not change, the moving speed of the boundary does not change, too. Based on many advanced experiments, researchers of HP lab finally found that

The above equation explains why memristor can remember. D i s average dopant mobility, which is the innate material characteristic of titanium oxide. With the voltage v(t) between two contacts of memristor, Using ohms law gives v(t ) = RM i(t ) Solving the above equations it can calculate memristors resistance as

Figure 2. coupled variable-resistor memristor model of Hewlett Packard. The doped area is made of TiO2-x X is about 0.05 and the size of it is w, this area is missing 0.5 percent of its oxygen. The other area is TiO2 and its size is D-W. The doped area has a low resistance because of its oxygen vacancies; the undoped one has a high resistance. When w=D, the whole resistance is ROFF. On the opposite, when w=0, the whole resistance is RON It is clear that total resistance of memristor comes from two alterable resistor in series. That is to say RM = Rdopted + Rundopted Where RM stands for the resistance of memristor, Rdoped and Rundoped are proportional to the length of their relative area.
IV. MATHEMATICS OF MEMRISTOR

Where q(t) is the total charges that pass through memristor. Shows that memristors resistance has a clear functional relationship with charges that pass through it, this forms the basis of memristor ability to memorize.

Suppose that there are no initial charges on the memristor, namely q(0) = 0

The relation between W, D, Ron, Roff, can be given as

This means Q0 stands for the charges that memristor needs to change its state from completely undoped to completely doped. A. Linear Dopant Drift Model The linear dopant drift model assumes a uniform electric field across the device. The net electric field induced a current flow through the memristor device is found to be linearly proportional to the drift-diffusion velocity. Since the driftdiffusion velocity corresponds to the speed of doped region (dw/dt), the following equation established: where v is the average ion mobility. Denote the off/on ratio (Roff=Ron/). Equation can be rewritten as:

As a result, the applied flux has a range to be effective. The memristor state w would not be more than D when the applied flux across memristor is over the upper bound, and it would not be lower than zero when the applied flux is smaller than the lower bound. Thus, the derived equation works only when the applied flux is within the effective range. When the memristor connect to a resistor Rx in series as showing in Fig. 3, the following equation can be established:

After certain manipulations using differential calculus, we get

Fig. 3. A voltage divider consisting of a constant resistor Rx in series with a flux-controlled memristor. Note that in is the time integral of Vin, x is the flux accumulated at node x, and Vin-Vx is the flux across memristor M. Based on Kirchhoffs Current Law, the KCL equation at node x implies that all the net charges into node x would be zero. Hence, the charges went through the memristor should be the same to the charges went through the resistor. Solving x leads to an unique solution below:

where flux is the integral of voltage and w0 is the initial state,w(t=0)=w0. This shows an explicit dependency of the variable w on the applied flux . Note that this formula clearly indicates that w is a function of the flux applied. The input voltage waveform with the same flux leads to the same memristor state .Since is normally large, it can be further simplified:

The flux _ across memristor is Vin-Vx, on solving we yield the following analytical form:

The simplification done takes into account of (Roff-Ron)-Roff, which Ron is approximately zero in the model. i:e Equation can be written in the other way:

It reveals the amount of flux injection needed to move the memristor state from w0 to w. B. Linear Dopant Drift Model Properties The linear memristor model has the following characteristics which can be used in memory design: 1). The change to the memristor state would be the same regardless voltage waveform as long as the net flux is the same across the memristor. 2). When voltage is attached to a single memristor, the state of memristor will move back to the initial position if the net flux (integral of the voltage over a period) injection is zero.

In other words, the amount of flux requires to switch an initial state w0 to a designate state w can be calculated The constrain corresponds to the following flux range:

3). When a voltage input is attached to a single memristor, the amount of flux requires to switch an initial positive w0 to a designate state w can be calculated 4). When memristor is series connected with a resistor as shown in Fig. 3, the state of memristor will move back to initial position if the net flux injection for source Vin is zero. 5). When memristor is series connected with a resistor as shown in Fig. 3, the amount of flux requires to switch an initial state w0 to a designate state w can be calculated C. Nonlinear Dopant Drift Model According to the actual memristor device manufactured in HPs lab. The small voltage can yield enormous electric field in nanoscale devices, which produce significant highly nonlinear ionic transport. These nonlinearities appear to slow down the drift velocity at the thin film edges, where the speed of the state transition around the boundary gradually decreases to zero. This nonlinear dopant-drifting phenomenon is so called the boundary effect. The nonlinear effect and its modeling are still not fully understood and an ongoing research is done Nevertheless, one approach to model the boundary effect is by applying window function f(w) to the drift velocity equation. That is

excitation, which will perturb the memristor state. Due to the memristor linear dopant drift property (1) zero net flux injection read pattern shown in Fig. 4(b) avoids altering the memristor state after read cycles. It is negative pulse following by a positive pulse with width Tr. The negative pulse cycle decreases the state and the positive cycle brings the state back up. The read pulse Tr reflects the amount of perturbation to the memristor state. Large perturbation would lead to data integrity issues. If ideal one state (at W1) is stored, the read pulse would be constrained by the WH margin so the state would not travel to unsafe region. If ideal zero state (at W0) is initially stored, the negative pulse drags the state to nonlinear region. This design is motivated by the insights that nonlinear drift will slow down the drift process of the dopants, thus the designed read flux is a conservative bound based on the linear drift model that will not trap the dopants to the boundary. Accordingly, we constrain the read pulse based on our linear model, that is

which is taking the minimum flux injection to move the state from W1 to WH or W0 to zero. The resistor in series with the memristor is to convert the memristor state into a voltage signal since the current through the memristor carries the memristor state information, thus the voltage at node x (Vx) would reflect the memristor state information. Use the simplified resistance model, Vx can be expressed as:

Fig. 4. Non-linear model with boundary regions.

V. AS A MEMORY UNIT AND 1T1M MODEL

Memory read/write operations are based upon a design scheme to switch the memristor state to the appropriate region. In order to switch the memristor state, controlling the amount of flux injection becomes an important criterion. A) Read Operation The proposed method for a read operation has been introduced is shown in Fig. 4(a). It has two stages: convert stage and sense amplifier stage. The convert stage converts the memristor state information into a voltage signal. In convert stage, voltage Vx reflects the memristor state information. The sense amplifier stage determines the logic based on Vx and output full-swing digital scale. In order to extract the information of the internal state, we need to apply a voltage

which VA is the pulse magnitude shown in Fig. 4(b). The negative pulse comes at the first cycle makes Vx negative, and Vo would be zero out of the comparator. At the second cycle of read pattern, Vx is compared with VRref to determine the logic. If the state is below half of D, Vx would be below VRref, and logic zero is read. Similarly, Vx higher than VRref indicates the memristor state is in upper half of its length D, and logic one is read.This way, we can distinguish logic zero and logic one.

Fig. 4. (a) Operation stages; (b) read pattern 2) Write Operation The state W0 and W1 are the ideal logic zero and one state. The goal of write operation is to precisely move the state to W0 for logic zero and W1 for logic one, and they are done by write zero and one process. The proposed write scheme is briefly shown in Fig. 5, Suppose the cell is desirable to write to ideal logic one state, the write one process is performed. Because positive flux injection raises the state the state increases due to constant magnitude pulse VA. The reference voltage VWref is set to:

Fig. 6. Diagrams showing (a) the physical layout for a memristor crossbar,(b) the equivalent circuit for the crossbar to produce a write error, and (c)the equivalent circuit for the crossbar to produce a read error. Fig. 7 shows the crossbar layout for 1T1M memristor crossbar as well as the schematic representation. Placing a transistor at each cross-point eliminates the errors.

which is the Vx when w=W1.The reference voltage VWref would come to the same as Vx after some time Tw1. When that happens, the memristor state reached the desire state, and the comparator sends a feedback signal to switch off the write pulse.

Fig. 7. 1T1M Model The circuit was designed so that each of the memristors could be written to and accessed individually without disrupting the other devices due to alternate current paths. The gate of each transistor is supplied with -3V representing the off signal, and 3V representing the on signal. The source of each transistor is supplied with 3V to provide a memristor resistance decrease, -3V to provide a memristor resistance increase, and 0V when no change should be made. The gate voltage is biased negatively to ensure that the gate voltage never rises above the source voltage on any inactive memristors. For example to access M4 The gate voltage Vg1 would have been set to 0V and the source voltage Vs2 would have been set to -3V as. When using this 1T1M crossbar architecture, it can be seen that each memristor was programmed only when the programming signals were applied to a specific device, and alternate current paths were eliminated.
VI. CONCLUSION

Fig. 5. Write operation structure. 3) 1T1M Model Fig. 6 shows a memristor configuration where a read error will occur due to the alternate current path. When a pulse is applied between nodes a1 and b1, the total resistance of M2, M3, and M4 is equal to 3RON which is a significantly less resistance than that of the selected memristor M1. This will cause the system to recognize M1 as being turned on, when it has a resistance value of ROFF.

Memristor is the fourth fundamental element proposed by Leon in 1971 and it has been developed by Williams of H.P labs in 2008. Memristor provides new platform for inventions in nano scale, as the size of memristor can be as low as 3nm the memory storing ability in analog and digital way can be exploited to make switching circuits , in neural networks to make artificial intelligence a possibility. In this paper we have dealt how a memristor works, mathematical analysis, how it can be used to store memory in a digital system, how data can be read and written into, 1T1M model is analyzed and the errors of grid layout of memories is rectified. According to Dr.Leon Memristor will revolutionize electronics in 21st century as transistor did it in 20th century.

VII REFERENCES
[1] L. O. Chua, "MemristorThe Missing Circuit Element," IEEE Transactions on Circuit Theory, 18(5), 507519 (1971). [2] L. O. Chua and S. M. Kang, Memristive devices and systems, Proc.IEEE 64, 209-223 (1976). [3] L. Chua, Nonlinear Circuits, IEEE Trans. Circuit Theory, vol. CAS-31, No. 1, pp. 69-87, Jan. 1984. [4] O. Kavehei, Y. Kim, A. Iqbal, K. Eshraghiam, S. F. Al-Sarawi, D.Abbott, "The Fourth Element: Characteristics, Modelling, and Electromagnetic Theory of the Memristor", Proceedings of the Royal Society A: Mathematical, Physical and Engineering Sciences, 2010. [5] G. Medeiros-Ribeiro, F. Perner, R. Carter, H. Abdalla, M. D. Pickett, and R. S. Williams, Lognormal switching times for titanium dioxide bipolar memristors: origin and resolution, Nanotechnology, 22(9), 2011. [6] Leon O Chua. Device Modeling via Non-linear Circuit Elements.IEEE Trans. Circuit and Systems 27, 2014-1044, 1980