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AN47615
Author: Kaushik Subramanian Associated Project: Yes Associated Part Family: CY8CLEDxx Software Version: PSoC Designer 4.4 Associated Application Notes: None
Introduction
The impact of digital revolution in the lighting industry is recent, yet rapid. Many lighting fixtures today with controllable features need sophisticated control interface than simple on/off switches. This has propelled the arrival of digital lighting control interfaces such as DMX512 and DALI (Digital Addressable Lighting Interface). While DMX512 has evolved to become a lighting control standard in the entertainment industry (stage lighting), DALI focuses on building lighting applications. This application note presents an overview of the DALI protocol and describes the implementation of the DALI Receiver using Cypress EZ-ColorTM Intelligent Lighting controllers. Figure 1. CY3261A EZ-Color Demonstration Board
Cypress EZ-Color devices provide a programmable platform to implement intelligent lighting management functions and digital lighting control interfaces. This includes applications with tunable white light, temperature, and optical feedback for improved color accuracy, and digital lighting control interfaces such as DMX512 and DALI. Figure 1 shows the CY3261A EZ-Color demonstration board. This board enables you to evaluate the EZ-Color platform to implement lighting control and advanced lighting management functions. Figure 2 shows the implementation of DALI Receiver on this platform. Figure 2. DALI Receiver using the Cy3261A EZ-Color Demonstration Board
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Integration with Cypresss lighting solutions IP: Cypresss DALI Receiver is easily integrated with other EZ-Color IP such as LED Color Control (in multi-LED systems) and tunable white light solutions with accurate color temperature control. Cypresss DALI Receiver decodes data on the DALI bus based on the interrupts generated when input data is detected. This removes the need for continuous bus polling and results in efficient design in system timing and power. The EZ-Color platform also provides programmable analog and digital resources that can be used to implement feedback systems based on temperature sensing and optical sensing (color, ambient light, and so on). Cypresss DALI Receiver solution currently supports commands listed in IEC 62386: Part 102. However, the system can be easily extended to support more commands for subsystems such as LED modules (IEC 62386: Part 207), Sequencers (IEC 62386: Part 210), or Color Controllers (IEC 62386: Part 208).
IEC 62386: Part 203 Discharge Lamps IEC 62386: Part 204 Low-voltage Halogen Lamps IEC 62386: Part 205 Supply Voltage Converter IEC 62386: Part 206 Digital to DC Voltage Conversion IEC 62386: Part 207 LED Modules IEC 62386: Part 208 Switching Function IEC 62386: Part 209 Color Control IEC 62386: Part 2010 Sequencer
Energy management applications such as scheduled automatic shutoff to meet energy codes and daylight harvesting. Supermarkets, retail spaces, and similar applications with frequent merchandise or layout changes. Small and open offices where users are given dimming control over their own lighting as part of a strategy to increase worker satisfaction. Conference rooms, classrooms, training rooms, and similar spaces that need different lighting scenes for multiple types of use. Larger installations with multiple buildings, where feedback on lighting component status helps in efficient lighting maintenance.
DALI Standard
DALI is a royalty free, interoperable open standard for digital lighting that is currently drafted as IEC Specification 62386. It is a command based protocol with many commands used to control electronic ballasts, that is, electronic devices that control lighting fixtures. These ballasts are also referred to as "DALI ballasts". Two key characteristics of all DALI ballasts are:
Digital: Ballasts can decode and respond to digital data. Addressable: There can be several ballasts on the same lighting network that are individually addressed and controlled.
DALI System
The DALI system uses a two-wire bus based communication medium. Each DALI Loop supports a maximum of 64 Control Devices or DALI Masters and a maximum of 64 Control Gears or DALI Slaves. Typical control devices include switches, scene controllers, dimmers, occupancy sensors, and communication modules that link the DALI bus to other networks such as Ethernet. Examples of control gears are ballasts that drive lighting fixtures such as fluorescent lamps, LED lamps, or halogen lamps. Figure 3. DALI Loop
The DALI standard is described in the following three key specifications from IEC:
IEC 62386: Part 101 DALI System IEC 62386: Part 102 DALI Slave (Control Gear) IEC 62386: Part 103 DALI Master (Control Device)
In addition to these specifications, DALI also addresses particular requirements for different types of DALI slaves such as fluorescent lamps, LED lamps, supply voltage controllers, and others. Some examples are:
IEC 62386: Part 201 Fluorescent Lamps IEC 62386: Part 202 Emergency Lighting
Document No. 001-47615 Rev. ** 2
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Figure 3 on page 2 shows a simple DALI Loop configuration with 64 slaves (control gears) and one dimming controller (control device). Each slave on the network is assigned a unique individual address. The dimmer sends commands to the ballasts to regulate the lamp intensity. DALI also supports commands for several query functions that retrieve status information from the ballasts. DALI employs bidirectional half-duplex asynchronous serial data transmission between nodes on the DALI bus with a data rate of 1200 bits per second. The digital signals on the two-wire bus are Manchester Coded with a steady voltage difference between the wires in the range of 9.5V to 22.5V (typically 16V). Voltage difference above 9.5V represents logic high or 1, while a voltage difference below 6.5V represents logic low or 0. Figure 4 shows the voltage levels of signals on the DALI bus. The DALI bus is powered by a DALI power supply unit that allows a maximum current input of 250 mA on the bus. Each device connected on the bus can consume a maximum of 2 mA. This feature enables the presence of low power sensors on the network that may not require a separate high voltage power line. Figure 4. DALI Bus Signal Voltage Levels
DALI Addressing
The DALI protocol provides three different addressing schemes to address DALI slaves on the network.
Individual Addressing
Ballasts may be assigned a unique individual address. There are 64 possible addresses (0-63). No two ballasts can have the same address on a DALI loop. Sending an Individual Address Command sends commands on a DALI loop to specific ballasts. The ballast with this address responds to the Individual Address command. An individual address can be:
Short Address: An address between 0-63 that may be assigned to a device and normally used in individual Address command. Random Address: This is a sequentially assigned number for a device on the DALI bus, without respect to the physical location, and is typically used during bus configuration. This is a 3-byte address.
Group Addressing
A group is a collection of addresses. Using group addressing, the DALI Master can control more than one device simultaneously. A DALI slave can belong to a maximum of 16 groups at once.
Broadcast Addressing
This scheme allows the controller to select and control all devices on the network. All DALI slaves must execute commands sent with a broadcast address.
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lamps. These are listed in Parts 2xx of the IEC 62386. For example, the commands listed in Part 207 are used when the DALI Master controls specific properties of DALI enabled LED lamps on the network. Table 3 on page 14 lists the control gear generic control commands that are found in IEC 62386: Part 102. Cypresss DALI Receiver Solution implements this library with a few exceptions.
Physical Addressing
This method is easier than the Random Addressing mechanism described in the previous section. The master broadcasts an INITIALIZE command followed by a PHYSICAL SELECTION command that puts all the DALI ballasts in the physical addressing method. The user then physically selects the DALI ballast using jumpers, dip switches, or buttons that physically activate DALI ballast. When the ballast is physically selected, it responds to the masters queries and the master can then assign a new short address. The DALI ballasts on the bus must be physically selected in a sequential manner and then assigned short addresses.
Random Addressing
Initially, all DALI slaves (DALI ballasts) on the bus have no short address (short address = 255 represents no short address assigned). The random address of a DALI slave is 3 bytes long (factory programmed) and the probability of two different ballasts on the bus with the same random address is very low. The startup sequence allows the DALI Master to determine the random addresses of all DALI ballasts present on the bus and assign a unique short address to each such slave. The master broadcasts a SEARCH ADDRESS (also 3 bytes long) to all DALI slaves on the bus. Then the master queries the bus with a COMPARE command. If a ballast with a random address less than or equal to the search address is present on the bus, it responds to the COMPARE command. All other ballasts remain idle. Based on this procedure, the master executes an optimized search algorithm and determines if there are any DALI ballasts with the chosen Search Address. If no such ballast is found, the DALI Master moves on to another Search Address. If DALI ballast with its random address equal to the DALI Masters Search Address is found, then this ballast is selected and assigned a unique short address (0-63). This ballast is then excluded from the startup sequence using a WITHDRAW command, and the algorithm continues to assign short addresses to the remaining DALI slaves.
1 start bit 8 bits of address 16 bits of data (commands or data) 2 stop bits
1 start bit 8 bits of address 8 bits of data (command or data) 2 stop bits
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Backward Packet
This packet structure is used by the DALI slave to respond to the DALI master when queried for data. The DALI protocol supports several commands that retrieve status information from DALI slaves. The Backward packet structure is used during this process. The packet consists of:
Decode and execute DALI commands to support DALI control gears defined in IEC 62386: Part 102. Direct Arc Power Control (to directly set the dimming value of the ballast) and Indirect Control commands are supported. Supports storage of DALI control gear characteristic parameters such as minimum light output level and maximum light output level. Supports physical, automatic, and group addressing modes. Supports Forward Packet Type II and Backward Packet structures that enable communication between DALI master and DALI slaves on the bus. Integrates control for up to 4 DALI slaves, which enables optimal design of RGB based ballasts.
1. 2. 3.
Notes Start and stop bits are logic 1. Each packet is sent continuously without a time lag between successive bytes. The baud rate is 1200 bits per second with Manchester coding.
The Cypress DALI solution is provided as a set of library files and functions that implement DALI Receiver on the EZ-Color platform using Cypress PSoC DesignerTM environment. PSoC Designer is a development tool (available free for download from www.cypress.com) that enables you to configure, customize, and efficiently manage the programmable resources in the EZ-Color device family. Along with PSoC ProgrammerTM, the development environment helps you to write related firmware, compile, and build projects that are then programmed into the EZ-Color devices.
DALI BUS
USB
DALI Receiver
LED Ballasts
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The Cypress DALI library is written in C and compiled using ImageCraft compiler. The DALI Receiver is implemented using additional hardware resources in EZ-Color such as counters, timers, and EEPROM. While the EZ-Color platform is designed to work with 5V and 3.3V systems, the DALI bus operates at higher voltages, typically 16V. As a result, an external DALI interface board is necessary for the DALI Receiver to communicate with other devices on the bus. Figure 5 on page 5 shows a system solution for the DALI Receiver using EZ-Color. The following commands in IEC 62386 are not supported now. Table 1. Unsupported Commands in IEC 62386
Code 09 81 C5 E0 - FE FF Description Enable DAPC sequence Enable write memory Read memory location Application extended commands Query extended version number
The Cypress DALI library employs the method described in the previous section with frame-synchronization, using an additional 8-bit timer. Its period is fixed and it is greater than bit time (833 s). This new timer is used to measure the time elapsed from one falling edge to the next one. If this time is greater than a half bit, it is necessary to reload the main timer with a period of bit duration (so after bit duration there is a new interrupt and the bus is sampled). Otherwise, it is necessary to reload the main timer with a period of bit time. Note that even if the library does not receive a falling edge, the main timer samples the DALI bus every 1-bit time. The end of the packet is determined when no falling edges are received in two-bit time. The library can control up to 4 ballasts simultaneously. The constant TOT_NUM_LED represents the number of ballasts controlled on the DALI bus (from 1 to 4). This feature is useful when the library is installed in a device with RGB light control.
void DALI_Init(void) Initialize DALI library. char DALI_ManageInterface (unsigned char *level) This function must be called in the main loop every 6 ms. The function returns TRUE if LEDs' intensity must be changed, FALSE otherwise. If the value returned is TRUE, the new values for LEDs' intensity are stored in the array indicated by the pointer passed to the function. Note that the dimension of the array must be equal to the number of channels (N_TOT_LED define constant in daliconst.h)
Manchester Decoding
In the DALI protocol, bits are transmitted with bi-phase encoding. When transmitting logic high or 1, the master pulls the bus to a low level (approximately 0V) for half bitperiod and then pulls the bus to a high level for the second half. So if the receiver reads the bit after the first half, it reads the right bit. The DALI bus is usually high and the first bit (start bit) is always 1. As a result, the first change in level is a falling edge on the bus. This falling edge can be used to start an 8-bit timer with a period of bit time. When the timer generates an overflow interrupt, the DALI Receiver reads the bus and this is the start bit. In the interrupt service routine the timer period is forced to 1 bit time. Similarly, after a starting offset of bit time, the library can read the second half of the bit (the real bit) exactly in the middle.
Optional APIs
void DALI_SetInterfaceFailure (char channel, char flag); This function is used to report a failure status of the DALI bus (when the voltage is not high enough).
Software Library
Figure 6 on page 7 shows the flow diagram of the Cypress DALI Library structure. It is a simplified flow chart of the routine dali_ManageInterface which is the library's main function. This function must be executed at least every 6 ms. The DALI Library uses interrupt based processing for input data signals on the DALI bus. New packets are processed through interrupts and Manchester encoding is decoded through software. When a new packet is received, the library determines if the command needs to be executed. Therefore, the first step is to resolve the destination address, that is, determine if the incoming address is a short address or a group address, or if it is a special or broadcast command.
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void DALI_SetLampFailure (char channel, char flag); With this function you can report to the library that the device has some problem with LEDs.
void DALI_SetPhysicalSelection (char channel, char flag); With this function you can report to the library that the device is physically selected.
void DALI_SetDeviceType(char ch, char type); With this function you can change the device type (default is 6).
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void DALI_SetBallastStatus(char channel, char flag); With this function you can modify ballast status: flag = TRUE Device is ready and can work flag = FALSE Device is not ready; stop communication
char DALI_AreDataPending(void); You can call this function to find if data is waiting to be stored in EEPROM; if this is the case, the power supply must not be turned off.
void DALI_SetShortAddr(char channel, char addr) With this function you can change the short address of one virtual DALI device. Note This function is available only if constant RANDOM_ADDR is commented.
Figure 6. DALI Library Flowchart 2. Rename Counter8_1 to Counter8_DALI, Timer8_1 to Timer8_DALI, Timer8_2 to Timer8_DALI_TIME, and E2PROM_1 to DALI_E2PROM.
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Set DALI_E2PROM's size to 128 bytes and put its first block at the end of FLASH (in the following figure you can see the example of a 32 kB flash).
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Place Counter8_DALI, Timer8_DALI, and Timer8_DALI_TIME so that the output of Counter8_DALI can be used to feed clock to the 2 timers (Timer8_DALI and Timer8_DALI_TIME must be connected to the same clock source). Set up Counter8_DALI Timer8_DALI and Timer8_DALI_TIME to satisfy the following rules:
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Timer8_DALI interrupt frequency must be as close as possible to 1200 Hz. Timer8_DALI period must be as high as possible (period values such as 5, 10, 20, ... are not a good choice; 100, 150, 200, ... are better values)
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8. 9.
11. Open template boot.tpl and set up the following interrupt vectors for DALI: GPIO Interrupt Vector ljmp _DALI_FallingEdgeRxISR PSoC Block DBB21 Interrupt Vector ljmp _DALI_Timer8_DALI_ISR PsoC Block DBB22 Interrupt Vector ljmp _DALI_Timer8_DALI_TIME_ISR
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Rename P1[0] to TX_DALI and set drive mode to Strong, DisableInt. Rename P1[1] to RX_DALI and set drive mode High-Z, FallingEdge.
12. Open file main.c and add the following elements (see screenshots):
Comment the constants TX_NORM_HIGH and RX_NORM_HIGH in dali_int.c file to set a default low level on the DALI bus. When retained uncommented, the default level is set high.
Include the header for dali.c. Define a new variable unsigned char tmp. Add calls to DALI_Init function DALI_ManageInterface function. and
13. Adjust the following constant values in dali_int.c: T_1_BIT_2400 is (Timer8_DALI_Period + 1) * 0.5 T_1_BIT_DALI is Timer8_DALI_Period T_1_4_BIT_DALI is (Timer8_DALI_Period + 1) * 0.25 T_1_2_BIT_DALI is (Timer8_DALI_Period + 1) * 0.5 T_3_4_BIT_DALI is (Timer8_DALI_Period + 1) * 0.75 14. Loop main period is set to 6 ms. This sets the sampling window for the incoming DALI bit data. All constants in the dali.c file are adjusted to set the loop time period to 6 ms.
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15. DALI_TIME_PERIOD constant in dali_int.c must be set to a value so that Timer8_DALI_TIME generates an interrupt every 1 ms. For example, if the clock source of Timer8_DALI_TIME has a period of 6, 5 us, you can set DALI_TIME_PERIOD to 153 ( 6.5 us * (153 + 1) = 1.001 ms )
16. Unlock the last two blocks of PSoC's FLASH to enable writing into E2PROM. Change the last two W in the file flashsecurity.txt to U. 17. Build the project.
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Figure 10. PSoC Designer Application Editor View with DALI Library
The following example project describes the use of Cypress DALI library in PSoC Designer to implement a DALI receiver and control the intensity of the Red LED on the CY3261 Demonstration Board over DALI bus. The CY3261A board requires an external DALI interface circuit to connect to the 22V DALI bus. Figure 12 shows the DALI PHY reference design board that is used in this example project. Figure 12. DALY PHY Reference Design Board
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Figure 14. CY3261A EZ-Color Demonstration Board with DALI Receiver Example Project
Three additional components are required to completely implement the DALI Loop in this example:
Tridonic DALI USB Controller: This enables a PC based GUI to send out DALI commands on the bus, and control the LED. Tridonic DALI Power Supply: This provides power to the DALI bus. DALI PHY Board: This interface board translates the high level voltages on the DALI bus to 5V on the EZColor device. 1. Create a new project in PSoC Designer and add the DALI Library using the steps described in the previous sections. In the Device Editor Mode, add the following user modules:
The evaluation GUI tool (configTOOL v1.5) can be downloaded from www.tridonicatco.com. Figure 13 shows a picture of the DALI components from Tridonic. Figure 14 shows a snapshot of the DALI Evaluation setup using CY3261A Board and the Tridonic DALI components.
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SSDM User Module (SSDM_1) that is used to control the HB-LED on CY3261 Demo Board. Configure the input clock and resolution as desired (In the attached example project file, SSDM input clock is 200 kHz and SSDM dimming resolution used is 8 bits). Timer8 User Module (sysTimer8) is used to synchronize the main DALI loop to 6 ms. This is clocked by VC3, with a Period of 39 and CompareValue of 20.
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Route the output of the SSDM User Module to Port_1_2 which is connected to the Red LED on the CY3261 Demo Board. Pin Settings
4.
Set Port_2_7 (renamed as SHUT_DN in the example project file) to drive strong (this connects to the shutdown pin of the LM3402 driver chip on the CY3261A board. Set Port_1_3 and Port_1_4 to drive Strong. These connect to the other two LEDs on the board and are driven to OFF.
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5.
Edit the main.c file with the following code: 6. The project is now ready to be built and programmed into the device. Select Build from the Build menu in PSoC Designer. This compiles all the files of the project and generates a hex file if the compiler does not find any errors. When the project is successfully built, it can be programmed into the EZ-Color device using the MiniProg.
unsigned char tmp; unsigned char ticks; char fSysTimerOv; #pragma interrupt_handler void sysTimer8_ISR(void) { ticks++; if (ticks >= 3) { ticks = 0; fSysTimerOv = TRUE; } } void main() { //Port init PRT0DR = 0x00; PRT1DR = 0x00; PRT2DR = 0x20; sysTimer8_ISR
The completed example project is attached as a zip file with this application note. The Device Editor Mode of this project shows all the necessary user modules added and routed correctly. The Application Editor Mode shows the source files, header files, and library files required in this example project. The main.c file reflects the code described in the previous step. To see a working demonstration of this example, build the attached project and program the hex code into the CY3261A Demonstration Board. Using a similar setup as shown in Figure 9 on page 9, you must be able to control the Red LED on the board over DALI bus from the PC GUI. Notes 1. Check the psocconfigtbl.asm file to see if value 0B8h is written into the SSDM_1_POLY_REG register: mov reg[21h], 0B8h The main loop is synchronized to 6 ms using the sysTimer8 block. The SHUT_DOWN pin of the LM3402 is controlled by Port_2_7. This must be enabled or disabled in the program as needed. File Boot.asm file is modified as described in the DALI library instantiation. File flashsecurity.txt is modified to unlock the last two bytes of the PSoC Flash by marking them as U.
//Shut-down enabled
//Variables fSysTimerOv = FALSE; ticks = 0; SSDM_1_DisableInt(); SSDM_1_Start(); sysTimer8_EnableInt(); sysTimer8_Start(); DALI_Init(); M8C_EnableGInt; while(1) { //Synchronization with timer while (fSysTimerOv == FALSE); fSysTimerOv = FALSE; // Call DALI routine every 6ms if ( DALI_ManageInterface(&tmp) != FALSE ) if (tmp != 0xFF) { SSDM_1_WriteSignalDensity(tmp); if (tmp != 0) SHUT_DN_Data_ADDR &= ~SHUT_DN_MASK; else SHUT_DN_Data_ADDR |= SHUT_DN_MASK; } } // end of while loop
2. 3.
4. 5.
Summary
This application note presents an overview of the DALI standard. The Cypress DALI library is also discussed to implement the DALI receiver using the EZ-Color Lighting controllers. The example project described in this application note illustrates the use of Cypress DALI library using CY3261A EZ-Color Demonstration Board. A working copy of the project is attached and can be readily implemented on CY3261A with additional hardware.
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Appendix
DALI Interface Board Reference Design
Figure 15. DALI Interface Board Reference Design
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Document History
Document Title: Implementing DALI Receiver using EZ-Color Intelligent Lighting Controllers Document Number: 001-47615
Revision ECN Orig. of Change Submission Date Description of Change
**
2615395
QUS/AESA
12/03/2008
PSoC is a registered trademark of Cypress Semiconductor Corp. "Programmable System-on-Chip," PSoC Designer, PSoC Express, and EZColor are trademarks of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are the property of their respective owners.
Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709 Phone: 408-943-2600 Fax: 408-943-4730 http://www.cypress.com/ Cypress Semiconductor Corporation, 2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. This Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement.
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