Advances In Power Electronics & Power System December 4th-5th, 2010 PIET, Limda

Multi Carrier PWM based 6 level Diode Clamped Multi level Inverter Using PSIM.
Mrs. Neha S. Shah
Department of Electrical Engineering, BIT, Varnama ,Vadodara, Gujarat, India neha_saurabh_shah@yahoo.com

Mr. Chirayu R. Patel

Department of Electrical Engineering, BIT, Varnama ,Vadodara, Gujarat, India chirayupatel_meele@yahoo.co.in

Prof. Manish M. Pandya

Department of Electrical Engineering, PIET ,Vadodara, Gujarat, India

Prof. Rital R. Gajjar

Department of Electrical Engineering, PIET ,Vadodara, Gujarat, India

ABSTRACT
Today, power industry is demanding high Quality reliable Power. Multi level inverter is the one of the technique to improve the quality of power. This paper presents how six levels Diode clamped multi level inverter (DCMLI) is controlled using carrier pulse width modulation (MCPWM). IGBT is controlled using carrier based pulse width modulation scheme which is level shifted multi carrier modulation. PSIM software is used for the design of the DCMLI circuit.

KEY WORDS: Multi Carrier PWM, Multi level inverter, PSIM. INTRODUCTION For high power applications now a day Multilevel inverters are more popular as it is difficult to connect a single power semiconductor switch to interconnecting grids [1],[2]. Multi level inverter is to synthesize a desired voltage from several separate dc sources which may be obtained from batteries, fuel cells or solar cells. In multi level inverter as the number of the level increases, the number of steps in output voltage increases and hence output voltage generated is near to the sinusoidal and the harmonic content in the output voltage decreases significantly. The multilevel inverters have many advantages like low THD, low switching losses, less blocking voltage of the switching device, low electromagnetic interference EMI, low dv/dt, But it has the disadvantages like the increased number of switching devices and the complex control algorithm. In this work, the triggering signals of multi level inverter are designed using the carrier based pulse width modulation (PWM) scheme, since the PWM provides high power with low harmonics [5], [6]. The multi level inverters are classified into three categories: diode clamped multilevel inverters, flying capacitor multilevel inverters, and cascaded multilevel inverters. In each type of multi level inverter, the number of main switches (IGBT) of each topology is equal in a three phase inverter system, the other components like clamping diodes and dc-link capacitors having the same capacity per

unit. The advantage of diode clamped multilevel inverter is the least number of capacitors requirements but disadvantage is, it requires additional clamping diodes [10]. As the name suggest flying capacitor multilevel inverters has more number of capacitors. Cascaded inverter does not require any voltage clamping diode or voltage balancing capacitors. In cascaded inverters each separate dc sources is connected to an H bridge converter . To control the controlled semiconductor device the modified pulse width modulation technique is used which has several triangular carrier signals and one sinusoidal signal [5],[6]. SWITCHING STRATEGY An m-level Diode clamped multi level inverter (DCMLI) is made of (m 1) power supplies, (m-1) capacitors, 2*(m-1) switching devices and (m1)*(m-2) clamping diodes. Here for 6 level inverter, 5 capacitor are required each having Vdc initial voltage and the voltage stress across each switching devices is limited to Vdc through the clamping diodes. Fig. 1 shows the three phase six level diode clamped multi level inverter. The numbering order of the switches is S a1, Sa2, Sa3, Sa4, Sa5, Sa1, Sa2, Sa3, Sa4 and Sa5 in one leg [3].

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Advances In Power Electronics & Power System December 4th-5th, 2010 PIET, Limda

Fig. 1. Diode Clamped Six level multilevel inverter Table I lists the output-voltage levels and switching states for one phase of the inverter. State condition 1 means that the switch is on, and 0 means that the switch is off. Each phase has five complementary switch pairs, such that by turning on one of the switches of the pair, the other complementary switch becomes turned off [8], [9]. The complementary switch pairs for phase leg a are (Sa1, Sa1), (Sa2, Sa2), (Sa3, Sa3), (Sa4, Sa4) and (Sa5, Sa5). Five switches are always turned on at the same time. Major advantages of the DCMLI When the number of levels is high enough, the harmonics content is low enough to avoid the need for filters. Inverter efficiency is high because all devices are switched at the fundamental frequency. The control method is simple. Major Disadvantages of DCMLI : Excessive clamping diodes are required when the number of level is high. It is difficult to control the real power flow of the individual converter in multi converter system. Table I DCMLI VOLTAGE LEVELS AND SWITCHING STATES
Voltage Vao V5 = 5Vdc V4 = 4Vdc V3 = 3Vdc V2 = 2Vdc V1 = Vdc V0 = 0 Switch states of Upper leg device Sa1 Sa2 Sa3 Sa4 Sa5 1 0 0 0 0 0 1 1 0 0 0 0 1 1 1 0 0 0 1 1 1 1 0 0 1 1 1 1 1 0 Switch states of Lower leg device Sa'1 Sa'2 Sa'3 Sa'4 Sa'5 0 1 1 1 1 1 0 0 1 1 1 1 0 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 0 1

CONTROL STRATEGY The most effective method of controlling the output voltage is Pulse Width Modulation (PWM). PWM techniques are also classified depending on carrier signal and reference signal. PWM technique varies with respect to the harmonic content in the output voltage. The most popular and easiest technique to implement uses several triangular carrier signals and one reference or modulation signal per phase. If an N level inverter is employed, N-1 levels of carrier signal will be needed. All the carrier signals have the same frequency and the same peak to peak amplitude [5],[6]. The zero reference is placed in the middle of the carrier set. Fig. 2 shows the principle of the PWM method for a multi level inverter. Six level inverter carrier signals are five triangular wave signals which have DC bias for each voltage level. The reference signal is a sinusoidal. At every instant, each carrier signal is compared with the reference signal hence it produce PWM pulse for one phase. For three phase system, there 120o phase shifted reference sinusoidal signal is used. The duty cycle of each voltage level is determined by the ratio of the sine wave amplitude to the triangular carrier signal amplitude.

Fig. 3 shows one of the three line-neutral voltage waveforms

SIMULATION CIRCUITS Six level diode clamped inverter has been designed and simulated using PSIM [4]. The power circuit of six level diode clamped inverter is shown in fig.4. IGBT has been chosen as the power semiconductor switches, since it has more features than other power semiconductor switches.

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Advances In Power Electronics & Power System December 4th-5th, 2010 PIET, Limda

Fig. 5 Sub circuit for generation of PWM signals for one phase The simulation parameters are switching frequency = 2000 Hz, frequency =50 Hz, DC bus voltage= 100V, load Rs = 20 ohm and load Ls=0.00139H. Line voltage between a and b is shown in fig 6. Three phase line voltage and phase voltage are shown in fig. 7 and fig. 8 respectively.

Fig. 4 Six level DCMLI power circuit in PSIM Control circuits are given using the sub circuit block. In sub circuit block, Control circuit is generating triggering pulse to IGBT shown in fig. 5. The triggering circuit is designed on the three phase sinusoidal modulation waves. Three of sine wave sources have been obtained with same amplitude and frequency but displaced120o out of the phase with each others. For carrier wave sources, five triangular waves with different DC bias are generated using the triangular source. After comparing one phase modulating signal with all carrier base signal so it produce five different pulses, it transmitted to the IGBTs of one phase upper leg and invert of all this pulses are given to the lower leg IGBTs.

Fig. 6 Line voltage between a and b phase

Fig. 7 phase voltage of 6 level DCMLI

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Advances In Power Electronics & Power System December 4th-5th, 2010 PIET, Limda

Samir Kouro, Pablo Lezana, Mauricio Angulo, jose Rodriguez, Multicarrier PWM with DC-link Ripple Feed forward Compensation for Multilevel Inverters, IEEE Transactions on Power Electronics, Vol.23 No.1, Jan. 2008.

Fig. 8 Three Phase Line Voltage of 6 level DCMLI

CONCLUSION

This paper has presented a six level diode clamped multilevel inverter for harmonic elimination in PSIM software. Multi carrier PWM method is simple and it can be implemented even with a few analog circuits. As a conclusion, multilevel inverter not only solves harmonics and EMI problems, but also avoids possible high frequency switching induced motor failures. REFERENCES
J. Rodriguez, J.S. Lai, F.Z. Peng, Mulrilevel inverters : A survey topologies, controls and applications, IEEE transactions on industrial Electronics, vol -49 No.4 pp. 724-738, 2002. J.S. Lai, F.Z.Peng, Multilevel Converters A new Breed of Power Converters, IEEE Transactions on Industry Applications, Vol 32, No. 3, pp 509-517, 1996. Engin Ozdemir, Sule Ozdemir, Leon M Tolbert Fundamental-Frequency-Modulated Six-Level Diode Clamped Multilevel Inverter for Three Phase StandAlone Photovoltaic System, IEEE transactions on industrial Electronics, vol -56 No.11 pp. 4407-4415, Nov.2009. Powersim Inc, PSIM Users Guide, Version 7,Powersim Inc, http://www.powersimtech.com. Ms. T. Prathiba and Dr. P. Renuga,Multi Carrier PWM based Multi Level Inverter for High Power Application, International journal of Computer Applications (09758887), vol -1 No. 9 pp. 67-71, 2010 . S.A. Bashi, N.F. Mailah, M.Z. Kadir, K.H.Leong, Generation of Triggering Signals for Multilevel Converter, European journal of Scientific Research, ISSN 1450-216X, Vol.24 No.4 pp. 548-555, 2008. N. Kimura, T. Taniguchi, t. Morizane, T. Oono, Study of Multi-Pulse PWM method for Distributed Generation System, European conference on Power Electronics and Applications, 2005. K. Chandra Sekhar, G. Tulasi Ram Das, A Six- level SPWM Inverter for an Open-end Winding Induction motor, Asian Power Electronics Journal, Vol. 1, No. 1, Aug 2007. S. Srinivas, Uniform Overlapped Multi-Carrier PWM for a Six-level diode Clamped Inverter, International Journal of Energy and Power Engineering 2:4 2009 pp. 253-258.

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