Small-Signal Model and Control Design of LCC Resonant Converter with a Capacitive Load Applied in Very Low Frequency

High Voltage Test System Manli Hu, Norbert Frhleke, Joachim Bcker
Paderborn University Power Electronics and Electrical Drives 33095 Paderborn, Germany E-Mail: {hu, froehleke, boecker}@lea.upb.de
Abstract Very low frequency (VLF) high voltage (HV) sinusoidal waveforms are suitable for testing characteristics and insulation qualities of long buried cables. Such a test generator should provide a sinusoidal voltage from some tens to hundreds of kV. A LCC resonant inverter with a three-stage symmetrical voltage multiplier rectifier is developed for this application. In this context, the contribution deals with the derivation of a smallsignal model of the LCC resonant converter with a capacitive load as a basis for the subsequent controller design. For that purpose, the concepts of generalized averaging, extended describing functions and order reduction are adopted in this paper. As a particular feature of the designed current controller, both the converter switching frequency and the duty cycle are utilized as actuating variables in order to cope with large ranges of output voltage and load. The small-signal model and the controller design are verified by measurements on prototypes. Index Terms Converters, industrial control, modeling, reduced-order systems.

I. INTRODUCTION Mobile (HV) high voltage test generators are required for testing characteristics and insulation qualities of long buried cables during commissioning or services. In order to reduce reactive power, sinusoidal waveforms of very low frequency (VLF) are applied. Such a test generator should be capable of generating a true-sinus test voltage of 0.1 Hz at some tens to hundreds kV. The required power is in the range of a few to some tens kW. Resonant topologies are promising candidates for such applications due to their quasi-sinusoidal voltage and current waveforms and soft-switching features, which are favourable to reduce electromagnetic interference and losses. Among all the topologies, the LCC resonant converter shows most desirable features, including natural commutation for BJT, GTO and SCR devices at sub-resonant operation mode or zero-

voltage switching for MOSFETs at over-resonant operation mode. Besides the above features, the LCC resonant converter shows additional merits. First, the voltage conversion characteristics enable wide operation ranges in terms of output voltage, power and load behaviour. Secondly, a proper design of a LCC resonant converter can make even use of the parasitics of HV-transformer and the balancing capacitors of rectifier diodes, which result in smaller tank size of series inductor Ls and parallel capacitor Cp. A number of high-power high-voltage applications adopting LCC resonant converter demonstrate its practicability and effectiveness in this field [2]. It is well known that voltage multiplier circuits can be used for generating high output voltage. The losses and size of the multiplier circuits do not exceed the savings made on the transformer, if the multiplier is limited to 3-5 stages [3]. Fig. 1 shows the circuit diagram of the power supply generating the positive half-wave of the test voltage: The zero voltage switched LCC-circuit is connected with a symmetrical threestage voltage multiplier rectifier via a step-up transformer, the shown load consists of the capacitance of the cable under test and a resistor for discharging. In this context, the paper focuses on the system modeling and the control design. In principle, the output voltage or current of the LCC converter can be controlled either via the switching frequency or via the duty cycle ratio. Investigations showed that both control modes must be employed in the control strategy to meet the design specifications. Many authors have contributed to the small-signal modeling of LCC resonant topology. In [1], a small-signal model for LCC resonant converter with LC filter has been well explored for high-frequency applications; while [2] demonstrated dynamic models for LCC resonant topology with capacitive output filter for high-power applications. Based on that literature, a small-signal model is derived for a simplified LCC

Fig. 1. Circuit diagram of LCC resonant inverter, HV-transformer and symmetrical three-stage voltage multiplier rectifier [9] (Each of the shown diode consists of 10 single diodes connected in series with parallel snubbers and capacitors).

resonant converter with a capacitive load. After obtaining the original control-to-output-current transfer functions, the zeropole distribution is studied, this is simplified by reduced-order transfer functions for current controller design. This paper is organized as below: Section II presents a simplification of the original circuit and the simulated main waveforms of the simplified one. Section III gives the detailed derivation of the small-signal model and the transfer function measurements based on the simplified LCC resonant converter. In Section IV, reduced-order control-to-output-current transfer functions are derived. Section V gives the current controller design. Finally, experimental measurements on prototypes are provided. II. CIRCUIT SIMPLIFICATION AND ANALYSIS

diL (t ) u AB (t ) Rs iL (t ) u s (t ) u p (t ) = dt Ls dus (t ) 1 = iL (t ) dt Cs duo (t ) 1 = dt Co u (t ) i D ( t ) o , Co = C g 1 + C L RN

(3)

Apparently, three independent variables, inductor current iL(t), voltage us(t) across the series capacitor Cs, and output voltage uo(t) are taken as components of a state vector, (4) xo (t ) = [iL (t ), u s (t ), u o (t )] . The voltage up across the parallel capacitor Cp is not considered as an independent state variable since it can be expressed by the inductor current iL and the output voltage uo. In this paper, the output current iD is controlled by either the switching frequency s or the duty cycle d. Thus, the operating point is determined by the set {uin, iD, uo, s, d}.

After the analysis of the original circuit (Fig. 1), a simplification is employed as the following. First, the threestage symmetrical voltage multiplier rectifier is simplified to a one-stage symmetrical rectifier since the voltage across the capacitors of each stage at steady-state is proportional to the final output voltage, as described in (1). The capital letters in (1)-(2) are used to denote steady-state values of the corresponding time-varying variables of Fig. 1 [3]. (1) U k 1' = U o ' 2 m , U ki' = U o ' m , U gj'= U o ' m (m: stage-number; Uki' = Ukia' or Ukib'; i = 2-m; j = 1-m) The average value of all diode currents ID_avg is the same for each stage [3]. This can be explained simply by the fact that the output DC current can only flow via the two arms of the diode bridge in a symmetrical multiplier rectifier. (2) I D _ avg= I o' 2 Secondly, the transfer ratio of the HV transformer is simplified from n to 1. As a result, the equivalent simplified circuit is shown in Fig. 2. In which, Rs reflects the losses occurring in the inverter and Ls. Main waveforms of the simplified circuit of Fig. 2 are shown in Fig. 3. It can be seen that the resonant current iL has a nearly sinusoidal shape with amplitude iLP. This current flows continuously through Cs, which shows a nearly sinusoidal voltage us. Voltage uk remains at a nearly constant value, which is one half of the output voltage uo. Voltage up shows piecewise sinusoidal evolution, when it is lower than uk. During this interval, the rectifier is in the turn-off state, hence the resonant current iL flows through Cp completely. If up equals uk, the rectifier diodes Db1 and Da2 turn on, the current flows either through Ck1a and Db1 to the load or through Da2 and Ck1b to return back. During this interval, up is clamped to uo/2. When the resonant current iL reaches zero, the rectifier will turn off again, and the above process will be repeated with opposite sign. The sum of iDb1 and iDb2 yields iD. III. SMALL-SIGNAL MODELING A. Nonlinear State Equations Based on the simplified equivalent circuit (Fig. 2) and the main waveforms (Fig. 3), the system behaviour can be described by the following state equations:

Fig. 2. Simplified equivalent circuit of the LCC resonant converter

Fig. 3. Main waveforms of LCC resonant converter

State Variable Harmonic Approach Generalized averaging method [4] is adopted for the modeling, which is based on the fact that the state variable can be approximated in a period [0, Ts] by a Fourier series representation of the form:
f (t ) =
+ m =

B.

f (m) e

jm st

T , f ( m) = 1 f (t ) e jm t dt , s = 2 T
s s

s 0

Ts

(5)

In order to consider changes from period to period, the complex Fourier coefficients f(m) are regarded as varying slowly in time. Since the resonant current iL(t) and the voltage us(t) are predominantly of sinusoidal shape (Fig. 3), they can be approximated quite accurately by (6) iL ( t ) iLs ( t ) sin( s t ) + iLc (t ) cos( s t ) (7) u s (t ) u ss (t ) sin(s t ) + usc (t ) cos(s t ) where iLs(t), iLc(t) and uss(t), usc(t) are time-varying 1st-order coefficients. The amplitude of iL(t) can then be obtained by
i LP = i Ls 2 + i Lc 2

where
u ps = u pc =
Lc + sin(2 ) + Ls sin 2 ( ) C p s 2 C p s

(17)

i Lc

C p s

sin 2 ( )

Ls + sin (2 ) C p s 2

(18)

4) At the end of the diode conduction phase, which is at = + , Fig. 3 and (12), (14) yield:
u p ( ) uo u i [1 cos( )] o + LP 2 2 C p s

(19)

(8)

which can be solved for the conduction angle.

= cos 1
C ps uo iLp 1

The output VLF sinusoidal voltage uo(t) is regarded as a slowly varying DC quantity, i.e. a zero-order approximation.
u o (t ) u o

(20)

(9)

Extended Describing Function (EDF) The aforementioned state equations (3) cannot explicitly be solved because the terms: uAB(t), up(t) and iD(t) depend on the state and control variables in a nonlinear manner. The EDF concept [5] that assumes quasi-steady state is adopted for solving this task. That is to say, uAB(t), up(t) and iD(t) will be approximated either only by the fundamental terms or by the DC terms of their Fourier series. The corresponding Fourier coefficients of orders 1 or 0 are called extended describing functions (EDFs). Above nonlinear terms can be calculated as below: 1) The output voltage from the full-bridge inverter uAB has a quasi-square form, which is relevant to the input DC voltage uin and duty cycle d, which is approximated only by the fundamental component:
u AB ( ) u AB(1) e j + u AB ( 1) e j = 4

C.

Till now, all the variables: uAB(t), up(t), iD(t) and (t) have been expressed by state variables and the control variables. Hence, the state equations (3) can be solved. D. Harmonic Balance By substituting the original state variables and nonlinear terms in (3) with the results of the harmonic approximation in Section B and the EDF concept in Section C, and by equating the coefficients of DC, sine and cosine terms respectively, the state equations (3) can then be rewritten. The new state variables are selected as the Fourier coefficients of the fundamental terms or DC terms of the original state variables, as shown below. (21) x (t ) = [i Ls , i Lc , u ss , u sc , uo ] The newly derived state equations are shown in (22). Here, switching frequency s and duty cycle d are assumed as timeinvariant magnitudes. sin (2 ) i sin 2 + i + 4u sin d
di Ls 1 = dt Ls
in

d u in sin sin , = s t (10) 2

2) With the information of Fig. 3, when the diode Db1 is on, iDb1(t) iDa2(t) 0.5iL(t); when the diode Db2 is on, iDb2(t) iDa1(t) 0.5iL(t). The sum of iDb1(t) and iDb2(t) yields iD(t), which is approximated only by the DC component:
i D 2i Db1(0 ) = 1 2

R i u s Ls ss

Ls

Lc

s C p

+L i s s Lc

(22a)
1 i Lc sin 2 iLs + sin(2 ) diLc 1 2 L i = Rs iLc u sc s s Ls dt Ls s C p

(22b)

iLP sin ( )e

j 0

d =

(1 cos )

i Ls 2 + i Lc 2

(11)

Here, is the conduction angle of the diode Db1. 3) According to Fig. 3, up() can be described piecewise as follows [2]:
u p ( )
u p ( )

du ss 1 = i Ls + s u sc dt Cs du sc 1 = i Lc s u ss dt Cs
2 2 du o u 1 (1 cos ) i Ls + i Lc = o dt Co 2 RN

(22c) (22d) (22e)

u o i LP [1 + cos( )] , + 2 + 2 C p s

u o iLP [1 cos( )] , + + 2 C p s

(12) (13) (14) (15)

uo , + + 2 u u p ( ) o , 2 + 2 + 2 u p ( )

According to EDF concept, only the fundamental terms of the Fourier series of up are considered:
u p ( ) u p(1) e j + u p ( 1) e j = u ps sin( ) + u pc cos( )

(16)

Quasi-Steady-State Solution Since the Fourier coefficients are regarded as varying slowly in time and the output sinusoidal voltage has very low frequency, the derivatives on the left side of (22a)-(22e) are set to zero for quasi-steady-state solutions. The cable capacitor CL is replaced by RL at each quiescent operating point for the quasi-steady-state analysis. The corresponding quasi-steadystate solutions of state variables are attached in Appendix A.

E.

The voltage conversion ratio versus normalized switching frequency and duty cycle are obtained, as shown in Fig. 4. It shows the allowed operation region as the shaded area with boundary operating points OP1-OP8, which are determined by the specified output voltage range, load range and modulation limit of each control variable.
M= Uo Uo ' = U in m n U in
fs , f0
Ls , CR

(23)
1

f sn =
Z=

f0 =

2 Ls C R

, CR = Cs C p

Cs + C p

(24)
(a)

R R ' Q = o = 2 o2 Z m n Z

R R Ro = L N RL + R N

(25)

Since the output voltage uo(t) is regarded as DC voltage at quasi-steady-state, only the average value of output current iD(t) will be considered for quasi-steady-state analysis:
i D ( 0) uo Ro

(26)

The corresponding quasi-steady-state conduction angle ss of diode Db1 can be obtained by using (11), (19) and (26):
ss = 2tg 1
2 C p s Ro

(27)

(b) Fig. 4. Voltage conversion ratio of LCC resonant converter vs. (a) normalized switching frequency and (b) duty cycle

Linearization From the nonlinear large-signal model (22), a linearized small-signal model is deduced via the perturbation of the quasisteady-state operation point (Uin, Fsn, D, IL, etc.): (28) u in = U in + u in , f sn = Fsn + f sn , d = D + d The analytical derivation was implemented under the smallsignal assumptions using computer algebra tool (Mathematica, etc.). The resulting linear small-signal model is depicted in Fig. 5 and the corresponding parameters are attached in Appendix B. The parameters of this model vary, however, depending on the operation point. Verification A transfer function measurement is employed on a simplified equivalent power LCC resonant converter with 1:2 transformer and one-stage symmetrical voltage multiplier rectifier (Fig. 12 (a)) to verify above small-signal model. The schematic diagram for the switching-frequency-to-output transfer function Guf(s) measurement is shown in Fig. 6. An impedance analyzer generates the sinusoidal small-signal with sweeping frequency and receives the corresponding smallsignal from the control input and output voltage of the power stage. Measurement of duty-cycle-to-output Gud(s) has a similar diagram except the changed control variable. The comparison between the model and measurement are shown in Fig. 7. Conclusions can be drawn that the measurements agree well with the predicted results in most of the studied frequency region. Some deviation in high frequency region will be ignored since it has little effect on the closed-loop design. G.

F.

Fig. 5. Small-signal equivalent circuit model of LCC resonant converter

Vz Vx
Vy

Fs + fs

Fig. 6. Schematic diagram of control-to-output transfer function measurement

I Dn =

U I D , i i Dn = D , I B = in Z IB IB

(29)

Gif (s) =

iDn = 2 2 f sn 1+ s 1+ 2 fp s + s 1+ 2 fp4,5 s + s 2,3 fp1 fp4,5 fp4,5 fp2,3 fp2,3

2 2 s 1 2 fz2,3 s + s 1+ 2 fz4,5 s + s Gf 0 1+ fz2,3 fz2,3 fz4,5 fz4,5 fz1

(30)
2 s s s s Gd01+ 1+ 1+ 2dz3,4 + dz1 dz2 dz3,4 dz3,4 i Gid (s) = Dn = 2 2 d 1+ s 1+ 2dp s + s 1+ 2dp4,5 s + s 2,3 dp4,5 dp4,5 dp1 dp2,3 dp2,3

(a)

(b) Fig. 7. Control-to-output transfer functions comparison. (a) Control variable is duty cycle. Switching frequency remains 40 kHz. (b) Control variable is switching frequency. Duty cycle remains 0.95.

(31) Parameters of the (30), (31) at operating points OP1-OP3, OP5-OP7 are listed in Table I. OP4 and OP8 will not be considered, since their transient characteristics are among those of other boundary points. Conclusions can be drawn from Table I that in the studied frequency region, Gif(s) has two right half-plane (RHP) zeros (fz2,3), three left half-plane (LHP) zeros (fz1, fz4,5), and five left half-plane (LHP) poles (fp1, fp2,3, fp4,5), while Gid(s) has four LHP zeros (dz1, dz2, dz3,4) and five LHP poles (dp1, dp2,3, dp4,5). Among them, fp4,5 or dp4,5 are beat frequency poles and determine system beat frequency dynamics. Since some zeros (fz4,5, dz3,4) and poles (fp2,3, dp2,3) are larger than or almost the same as the resonant frequency (0 2.4105 /s), which have less effect on system dynamics or control loop design, they will be ignored. The resulting reduced-order transfer functions can be obtained and are expressed in (32)-(33) for switching-frequency-to-outputcurrent Gif(s) and duty-cycle-to-output-current Gid(s), respectively.
s 1 2 fz 2,3 s G f 0 1 + fz1 fz 2,3 1 + s 1 + 2 fp s 4,5 fp1 fp 4,5 s + fz 2,3
2

IV. REDUCED-ORDER TRANSFER FUNCTIONS A two-loop control strategy is developed for this power supply. As the kernel of the closed-loop design, an average current mode controller is discussed in this paper. The typical control-to-output-current transfer functions can be obtained from the derived small-signal model, as shown in (30) and (31), in which the output current is normalized to the fictive supply current IB, which is defined as:
Gif ' ( s ) =

(32)

s + fp 4,5

s s G d 0 1 + 1 + dz1 dz 2 Gid ' ( s ) = 1 + s 1 + 2 dp s + s 4,5 dp1 dp 4,5 dp 4,5

(33)

2

Control Variable Switching Frequenc y Duty cycle

Operating Points OP1 OP2 OP3 OP5 OP6 OP7

Gf0 or Gd0

fz1 or dz1 (1/s)

Table I: Parameters of Control-to-Output Current Transfer Functions fp1 or fz2,3 or fz2,3 or fz4,5 dp1 dz2(1/s) dz3,4 (1/s) fz4,5 dz3,4 (1/s) (1/s) n/a n/a n/a 1.12E+05 3.30E+05 7.79E+04 1.57E+05 1.16E+05 7.88E+04 2.64E+05 2.06E+05 2.78E+05 0.042 0.034 0.129 0.386 0.37 0.355 4.33E+05 4.13E+05 3.74E+05 n/a n/a n/a 0.019 0.013 0.03 n/a n/a n/a 4300.3 2053.5 3982.8 2053.5 4300.3 1449.9

fp2,3 or dp2,3 (1/s)

fp2,3 or dp2,3

fp4,5 or dp4,5 (1/s)

fp4,5 or dp4,5

-2.285 -2.85 -4.374 0.063 0.899 0.733

3877.6 1721.9 3877.6 1721.9 3877.6 1126.6

4.12E+05 4.03E+05 3.75E+05 4.03E+05 4.12E+05 3.98E+05

0.04 0.054 0.047 0.054 0.04 0.0596

7.20E+04 6.32E+04 3.62E+04 6.32E+04 7.20E+04 5.78E+04

0.274 0.45 0.58 0.454 0.274 0.573

ensure the stability of the converter in entire operating region. However, there is an apparent shortcoming of the LCC resonant converter operating in duty cycle control mode as illustrated in Fig. 10: The control bandwidth drops significantly with different operating points. This phenomenon can be explained by the fact that the low-frequency gains Gd0 of the duty cycle-to-output-current transfer function, is much different at various operating points. For example, the lowfrequency gain difference is about 23 dB between operating points OP5 and OP6 (refer to Fig. 8). Hence, it is desirable to adopt some nonlinear control schemes to schedule the compensator gain for performance improvement.
ic(s) +
Reference input

Gcf(s) Gcd(s)
Compensator

fs(s) d(s)

Gif(s) Gid(s)

+ +

iest(s)
Estimated output current

(a)

(b)

Fig. 8. Comparison between original and reduced-order control-to-output current transfer functions. (a): OP1-OP3 with frequency control mode. (b): OP5-OP7 with duty cycle control mode. Solid: original transfer functions. Dotted line: reduced-order transfer functions.

Converter power stage

H(s)
Sensor gain

Fig. 8 shows the comparison of the original and the reducedorder control-to-output-current transfer functions in boundary cases. The following conclusions are drawn from this figure: in the studied region, there is almost no difference between original and the reduced-order transfer functions with frequency control mode. With the duty cycle control mode, both magnitude bode plots are nearly the same in the whole studied region. However, some differences exist in the phase comparison at high-frequency region, but they have negligible effect on the closed-loop design. From these conclusions, it can be ensured that a current controller design on basis of the reduced-order transfer function is feasible. V. CONTROLLER DESIGN The loop gain method [6] [7] has been adopted for the closed-loop design. The loop gains for Gif(s) and Gid(s) are (refer to Fig. 9):
L f ( s ) = Gcf ( s ) Gif ' ( s ) H ( s ) Ld ( s) = Gcd ( s ) Gid ' ( s ) H ( s )

Fig. 9. Average mode output current control block diagram

The actual control system consists of an outer voltage control loop and an inner current control loop, as shown in Fig. 11. The details of outer voltage control loop are not included in this paper, see [10] for details. From Fig. 11, it can be seen that an estimator is adopted for the output current in order to substitute a direct measurement, which would cause a very costly sensor due to HV applied. From the small-signal model, the estimator can be derived, which is relevant to the output voltage uo(t), peak value of resonant current iLP(t), parallel capacitor Cp and the switching frequency fs(t):
iest (t ) = iLP (t ) f s (t ) C p uo (t )

(34) (35)

Fig. 11 indicates that there is only one compensator Giu(s) in the inner current control loop, which is generated based on the combination of the aforementioned two compensators, Gcf(s) and Gcd(s). Since the two zeros (cf, cd) are equal and replaced by c, Giu(s) can be obtained as

(37)

Based on reduced-order transfer functions, two simple and commonly used PI compensators have been employed. They have the following forms for switching frequency or duty cycle control, respectively.
Gcf ( s ) = K cf 1 + s / cf s

K iu (1 + s c ) . (38) s The primary compensator gains Kcf, Kcd can be expressed by Kiu and two newly introduced parameters Kf and Kd: Giu ( s ) =
K cf = K iu K f , K cd = K iu K d

),

Gcd ( s ) =

K cd (1 + s / cd ) (36) s

(39)

The position of the zeros (cf, cd) and the gains (Kcf, Kcd) need to be designed. By adjusting such compensator parameters, we can maximize the control bandwidth and maintain enough phase margins and gain margins. Attention should be paid to the adjustment of the two zeros cf and cd, which are equal in this application: cf = cd = c. The loop gains of frequency control mode and duty cycle control mode at operating points OP1-OP3, OP5-OP7 are shown in Fig. 10. Both the phase margins and gain margins are adequate, which

The compensator Giu(s) generates an auxiliary control parameter . The actual control variables, fs and d, are linear functions of , which have the slope of Kf or Kd, respectively. In this application, only one control variable will be adjusted at the same time (refer to Fig. 4 and Fig. 11). This combination ensures the stability of the closed current control loop.

(a)

(b)

Fig. 12. Prototypes of LCC resonant converter (a) Scaled-down prototype with 1:2 transformer and one-stage rectifier (b) Prototype with 1:15 transformer and three-stage multiplier rectifier (a) (b)

Fig. 10. The loop gains of boundary operating points. (a) OP1-OP3 with frequency control. (b) OP5-OP7 with duty cycle control.

VI. VERIFICATION Before the launch of the VLF HV test generators, two prototypes were built. One is aforementioned simplified equivalent power prototype, which consists of LCC resonant inverter, 1:2 transformer, one-stage symmetrical voltage multiplier rectifier and a corresponding resistive load. This scaled-down prototype was built and measured in order to verify the system structure and controller design. The other prototype consists of LCC resonant inverter, 1:15 HV transformer, three-stage symmetrical voltage multiplier rectifier, the resistive discharge circuit (see [11] for details) and a capacitive load. This prototype is a real VLF HV generator and used to verify all the design specifications. Photos of both prototypes are shown in Fig. 12. Measurements were executed with both prototypes. Fig. 13 represents the process from initial states to the referenced steady states of the control variables: fs(t) and d(t), resonant current iL(t) and estimated output current iest(t), respectively. The demanded output current was set to 2 A at constant referenced output voltage (440 V) condition. It can be seen from Fig. 13 that the estimated output current has no overshoot and the settling times are less than 1 ms, which confirm the conclusions of above analyses and controller design. Fig. 14 shows measurement from the real VLF HV prototype. It can be seen that the output voltage has perfect sinusoidal form with a peak value of nearly 120 kV and a period of 10 s, which meet the design specifications and verify above modeling and control design once again.

Fig. 13. Output current measurement of step change response on scaled-down prototype

Fig. 14. Experimental measurement of output voltage on VLF HV prototype with 50 kV/div in vertical direction and 2 s/div in horizontal direction

VII.

CONCLUSION

Fig. 11: Two-loop control diagram comprising average mode current controller

This contribution presents a novel LCC resonant converter with a capacitive load generating up to 85 kV at 0.1 Hz. The concepts of generalized averaging method, extended describing functions and order reduction are combined in this paper to obtain the small-signal model for the complex power circuit. As a particular feature of the designed current controller, both the converter switching frequency and the duty cycle are utilized as actuating variables in order to cope with large ranges of output voltage and capacitive load. The modeling and the controller design are verified by measurements on prototypes. Although above achievements, there are two aspects need to be improved in the future. The derived small-signal model does

not take account of the power losses in the high voltage circuit. A more accurate model including these power losses and stray capacitances of the HV-circuitry is expected. Due to the nonlinear characteristics, it is difficult to get satisfied performance in the whole operating range by using a conventional PI controller, some nonlinear control schemes are suggested for improving the performance. APPENDIX A
I Ls = 8U e K 2 4 K1 2 + K 2 2

ACKNOWLEDGMENT The authors gratefully acknowledge the contributions of BAUR Prf- und Messtechnik GmbH, Sulz (Austria), Regatron AG, Rorschach (Switzerland), and Habemus Electronic & Transfer GmbH, Thannhausen (Germany) for building and testing the prototypes. REFERENCES

, I Lc =

16U e K1 4 K1 2 + K 2 2

(A1) (A2) (A3) (A4) (A5) (A6) (A7) (A8)

U ss =

Uo =

I LP Ro (1 cos ss ) 2 2 2 D , U e = s C pU in sin I LP = I Ls + I Lc 2

I Lc , U sc = I Ls C s s Cs s

K1 = + ss Cs Lss 2 K 2 = 2 sin ss + Cs Rss sin (2 ss ) ss = ss +

2

ss = 2tg 1

C 2 , = p Cs Ro C p s

APPENDIX B
4 sin( D ) , E d = 2U in cos( D ) 2 2 M 1 = I Ls cos( ss ) I Lc sin( ss ) M 2 = I Lc cos( ss ) + I Ls sin( ss )
Kv =
E s = Ls I Lc0 +
Ec = Ls I Ls0

(B1) (B2) (B3) (B4) (B5) (B6) (B7) (B8) (B9) (B10) (B11) (B12)

2U o0 M 1 I LS 0 sin 2 ( ss ) + I LC 0 ss + I LP s C p s 2
2U o0 M 2 I LS 0 ss I LC 0 sin 2 ( ss ) + I LP s C p s 2

Eric X. Yang, F. C. Lee, Jovanovic, M. M. Small-Signal Modeling of LCC Resonant Converter, Power Electronics Specialists Conference, PESC92, 23rd Annual IEEE, Vol.2, 1992, pp.941-948. [2] Juan A. Martin-Ramos, Juan Diaz, Alberto M. Pernia, Juan Manuel Lopera, Fernando Nuno, Dynamic and steady-State Models for the PRC-LCC Resonant Topology With a Capacitor as Output Filter, IEEE Transactions on Industrial Electronics, Vol.54, No.4, August 2007, pp.2262-2275. [3] Heiko Osterbolz, Cornelius Paul, Philips Medical Systems, Study of Resonant High-Voltage Cascaded Circuits with Different Numbers of Stages, Simulation in Drive Technology, Power Electronics and Automotive Engineering. SIMPLORER Workshop 2001. [4] S. R. Sanders, J. M. Noworolski, X. Z. Liu, and G. Verghese, Generalized averaging method for power conversion circuits, IEEE Trans. Power Electron., vol. 6, no.2, Apr. 1991, pp.251-259. [5] Eric X. Yang, Fred C. Lee, and M.M. Jovanovic, Extended describing function technique applied to the modelling of resonant converters, in Proc. VPEC, 1991, pp.179-191. [6] R. B. Ridley, B. H. Cho, and F. C. Lee, Analysis and interpretation of loop gains of multi-loop-controlled switching regulator, IEEE Trans. Power Electron, 1988, pp.489-497. [7] Eric X. Yang, Byungcho Choi, Fred C. Lee, and Bo H. Cho, Dynamic Analysis and Control Design of LCC Resonant Converter, Power Electronics Specialists Conference, PESC92, 23rd Annual IEEE, Vol.1, 1992, pp.362-369. [8] Marian K. Kazimierczuk, Nandakumar Thirunarayan, Shan Wang, Analysis of Series-Parallel Resonant Converter, IEEE Transactions on Aerospace and Electronic Systems, Vol. 29, No.1, Jan. 1993, pp. 88-99. [9] BAUR Prf- und Messtechnik GmbH, Schaltungsanordnung zur Erzeugung einer Prfspannung fr die Prfung elecktrischer Betriebsmittel, German Patent DE 19513441, filed 13.04.1995. [10] Z. Cao, N. Frhleke and J. Bcker, Control Design for a Very LowFrequency High-Voltage Test System, submitted to Proc. EPE, Barcelona, Spain, 2009. [11] Z. Cao, N. Frhleke and J. Bcker, Converter and Control Design for Very Low-Frequency High-Voltage Test Systems, submitted to Proc. ECCE, San Jose, California, USA, 2009.

[1]

Z Lc = Ls s

2 I LcU o M 1 I LP 3 2 I LsU o M 2

ss
C p s

Z Ls = Ls s +
Zs =

I LP 3
+

ss
C ps

2 I LsU o M 1 I LP 3

C pRs s + sin 2 (ss ) C p s

Zc =

2 I LcU o M 2 I LP
3

C pRs s + sin 2 (ss ) C p s

K us =

2M 1 2M 2 , K uc = , Gs = Css I LP I LP
C p 0U o 2

J c = C sU ss0 , J s = C sU sc0 , H f =
Hc =

C , H s = I Lc , H u = p s , 2 I LP I LP
I Ls