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PROCESSOR
DATE:9.09.08
THE TEXAS INSTRUMENTS TMS320C5X
The TMS320C5X DSPs are general purpose 16bit,fixedpoint DSPs. Depending
on the device version,TMS320C5X parts include up to 9.5K words of on
chipprogram/data RAM, up to 16K words of ROM, a standard serial port, a timedivision
multiplexed(TDM) serial port, and a 16bit timer. The four variations of the TMS320C5X
are TMS320C50 (9.5K words onchip RAM), TMS320C51 (1.5K words onchip RAM),
TMS320C52 (1K word onchip RAM), and TMS320C53 (3.5K words onchip RAM).
TMS320C5X Supports . . .
OnChip Memory
OffChip Memory Access
I/O Peripheral Interface
Direct Memory Accessing
OnChip Memory
1K ⋅ 16bit onchip total RAM.
This memory is available as data and program memory. (Some instructions require
multiple locations for storage, reducing the amount of onchip RAM availability.)
OffChip Memory Access
Access to offchip memory requires a minimum of two cycles on all external memory
writes. Nominal memory access time is 12 ns using a TMS320C52 at 80 MHz. (To access
RAM or peripherals requires asserting the RAM’s OE signal continuously and using the
DSP’s R/W and STRB signals for memory selection. This technique continuously drives
the bus leading to contention and power usage issues.)
I/O Peripheral Interface
64K ⋅ 16bit I/O Space for peripheral interfacing.
Has dedicated control lines and DSP instructions for accessing I/O space directly.
Direct Memory Accessing
An external DMA controller interface, but DSP operation is suspended during DMA
transfers. Block DMA transfers require DSP intervention.
EXPT.NO: 7a STUDY OF VARIOUS ADDRESSINGMODES
DATE: 9.09.08 OF DSP
AIM
To study the various addressing modes of C5X DSP processors.
ADDRESSING MODES
C5X processors can address 64K words of program memory and 96K of data
memory. C5X supports the following six addressing modes:
1.Direct addressing.
2.Memory - mapped register addressing.
3.Indirect addressing .
4.Immediate addressing.
5.Dedicated – register addressing.
6.Circular addressing.
The details of each of these addressing modes are considered next.
DIRECT ADDRESSING
The data memory used with C5X processors is split into 512 pages
each of 128 words long. The data memory page pointer (DP) in ST 0 holds the address of
the current data memory of C5X, only lower – order 7 bits of the address are specified in
the instruction. The upper 9 bits are taken from the DP.
IMMEDIATE ADDRESSING
The immediate addressing mode can be used to load either a 16 – bit
constant or a constant of length 13, 9 or 7. accordingly it is reffered to as long immediate
or short immediate addressing mode. This mode is indicated by the symbol #. For e.g.,
ADD # 56h adds 56h toACC. Similarly ADD # 4567h adds 4567h to ACC.
RESULT
Thus the various addressing modes of C5X DSP processors were studied.
EXPT NO: 8 ADDITION OF TWO NUMBERS
DATE:9.09.08
AIM
PROGRAM DESCRIPTION
.MMREGS
.TEXT
LDP #100H
LACC #0H
ADD #1H
SACL #2H
H: B H
OUTPUT
DATA DATA
MEMORY
ADDRESS
8000 1
RESULT
Thus addition of two numbers is done using TMS2320C5X and the output
is verified
EXPT NO :9 TWO`S COMPLEMENT OF A NUMBER
DATE:16.09.08
AIM
PROGRAM DESCRIPTION
LDP- data pointer pointing to the location 8000H at page 100H
LACL-load the data memory value to the accumulator
CMPL-one`s complement of the accumulator
ADD-add data memory value with left shift to accumulator
SACL- store accumulator with left shift in data memory location
PROGRAM
.MMREGS
.TEXT
LDP #100H
LACL #5H
CMPL
ADD #1H
SACL 0000,0
H: B H
OUTPUT
DATA DATA
MEMORY
ADDRESS
8000 11
RESULT
Thus two’s complement of a number is done using TMS2320C5X and the
output is verified
AIM
To write a program to calculate the value of the function Y=A*X1+B*X2+C*X3
PROGRAM DESCRIPTION
Load the constant A in T register. Multiply T register with X1.load T register with
constant B and add P register to the accumulator These two steps can be done by the
single instruction LTA. Multiply T register with X2.load T register with the constant C
and add P register to accumulator. We can use LTA instruction here .Multiply T register
with X3.Add the product to the accumulator .
PROGRAM
.MMREGS
.TEXT
LDP #100H
LACL #0H
LT 0000
MPY 0003H
LTA 0001H
MPY 0004H
LTA 0002H
MPY 0005H
APAC
SACL 0006,0
H: B H
INPUT
DATA DATA
MEMORY
ADDRESS
8000 1
8001 2
8002 3
8003 4
8004 5
8005 6
OUTPUT:
DATA DATA
MEMORY
ADDRESS
8006 20
RESULT
Thus two’s complement of a number is done using TMS2320C5X and the
output is verified
EXPT NO:11 LINEAR CONVOLUTION
DATE:30.09.08
AIM
To perform linear convolution using TMS2320C5X processor
PROGRAM DESCRIPTION
PROGRAM
.MEMREGS
.TEXT
START :LDP #02H
LAR AR1,#8100H
lar ar0,#8200H
LAR AR3,#8300H
LAR AR4,#0007H
LAR AR0,#8203H
LACC #0C100H
MAR *,AR0
RPT #3H
TBLW *-
INPUT
X(n)
DATA DATA
MEMORY
ADDRESS
8000 1
8001 3
8002 1
8003 3
INPUT
H(n)
DATA DATA
MEMORY
ADDRESS
8200 0
8201 1
8202 2
8203 1
OUTPUT
Y(n)
DATA DATA
MEMORY
ADDRESS
8300 1
8301 5
8302 8
8303 8
8304 7
8305 3
8306 0
RESULT
Thus linear convolution is performed using TMS2320C5X and the output
is verified