Dynamic Characteristic Analysis of Multi-bridge PWM Inverter for SSSC

B. Han, member Myongji University Seoul, Korea

S. Moon, member and J. Park, senior member Seoul National Undversity Seoul, Korea

G. Karady, fellow Arizona State University Tempe, AZ 85287

Abstract This paper proposes an SSSC based on multibridge inverters in PWM scheme. The dynamic characteristic of proposed SSSC was analyzed by simulation with EMTP codes, assuming that the SSSC is inserted in the transmission line of one-machine-infinite-bus power system. The proposed SSSC has 6 H-bridge inverter modules per phase, which generates 13 pulses for each half period of power frequency. The proposed SSSC generates a quasi-sinusoidal output voltage by 90 phase shift to the line current. The proposed SSSC can be directly inserted in the transmission line without coupling transformers, and has flexibility in expanding the operation voltage by increasing the number of bridges in series connection. Keywords: FACTS(Flexib1e AC Transmission System), STATCOM(Static Synchronous Compensator), SSSC(Static Synchronous Series Compensator), EMTP(E1ectro-Magnetic Transients Program), PWM(Pu1se Width Modulation)

In order to coinplement this weak point, multi-bridge inverter composed of 5 H-bridge modules per phase was proposed by Peng for STATCOM application. The system operation was verified through experimental works with a scaled m~del.[~l[l In this papelr a multi-bridge SSSC composed of 6 H-bridge modules is proposed. The operation of proposed system is verified through simulations with EMTP codes. The operational principle of SSSC will be described in Section 11. The output vclltage formation of multi-bridge inverter will be described in Section 111, based on the output voltage of each module depending on switching status. Power circuit, gate signal generation, and controller operation were modeled with EMTP, whose simulation results will be described in Section IV.[~][I

11. SSSC COMPENSATION

The operation of SSSC can be explained using an equivalent circuit and phasor diagram shown in Fig. 1. SSSC is represented with an ac voltage source whose output voltage has 90 phase lead or lag to the line current. SSSC is able to emulate a lint:-reactance compensator by injecting ac voltage source whose magnitude and sign can be controlled. In the phasor diagram, it is assumed that the phase difference between the sending point and the receiving point is maintained as a constant value of 6.

I. INTRODUCTION
FACTS devices using high-power inverter have been studied in United State, Japan, and some European countries because they are expected to be very effective for easy control of power flow, improvement of transient stability, attenuation of low-frequency oscillation in power systems.[] STATCOM was a first FACTS device using voltage source inverter with GTO, which is connected parallel with the bus needed for compensation. SSSC has same configuration of power circuit as STATCOM, but different configuration of control. SSSC injects voltage in series with a transmission line to control the voltage across the transmission In order to increase operation voltage FACTS device has an inverter whose pole consists of many GTOs connected in series. However, series connection of GTO brings about many difficulties. Although it is proven technology, still there is restriction in maximum allowable number for actual application. Step-down transformers are normally used for properly matching the inverter operation voltage with the power system voltage. Multi-level inverter was proposed to increase the system operation voltage avoiding series connection of switching devices. But multi-level inverter has complexity i formation n of output voltage and requires many back-connection diodes.

I+

V.

Fig. 1. Principle of SSSC compensation Series compensation with SSSC is conceptually similar to that with capacitor. But its compensation characteristic is slightly diffexent. SSSC can inject a voltage without regard to the line current. From the phrlse diagram in Fig. 1, the active power through

0-7803-6420-1/00/$10.00 (c) 2000 IEEE

1618

the transmission line can be expressed by the following equation.

where,

vL = I . x,
(a) Multi-bridge SSSC

The voltage across transmission line V, can be derived by the following equation.

v,. = V ,

2Vsin 2

vA!

Inserting equation (2) into equation (1) and arranging it, the active power through the transmission line can be derived as the following.

P,

V3 -sin
XL

6 + -V,cos:( )
XL

(3)
(b) Switching pattem

The reactive power through the transmission line can be derived as the following too.
Q , = -(I

Fig. 2. Principle of multi-bridge inverter

B.Gate-pulse Generation
V2
XL

Fig. 3 shows a principle of gate-pulse generation for P W M scheme. Fig. 3a shows four carriers and one reference signal Equation (3) means that SSSC can transmit active power to generate gate pulses for inverter module INVl and INV2. through the line when the phase difference between sending The frequency of carrier T1, T2,T3, T4 is 480[Hz]. Each of four carriers has 90 phase shift each other. The reference point and receiving point is zero. signal Vd has maximum value of 0.9 in per unit and has a sinusoidal waveform of 6OHz. Fig. 3b shows how to generate the gate pulses using reference and carrier. Carrier T1 and T 3 111. MULTI-BRIDGE SSSC are used as input to generate gate pulses for inverter module INVl shown in Fig. 2. Fig. 3c Shows four gate pulses A. System Operation Analysis supplied for switch S l yS2, S3, and S4, and output voltage of The proposed SSSC consists of 6 H-bridge inverter inverter module INVl with the reference signal V,, In this inodules per phase as shown in Fig. 2a. The operational figure the switching pattem of each switch S1 -S4 is principle of one module can be explained using Fig. 2b. The properly operated according to the switching state in Table 1, ideal switch shown in Fig. 2b represents GTO switch and where the number under waveforms means identification back-to-back connected diode. number for each switching state. The gate pulses for inverter module INV2 can be obtained The output of each module has three states +V, 0, -Vdc depending on states of inverter switch Sl-S4. Table 1 shows using same procedures as those for inverter module relationship between output voltage and switching state. By INVIexcept that carrier T1 and T3 is replaced with T2 and T4. It is simple to divide 6 inverter modules into 3 groups, adjusting duration time, the output voltage can be adjusted. like INVl-INVZ, INV3-INV4, and INVS-INV6. Fig. 4a shows the output voltage waveforms of each inverter group, Table 1. Switching pattem of multi-bridge invert VA-1, VA-2, and VA-3. The dc voltage V,,is 1.0 per unit. As I VIA Switching State I explained before, the carrier shown in Fig. 3a is used to generate gate pulses for building up output voltage VA-1. 1) S1, S3 : on and S2, S4 :off n U Two sets of 4 carriers are needed to generate gate pulses for 2) S2, S4 : on and S l yS3 :off building up output voltage VA-2 and VA-3. These sets of S2, S3 : on and S1, S4 : off -v, I carriers have 120 phase-shift each other. Fig. 4b shows total output voltage of three inverter groups, whose FFT analysis result is shown in Fig. 4c. Since each carrier has a frequency
XL

V - cos 6 )+ -?,sin

(-) 2

(4)

0-7803-6420-1/00/$10.00(c) 2000 IEEE

1619

of 480[Hz] and there are 12 carriers, total output voltage VA has an equivalent switching effect of 6 z . w ]THD of output voltage VA is about 10.2% and spectra of harmonics are located around 6WZ. Therefore, these harmonics can be easily filtered out.

(b) Output Waveform of VA

I?

I8

24

Tm (mS) i

(a) Carrier and reference signal ------~

l-7------l

PWM Comparator

-_ _ _ _ _ _ d

(c) FFT analysis of VA Fig. 4. Output voltage build-up

(b) Gate pulse generation scheme

C. Conceptual System Design

Implementing multi-bridge inverter using currently commercialized GTO, the maximum rating for single Hbridge modiule without series connection of GTO can be roughly calculated as the following.

m
lime (mS)

Rated DC voltage : Rated output voltage : Rated power :

v c *

v, H v,,
S~ll2V ., ;

E 5kV

z 5kV 2kAzSMVA

(c) Gate pulse and inverter output Fig. 3 Principle of gate pulse generation

The abov,e rating is too low to apply one module directly for FACTS devices. Therefore, series connection of inverters module is :indispensable. Since the proposed multi-bridge inverter has 6 H-bridge modules, the system rating is calculated a; the following. ! Rated DC voltage : Rated output voltage : Rated power :

6 . Vdc VoG VdC S = 3 . V,;

s 30kV E 30kV

2kAz30MVA

lime (mS)

The above rated output voltage is about 33.74% of phase voltage of 154-kV transmission line. This voltage is enough for satisfying the operation voltage of FATCS devices to be applied for lhe actual transmission line.

(a) Output waveform of VA- 1,VA-2, VA-3

(c) 0-7803-6420-1/00/$10.00 2000 IEEE

1620

IV.EMTP SIMULATION
A. Simulation Model
In order to analyze the operation of proposed multi-bridge PWM inverter SSSC, computer simulation with EMTP code was performed. Fig. 5 shows a single-phase simulation model for whole system. Other phases have same configurations. The power system is represented by one-machine-infinite-bus. The transmission line is modeled with a reactor considering only lumped line reactance.
VA

Fig. 5 . Simulation model for whole system Table 2. Simulation line parameter Base voltage Base power 400[MVA] Source frequency Line inductance Power angle The circuit parameters used in simulation are shown in Table 2. All values in simulation results are represented in per unit based on the base values in Table 2.
B. Simulation Controller

In simulation controller the line current is measured and sent to the phase-lock loop. The phase-lock loop generates angle signal 0 synchronized with the line current. The angle 0 is properly adjusted for each phase. Reference value of compensation voltage V is multiplied by gain K to calculate : V&'. Reference dc voltage Vdc' is compared with actual dc capacitor voltage of each phase separately. The error voltage is passed through PI controller and limiter to obtain firing angle, which is corrected by phase-lock angle 8. Vde* is determined by 0 . 0 4 5 ~ ~Measured actual dc voltage is . calculated by averaging dc voltages of 6 H-bridge modules. The output signal of PI-Controller is multiplied with mode sign of Vq*.Mode Sign is used to determine SSSC operation in C-Mode or L-Mode. In simulation mode sign is +1 for Cmode and -1 for L-mode. C-Mode means that the phase angle of injected voltage by SSSC is leading to that of the line current, while L-Mode means that the phase angle of injected voltage by SSSC is lagging to that of the line current. Synchronized signal with 3-phase line current, control signal for dc capacitor voltage, and mode sign are combined together to generate the reference signal for inverter firing angle. There are 6 sets of controllers which supply gate signals for 3 sets of 6 H-bridge modules. C. Simulation Results The scenario considered in this simulation is as the following. SSSC is on standby state f o 0-50ms. The rm mechanical switch MS is ON state and the switches in multibridge inverter are OFF state. During 50ms-300ms the mode Sign is set by -1 and SSSC operates in L-Mode. During 300ms 550ms the mode Sign is set by + 1 and SSSC operates in

Fig. 6 shows a controller used for simulation of SSSC with multi-bridge PWM inverter. Since the multi-bridge inverter has a separate dc capacitor for each phase, separate control is needed for each phase.
I
I_

I1

Fig. 6. Simulation controller

0-7803-6420-1/00/$10.00 (c) 2000 IEEE

1621

+edoM-C

xa

am

. m

00 I

I..*,

(a) line current

I_

n o

.DD

4 -

, Ins,

(b) inverter voltage and line current

[.I

(c) source voltage, inverter voltage, and line current in L-Mode

in L-mode and increases in C-mode, compared with that in standby mode. Fig. 7b shows inverter injection voltage and line current during transition from L-Mode to C-Mode. The transition is completed within half cycle of power frequency. Fig. 7c show:; source voltage, inverter injection voltage, and line current h L-mode when SSSC operates in L-mode with inductive reactance of 0 . 8 2 ~ Fig. 7d shows source voltage, ~. inverter injection voltage, and line current in C-mode when SSSC operates in C-mode with inductive reactance of 0.5 lpu. Fig. 7e shows DC capacitor voltages, which are used as input for the controller. Fig. 7f shows variations of the active power Pr and the reactive power Q,at receiving end. Transmission line supplies ;active power P,of 0 . 9 3 and reactive power Q, ~~ of - 0 . 3 5 ~ ~ SSSC operates in standby mode. Active when power Pr decreases down to 0 . 6 4 ~ ~ reactive power Q, and decreases down to -0.2 1pu in L-mode respectively. Active power P decreases down to 1.28~11 reactive power Q, r and decreases down to - 0 . 5 5 ~ ~ in C-mode respectively.

V. CONCLUSION
This paper proposes an SSSC composed of multi-bridge inverter, which has 6 H-bridge modules per phase. Dynamic operation of the proposed SSSC is analyzed through computer simulations with EMTP. Proposed system has flexibility in optimizing the operation voltage required in power system by adding or subtracting number of bridges. It is directly inserted into the transmission line without coupling transformer. The contribution of this paper is to propose a new SSSC to be connectetd in the transmission line directly without transformer. The developed simulation model could be used to obtain design data for actual hardware system.

rm

IDD

tl (

.D .

cnrl

(d) source voltage, inverter voltage, and line current in C-Mode

$00

a m

1oD

REFERENCES
1-Y

(e) DC capacitor voltage

-10

LCa

rm

crrl

(f) active and reactive power in receiving end

Fig. 7. Simulation results Fig. 7 shows simulation results for dynamic performance analysis of proposed SSSC. Fig. 7a shows line current variation during simulation time. The line current decreases

[l] L. Gyugyi, Solid-state Control of Electric Power in AC Transmisslion System , Paper No. T-IP.4, International Symposium on Electric Energy Converter in Power System, Capri, Italy, 1989. [2] Laszlo Gyugyi, Colin D. Schauder, Kalyan K. San, Static Synchroncius Series Compensator : A Solid-state Approach to The Series Compensation of Transmission Lines, IEEE Trans. on ]PowerDelivery, Vol. 12, No. 1, January 1997. [3] Kalyan K. Sen, SSSC-Static Synchronous Series Compensator : Theory, Modeling, and Applications, IEEE Trans. on Power Delivery, 401 13, No.1, January 1998. [4] E Z. Peng and J. S.Lai, A Multilevel Voltage-Source Inverter with Separate DC Sources for Static Var Generation, IEEE/IAS Annual Meeting. pp. 2541-2548, Orlando, FL, Oct. 812, 1995. [5] F .Z. Peng and J. S.Lai, Dynamic performance and control of a static vir compensator using cascade multilevel inverter, IEEEAAS Annual Meeting. pp.1009-1015, San Diego, CA, Oct. 6-10. 1996. [6] B. Han, (2. Karady, J. Park, S Moon, Interaction Analysis . Model for Transmission Static Compensator with EMTP ,

0-7803-6420-1/00/$10.00 (c) 2000 IEEE

1622

IEEE Trans. on Power Delivery, Vol. 13, No. 4, October 1998. [7] B. Han, G. Ledwich, G. Karady, Study on Resonant Fly-back

rn. Converter for DC Distribution System, IEEE T a s on Power Delivery, Vol. 14, No. 3, October 1999.
.

B. Han received the B. S. degree in electrical engineering from the Seoul National University, Korea in 1976, and the M.S . and Ph.D. degree from Arizona State University in 1988 and 1992, respectively. He was with Westinghouse Electric Corporation as a senior research engineer in the Science & Technology Center. Currently he is an associate professor in the Department of Electrical Engineering at Myongji University, Korea. His research interests includethe high-power power electronicsand FACTS.
S . Moon received the B. S. degree in electrical engineering from Seoul National University, Korea in 1985, and the M. S. and Ph.D. degrees from Ohio State University in 1989 and 1993, respectively. Currently he is an assistant professor of Department of Electrical Engineering at Seoul National University, Korea. His research interests include analysis, control, and modeling of the power system, and FACTS.

J. P.yk received the B. S. degree from Seoul National University, Korea in 1973 and the M. S. and Ph.D. degrees from University of Tokyo, Japan in 1979 and 1982, respectively. He is a professor in the

Department of Electrical Engineering at Seoul National University, Korea. His present research interests are the analysis, control, and protection in FACTS and artificial intelligence application to the power system.
%_Fad2 received the B. S . and the Doctor of Engineering degrees in electrical engineering from Technical University of Budapest, Hungary in 1952 and 1960, respectively. Dr. Karady has been with

Arizona State University as a Chair Professor since 1986. Previously, he was with EBASCO Service where he served as a Chief Consulting Engineer and Manager of Electrical System Group. Dr. Karady was nominated as an IEEE Fellow in 1978. He is the author of more than 150 technical papers. He is the Chairman of the IEEE Subcommittee on Lightning and Insulators and Working Group on Non-Ceramic Insulators.

0-7803-6420-1/00/$10.00 (c) 2000 IEEE

1623