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16- bit PIC MCUs & dsPIC DSCs

dsPIC33FJ64MC802
Param e t e r Nam e Architecture CPU Speed (MIPS) Memo ry Type Pro gram Memo ry (KB) RAM Bytes Temperature Range C Operating Vo ltage Range (V) I/O Pins Pin Co unt System Management Features POR WDT Internal Oscillato r nano Watt Features Digital Co mmunicatio n Peripherals Co dec Interface Analo g Peripherals Op Amp Co mparato rs CAN (#, type) Capture/Co mpare/PWM Peripherals PWM Reso lutio n bits Mo to r Co ntro l PWM Channels Quadrature Enco der Interface (QEI) Timers Parallel Po rt Hardware RTCC DMA

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dsPIC33FJ32MC30 2/30 4, dsPIC33FJ6 4MCX0 2/X0 4 and dsPIC33FJ128 MCX0 2/X0 4 Data Sheet (0 8 /0 3/20 11) Value 16 -bit 40 Flash 64 16 ,38 4 -40 to 150 3 to 3.6 21 28 PBOR Yes Yes 7.37 MHz, 512 kHz Fast Wake/Fast Co ntro l 2-UART, 2-SPI, 1-I2C NO 1-A/D 6 x10 -bit @ 110 0 (ksps) NO 2 1 ECAN 4/4 16 8 2 5 x 16 -bit 2 x 32-bit PMP Yes 8 Fe at ure s Operating Range: . Up to 40 MIPS o peratio n (at 3.0 -3.6 V): - Industrial temperature range (-40 C to +8 5C) - Extended temperature range (-40 C to +125C) - Hight temperature range (-40 C to +150 C) High-Perfo rmance DSC CPU: . Mo dified Harvard architecture . C co mpiler o ptimized instructio n set . 16 -bit wide data path . 24-bit wide instructio ns . Linear pro gram memo ry addressing up to 4M instructio n wo rds . Linear data memo ry addressing up to 6 4 Kbytes . 8 3 base instructio ns: mo stly 1 wo rd/1 cycle . Two 40 -bit accumulato rs with ro unding and saturatio n o ptio ns . Flexible and po werful addressing mo des: - Indirect - Mo dulo - Bit-Reversed . So ftware stack . 16 x 16 fractio nal/integer multiply o peratio ns . 32/16 and 16 /16 divide o peratio ns . Single-cycle multiply and accumulate: - Accumulato r write back fo r DSP o peratio ns - Dual data fetch . Up to 16 -bit shifts fo r up to 40 -bit data On-Chip Flash and SRAM: . Flash pro gram memo ry . Data SRAM . Bo o t, Secure, and General Security fo r pro gram Flash Direct Memo ry Access (DMA): . 8 -channel hardware DMA . Up to 2 Kbytes dual po rted DMA buffer area (DMA RAM) to sto re data transferred via DMA : - Allo ws data transfer between RAM and a peripheral while CPU is executing co de (no cy cle stealing)
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. Mo st peripherals suppo rt DMA Timers/Capture/Co mpare/PWM: . Timer/Co unters, up to five 16 -bit timers: - Can pair up to make two 32-bit timers - One timer runs as a Real-Time Clo ck with an external 32.76 8 kHz o scillato r - Pro grammable prescaler . Input Capture (up to fo ur channels): - Capture o n up, do wn o r bo th edges - 16 -bit capture input functio ns - 4-deep FIFO o n each capture . Output Co mpare (up to fo ur channels): - Single o r Dual 16 -bit Co mpare mo de - 16 -bit Glitchless PWM mo de . Hardware Real-Time Clo ck/Calendar (RTCC): - Pro vides clo ck, calendar, and alarm functio ns Interrupt Co ntro ller: . 5-cycle latency . 118 interrupt vecto rs . Up to 53 available interrupt so urces . Up to three external interrupts . Seven pro grammable prio rity levels . Five pro cesso r exceptio ns Digital I/O: . Peripheral pin Select functio nality . Up to 35 pro grammable digital I/O pins . Wake-up/Interrupt-o n-Change fo r up to 21 pins . Output pins can drive fro m 3.0 V to 3.6 V . Up to 5V o utput with o pen drain co nfiguratio n . All digital input pins are 5V to lerant . 4 mA sink o n all I/O pins System Management: . Flexible clo ck o ptio ns: - External, crystal, reso nato r, internal RC - Fully integrated Phase-Lo cked Lo o p (PLL) - Extremely lo w jitter PLL . Po wer-up Timer . Oscillato r Start-up Timer/Stabilizer . Watchdo g Timer with its o wn RC o scillato r . Fail-Safe Clo ck Mo nito r . Reset by multiple so urces Po wer Management: . On-chip 2.5V vo ltage regulato r . Switch between clo ck so urces in real time . Idle, Sleep, and Do ze mo des with fast wake-up Analo g-to -Digital Co nverters (ADCs): . 10 -bit, 1.1 Msps o r 12-bit, 50 0 Ksps co nversio n: - Two and fo ur simultaneo us samples (10 -bit ADC) - Up to nine input channels with auto -scanning - Co nversio n start can be manual o r synchro nized with o ne o f fo ur trigger so urces - Co nversio n po ssible in Sleep mo de
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- 2 LSb max integral no nlinearity - 1 LSb max differential no nlinearity Co mparato r Mo dule: . Two analo g co mparato rs with pro grammable input/o utput co nfiguratio n CMOS Flash Techno lo gy: . Lo w-po wer, high-speed Flash techno lo gy . Fully static design . 3.3V (10 %) o perating vo ltage . Industrial and Extended temperature . Lo w po wer co nsumptio n Mo to r Co ntro l Peripherals: . 6 -channel 16 -bit Mo to r Co ntro l PWM: - Three duty cycle generato rs - Independent o r Co mplementary mo de - Pro grammable dead time and o utput po larity - Edge-aligned o r center-aligned - Manual o utput o verride co ntro l - One Fault input - Trigger fo r ADC co nversio ns - PWM frequency fo r 16 -bit reso lutio n (@ 40 MIPS) = 1220 Hz fo r Edge-Aligned mo de, 6 10 Hz fo r Center-Aligned mo de - PWM frequency fo r 11-bit reso lutio n (@ 40 MIPS) = 39 .1 kHz fo r Edge-Aligned mo de, 1 9 .55 kHz fo r Center-Aligned mo de . 2-channel 16 -bit Mo to r Co ntro l PWM: - One duty cycle generato r - Independent o r Co mplementary mo de - Pro grammable dead time and o utput po larity - Edge-aligned o r center-aligned - Manual o utput o verride co ntro l - One Fault input - Trigger fo r ADC co nversio ns - PWM frequency fo r 16 -bit reso lutio n (@ 40 MIPS) = 1220 Hz fo r Edge-Aligned mo de, 6 10 Hz fo r Center-Aligned mo de - PWM frequency fo r 11-bit reso lutio n (@ 40 MIPS) = 39 .1 kHz fo r Edge-Aligned mo de, 1 9 .55 kHz fo r Center-Aligned mo de . 2-Quadrature Enco der Interface mo dule: - Phase A, Phase B, and index pulse input - 16 -bit up/do wn po sitio n co unter - Co unt directio n status - Po sitio n Measurement (x2 and x4) mo de - Pro grammable digital no ise filters o n inputs - Alternate 16 -bit Timer/Co unter mo de - Interrupt o n po sitio n co unter ro llo ver/underflo w Co mmunicatio n Mo dules: . 4-wire SPI (up to two mo dules): - Framing suppo rts I/O interface to simple co decs - Suppo rts 8 -bit and 16 -bit data - Suppo rts all serial clo ck fo rmats and sampling mo des . I2C : - Full Multi-Master Slave mo de suppo rt
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- 7-bit and 10 -bit addressing - Bus co llisio n detectio n and arbitratio n - Integrated signal co nditio ning - Slave address masking . UART (up to two mo dules): - Interrupt o n address bit detect - Interrupt o n UART erro r - Wake-up o n Start bit fro m Sleep mo de - 4-character TX and RX FIFO buffers - LIN bus suppo rt - IrDA enco ding and deco ding in hardware - High-Speed Baud mo de - Hardware Flo w Co ntro l with CTS and RTS . Enhanced CAN (ECAN. mo dule) 2.0 B active: - Up to eight transmit and up to 32 receive buffers - 16 receive filters and three masks - Lo o pback, Listen Only and Listen All - Messages mo des fo r diagno stics and bus mo nito ring - Wake-up o n CAN message - Auto matic pro cessing o f Remo te Transmissio n Requests - FIFO mo de using DMA - DeviceNet. addressing suppo rt . Parallel Master Slave Po rt (PMP/EPSP): - Suppo rts 8 -bit o r 16 -bit data - Suppo rts 16 address lines . Pro grammable Cyclic Redundancy Check (CRC): - Pro grammable bit length fo r the CRC generato r po lyno mial (up to 16 -bit length) - 8 -deep, 16 -bit o r 16 -deep, 8 -bit FIFO fo r data input

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English Dat a She e t s

Last Updated: 0 8 /0 3/20 11 Last Updated: 0 3/21/20 11 Last Updated: 0 9 /26 /20 0 8 Last Updated: 10 /19 /20 10 Last Updated: 0 3/18 /20 10 Last Updated: 0 6 /27/20 11
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dsPIC33FJ32MC30 2/30 4, dsPIC33FJ6 4MCX0 2/X0 4 and dsPIC33FJ128 MCX0 2/X0 4 Data Sheet Errat a dsPIC33FJ32MC30 2/30 4, dsPIC33FJ6 4MCX0 2/X0 4, dsPIC33FJ128 MCX0 2/X0 4 Family Errata dsPIC33FJ32MC30 2/30 4,dsPIC33FJ6 4MCX0 2/X0 4,dsPIC33FJ128 MCX0 2/X0 4Rev.A1/A2/A3 Err Pro gram m ing Spe cif icat io ns dsPIC33F/PIC24H Flash Pro gramming Specificatio n Pro gramming Executive fo r dsPIC33F/PIC24H/PIC24F Applicat io n No t e s AN10 17 - Sinuso idal Co ntro l o f PMSM Mo to rs with dsPIC30 F / dsPIC33F/ dsPIC33E DSC

AN10 44 - Data Encryptio n Ro utines fo r PIC24, dsPIC and PIC32 Devices AN10 45 - File I/O Functio ns Using Micro chip's Memo ry Disk Drive File System Library AN10 6 6 - MiWi Wireless Netwo rking Pro to co l Stack AN10 6 9 - Using C30 Co mpiler and the SPI mo dule to Interface EEPROMs with dsPIC33F and PIC24F AN10 71 - IrDA Standard Stack fo r Micro chip 16 -Bit and 32-bit MCUs AN10 78 - Senso rless Field Oriented Co ntro l o f a PMSM AN10 79 - Using the C30 Co mpiler and the I2C? Peripheral to Interface Serial EEPROMs with dsPIC33F AN10 9 4 - Bo o tlo ader fo r dsPIC30 F/33F and PIC24F/24H Devices AN10 9 6 - Using the C30 Co mpiler to Interface SPI Serial EEPROMs with dsPIC33 AN110 0 - Using the C30 Co mpiler to Interface Serial EEPROMs with dsPIC33F AN110 6 - AN110 6 , Po wer Facto r Co rrectio n in Po wer Co nversio n Applicatio ns Using the dsPIC DSC AN1115 - Implementing Digital Lo ck-In Amplifiers Using the dsPIC DSC AN116 0 - Senso rless BLDC Co ntro l with Back-EMF Filtering Using a Majo rity Functio n AN116 2 - Senso rless Field Oriented Co ntro l (FOC) o f an AC Inductio n Mo to r (ACIM) AN120 4 - Micro chip MiWi P2P Wireless Pro to co l AN120 6 - Senso rless Field Oriented Co ntro l (FOC) o f an AC Inductio n Mo to r (ACIM) Using Field Weakening AN120 8 - Integrated Po wer Facto r Co rrectio n (PFC) and Senso rless Field Oriented Co ntro l (FOC) System AN1210 - Using External Memo ry with PIC24F/24H/dsPIC33F Devices AN1227 - Using a Keybo ard with the Micro chip Graphics Library AN1229 - Class B Safety So ftware Library fo r PIC MCUs and dsPIC DSCs AN1236 - Using C30 and a Timer to Interface dsPIC33 DSCs and PIC24 MCUs with UNI/O(R) Bus-Co mpatible Serial EEPROMs AN1249 - ECAN Operatio n with DMA o n dsPIC33F and PIC24H Devices AN129 2 - Senso rless Field Oriented Co ntro l (FOC) fo r a Permanent Magnet Synchro no us Mo to r (PMSM)Using a PLL Estimato r and Field Weakening (FW) AN129 9 - Single-Shunt Three-Phase Current Reco nstructio n Algo rithm fo r Senso rless FOC o f a PMSM AN130 7 - Stepper Mo to r Co ntro l with dsPIC DSCs AN6 9 9 - Anti-Aliasing, Analo g Filters fo r Data Acquisitio n Systems AN8 8 7 - AC Inductio n Mo to r Fundamentals AN9 0 1 - Using the dsPIC30 F fo r Senso rless BLDC Co ntro l AN9 0 8 - Using the dsPIC30 F / dsPIC33F fo r Vecto r Co ntro l o f an ACIM AN9 57 - Senso red BLDC Mo to r Co ntro l Using dsPIC30 F20 10 AN9 8 4 - An Intro ductio n to AC Inductio n Mo to r Co ntro l Using the dsPIC30 F / dsPIC33F DSC AN9 9 2 - Senso rless BLDC Mo to r Co ntro l Using dsPIC30 F20 10 33F Re f Manual Part 1 Sectio n 0 1. Intro ductio n - dsPIC33F FRM Sectio n 0 2. CPU - dsPIC33F FRM Sectio n 0 3. Data Memo ry - dsPIC33F/PIC24H FRM Sectio n 0 4. Pro gram Memo ry - dsPIC33F/PIC24H FRM

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Sectio n 0 5. Flash Pro gramming - dsPIC33F/PIC24H FRM Sectio n 0 6 . Interrupts - dsPIC33F/PIC24H FRM Sectio n 0 7. Oscillato r - dsPIC33F FRM Sectio n 0 8 . Reset - dsPIC33F FRM Sectio n 0 9 . Watchdo g Timer and Po wer-Saving Mo des - dsPIC33F/PIC24H FRM Sectio n 10 . I/O Po rts - dsPIC33F Sectio n 11. Timers - dsPIC33F/PIC24H FRM Sectio n 12. Input Capture - dsPIC33F FRM Sectio n 13. Output Co mpare - dsPIC33F FRM Sectio n 14. Mo to r Co ntro l PWM - dsPIC33F/PIC24H FRM Sectio n 15. Quadrature Enco der Interface (QEI) - dsPIC33F FRM Sectio n 16 . Analo g-to -Digital Co nverter (ADC) - dsPIC33F/PIC24H FRM Sectio n 17. UART - dsPIC33F/PIC24H FRM Sectio n 18 . Serial Peripheral Interface (SPI) - dsPIC33F/PIC24H FRM Sectio n 19 . Inter-Integrated Circuit (I2C) - dsPIC33F/PIC24H FRM Sectio n 20 . Data Co nverter Interface (DCI) - dsPIC33F FRM Sectio n 21. Enhanced Co ntro ller Area Netwo rk (ECAN) - dsPIC33F FRM Sectio n 22. Direct Memo ry Access (DMA) - dsPIC33F FRM Sectio n 23. Co deGuard Security - dsPIC33F FRM Sectio n 24. Pro gramming and Diagno stics - dsPIC33F/PIC24H FRM Sectio n 25. Device Co nfiguratio n - dsPIC33F/PIC24H FRM Sectio n 26 . Develo pment To o l Suppo rt - dsPIC33F FRM 33F Re f Manual Part 2 Sectio n 30 . I/O Po rts with Peripheral Pin Select (PPS) - dsPIC33F/PIC24H FRM 33F Re f Manual Part 3 Sectio n 31. Intro ductio n (Part III) - dsPIC33F FRM Sectio n 32. Interrupts (Part III) - dsPIC33F FRM Sectio n 33. Audio Digital-to -Analo g Co nverter (DAC) - dsPIC33F FRM Sectio n 34. Co mparato r - dsPIC33F FRM Sectio n 35. Parallel Master Po rt (PMP) - dsPIC33F/PIC24H FRM Sectio n 36 . Pro grammable Cyclic Redundancy Check (CRC) - dsPIC33F FRM Sectio n 37. Real-Time Clo ck and Calendar (RTCC) - dsPIC33F FRM Sectio n 38 . Direct Memo ry Access (DMA) (Part III) - dsPIC33F FRM Sectio n 39 . Oscillato r (Part III) - dsPIC33F FRM aspxApplicat io nMae st ro dsPICDEM MCHV Develo pment System Users Guide dsPICDEM MCSM Develo pment Bo ard Users Guide Bro chure s

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dsPIC Digital Signal Co ntro llers Bro chure Mo to r Co ntro l Bro chure So ftware So lutio ns and To o ls fo r the 16 -bit and 32-bit Designer So lutio ns fo r Medical Applicatio ns Co de Exam ple s CE10 0 - Using A/D Co nverters and DSP Library fo r Signal Filtering CE10 1 - Co nfiguring 10 -bit A/D Co nverters fo r 1MSPS Co nversio n Rate CE10 2 - Perfo rming A/D Co nversio ns in SLEEP (Lo w-Po wer) Mo de CE10 3 - Implementing DOZE Mo de fo r Dynamic CPU Po wer Co ntro l CE10 4 - Dynamic Clo ck Switching fo r Lo w Po wer Operatio n CE10 5 - Address Erro r Traps fo r Easy Debugging CE10 6 - Math Erro r Traps fo r Ro bust Operatio n CE10 7 - Stack Erro r Traps fo r Easy Debugging CE10 8 - Oscillato r Failure Traps and Failsafe Clo ck Mo nito ring CE10 9 - Run-Time Self Pro gramming o f FLASH Pro gram Memo ry CE110 - Dynamic Tuning o f Internal Fast RC CE111 - External Interrupt Pins Co nfiguratio n and Use CE112 - Fast Wake-up Fro m Sleep Mo de CE113 - Timer1 used in Real-Time Clo ck Applicatio ns CE114 - Using the DMA with the UART in Lo o pback mo de CE115 - Example o f Handling a DMA Trap CE116 - Using the DMA with the SPI mo dule CE117 - Using the DMA with DCI peripheral fo r I2S driver CE118 - Using FIR Filters Fro m dsPIC Filter Design and DSP Library CE119 Interfacing to I2C Serial EEPROM using I2C peripheral CE120 A/D Co nversio ns with Scanning thro ugh selected Analo g Inputs with DMA CE121 A/D Co nversio ns with Scanning thro ugh selected Analo g Inputs witho ut DMA CE122 - ADC Alternate Sampling CE123 - Co deGuard(TM) Security: segment creatio n and co de placement CE124 - Co deGuard(TM) Security: Pro gram flo w changes between segments CE127 - Cro sswire Co mmunicatio n between ECAN 1 and ECAN 2 mo dules CE129 - ECAN Remo te Transmissio n Request CE135 - SPI Demo CE136 - SPI witho ut DMA CE137 - UART witho ut DMA CE138 - SPI with two slaves CE139 - 10 -bit ADC Sampling at 2.2MSPS CE140 - Inverse tangent o peratio n using CORDIC iterative appro ximatio n CE141 - SPI with Framed mo de

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CE142 - Open Drain co nfiguratio n CE143 - Using Timer1 fo r Perio d Interrupts CE145 - Using I2C mo dule as a Slave device CE146 - Adaptive No tch Filter CE147 - Signal Matching using Co herence Functio n Cro ss Spectral Density CE148 - ADC Sampling with DMA and FIR Filtering - Apps include Circuit Breakers CE149 - Signal generatio n, fractio nal sampling rate, interpo latio n, decimatio n CE150 - JPEG Entro py Co ding CE151 - CRC Generatio n CE152 - Parallel Master Po rt (PMP) Example CE153 - RTCC CE154 - ADC to DAC Lo o pback CE155 - Real-Time Data Mo nito ring (RTDM) Example dsPIC33F Co de Exam ple s CE125 - Co deGuard(TM) Security: Secure Segment Erase CE128 - ECAN FIFO Receive Example CE144 - Co deGuard Applicatio n Example Pin Maps dsPIC33FJ128 GP8 0 4 and PIC24HJ128 GP50 4 PIM Info rmatio n Sheet fo r Graphics Apps dsPIC33FJ128 MC8 0 4 PIM Info rmatio n Sheet Pro duct Se le ct io n To o ls 16 -bit Embedded Co ntro l So lutio ns Bro chure Pro duct Line Do cum e nt s dsPIC DSC Pro duct Map Quick St art Guide s In-Circuit Debugging Interface Optio ns with dsPIC DSC Re f e re nce Manual 16 -bit MCU and DSC Pro grammer's Reference Manual Se ll She e t s HI-TECH C Co mpilers by Micro chip Techno lo gy MPLAB X IDE Pro duct Overview So f t ware dsPICDEM MCSM Develo pment Bo ard Demo nstratio n So ftware So f t ware Librarie s dsPIC DSC Aco ustic Echo Cancellatio n Library dsPIC DSC Asymmetric Key Embedded Encryptio n Library dsPIC DSC DSP Algo rithm Library dsPIC DSC DTMF Generatio n/Detectio n Libraries

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dsPIC DSC Equalizer Library dsPIC DSC Line Echo Cancellatio n Library dsPIC DSC No ise Suppressio n Library dsPIC DSC Speex Speech Enco ding/Deco ding Library dsPIC DSC Symmetric Key Embedded Encryptio n LIbrary dsPIC FSK Generatio n Library dsPIC G.726 A Speech Enco ding/Deco ding Library dsPIC/PIC24 G.711 Speech Enco ding/Deco ding Library dsPIC30 F Speech Reco gnitio n Library TCP/IP Stack fo r PIC18 , PIC24, dsPIC & PIC32 We binars Hardware Co nditio ning o f Senso r Signals

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Part Num be r Le ads Package Type DSPIC33FJ6 4MC8 0 2-E/MM 28 QFN DSPIC33FJ6 4MC8 0 2-E/SO 28 SOIC 30 0 mil DSPIC33FJ6 4MC8 0 2-E/SP DSPIC33FJ6 4MC8 0 2-H/MM DSPIC33FJ6 4MC8 0 2-H/SO DSPIC33FJ6 4MC8 0 2-I/MM DSPIC33FJ6 4MC8 0 2-I/SO DSPIC33FJ6 4MC8 0 2-I/SP DSPIC33FJ6 4MC8 0 2TE/MM DSPIC33FJ6 4MC8 0 2TE/SO DSPIC33FJ6 4MC8 0 2TH/MM DSPIC33FJ6 4MC8 0 2TH/SO DSPIC33FJ6 4MC8 0 2T-I/MM DSPIC33FJ6 4MC8 0 2T-I/SO 28 28 28 28 28 28 28 28 28 28 28 28 SPDIP QFN SOIC 30 0 mil QFN SOIC 30 0 mil SPDIP QFN SOIC 30 0 mil QFN SOIC 30 0 mil QFN SOIC 30 0 mil

Te m p Range -40 C to +125C -40 C to +125C -40 C to +125C -40 C to >+125C -40 C to >+125C -40 C to +8 5C -40 C to +8 5C -40 C to +8 5C -40 C to +125C -40 C to +125C -40 C to >+125C -40 C to >+125C -40 C to +8 5C -40 C to +8 5C

Packing TUBE TUBE TUBE TUBE TUBE TUBE TUBE TUBE T/R T/R T/R T/R T/R T/R

1-25 5.42 5.30 5.49 6 .48 6 .36 4.9 3 4.8 2 5.0 1 5.15 4.9 4 ** ** 4.9 8 4.8 7

26 -9 9 4.9 6 4.8 6 5.0 4 5.9 4 5.8 3 4.52 4.42 4.59 5.0 3 4.8 2 ** ** 4.57 4.46

10 0 + 4.50 4.40 4.56 5.38 5.28 4.10 4.0 0 4.16 4.9 0 4.70 ** ** 4.14 4.0 4

10 0 0 -4 9 9 9 4.14 * 4.0 5 * 4.20 * 4.9 5 * 4.8 6 * 3.77 * 3.6 8 * 3.8 3 * 4.51 * 4.33 * ** ** 3.8 1 * 3.72 *

5000+ 3.9 3 * 3.8 5 * 3.9 9 * 4.70 * 4.6 2 * 3.58 * 3.50 * 3.6 4 * 4.30 * 4.12 * ** ** 3.6 2 * 3.54 *

* m icro chipDIRECT "bus ine s s " a cco unt a nd a ppro ve d quo t e re quire d. O pe n a m icro chipDIRECT a cco unt t o da y! ** De vice no t a va ila ble t o purcha s e o nline . P le a s e co nt a ct a s a le s o f f ice f o r pricing inf o rm a t io n. Ba ck To To p

Development Tools

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Se le ct PKG:

28 ML

DEMO/EVAL BOARDS EMULAT ORS/IN-CIRCUIT DEBUGGERS PROGRAMMERS DESIGN T OOLS Pro duct Nam e PICDEM Z MRF24J40 2.4 GHz Daughter Card PICtail Daughter Bo ard fo r SD & MMC Cards Ethernet PICtail Plus Daughter Bo ard IrDA PICtail Plus Daughter Bo ard Speech Playback PICtail Plus Daughter Bo ard Graphics PICtail Plus Daughter Bo ard with 3.2 Display Kit Graphics LCD Co ntro ller PICtail Plus SSD19 26 Bo ard MOTOR CONTROL INTERFACE PICTAIL PLUS D-CARD AUDIO PICTAIL PLUS DAUGHTER BOARD ECAN/LIN PICtail Plus Daughter Bo ard CAN/LIN PICtail (Plus) Daughter Bo ard Co nsumer-band BPSK 7.2kbps PLM PICtail Plus Daughter Bo ard PIC24H CVD Capacitive To uch Eval Bo ard PICDEM MC LV Develo pment Bo ard dsPICDEM MC1 Mo to r Co ntro l Develo pment Bo ard MPLAB Starter Kit fo r dsPIC DSC Micro stick fo r dsPIC33F and PIC24H Mo to r Co ntro l Starter Kit with mTo uch Sensing dsPICDEM MCLV Develo pment Bo ard dsPICDEM MCSM Develo pment Bo ard dsPICDEM MCHV Develo pment System PICkit 2 Debug Express Part Num be r AC16 30 27-4 AC16 4122 AC16 4123 AC16 4124 AC16 4125 AC16 4127-3 AC16 4127-5 AC16 4128 AC16 4129 AC16 4130 AC16 4130 -2 AC16 4142 AC2430 26 DM18 30 21 DM30 0 0 20 DM330 0 11 DM330 0 13 DM330 0 15 DM330 0 21 DM330 0 22 DM330 0 23 DV16 4121
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RoHS Inf ormat ion

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To see a co mplete listing o f Ro HS data fo r this device, please click here. Micro chip Te chno lo gy Inc Full Part Num be r Le ad Co unt Package Type Package Widt h So lde r Co m po sit io n J EDEC Indicat o r Ro HS China EUIP
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DSPIC33FJ6 4MC8 0 2-H/MM DSPIC33FJ6 4MC8 0 2T-H/MM DSPIC33FJ6 4MC8 0 2-I/MM DSPIC33FJ6 4MC8 0 2T-I/MM DSPIC33FJ6 4MC8 0 2T-E/MM DSPIC33FJ6 4MC8 0 2-E/MM DSPIC33FJ6 4MC8 0 2-E/SP DSPIC33FJ6 4MC8 0 2-I/SP DSPIC33FJ6 4MC8 0 2-H/SO DSPIC33FJ6 4MC8 0 2T-H/SO DSPIC33FJ6 4MC8 0 2-I/SO DSPIC33FJ6 4MC8 0 2T-I/SO DSPIC33FJ6 4MC8 0 2-E/SO DSPIC33FJ6 4MC8 0 2T-E/SO

28 28 28 28 28 28 28 28 28 28 28 28 28 28

QFN-S QFN-S QFN-S QFN-S QFN-S QFN-S SPDIP SPDIP SOIC SOIC SOIC SOIC SOIC SOIC

6 x6 x0 .9 mm 6 x6 x0 .9 mm 6 x6 x0 .9 mm 6 x6 x0 .9 mm 6 x6 x0 .9 mm 6 x6 x0 .9 mm .30 0 in. .30 0 in. .30 0 in. .30 0 in. .30 0 in. .30 0 in. .30 0 in. .30 0 in.

Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn Matte Sn

e3 e3 e3 e3 e3 e3 e3 e3 e3 e3 e3 e3 e3 e3
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20 0 9 Mic ro c hip Te c hno lo g y Inc .

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