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Introduction to

Linear Circuit Analysis


and Modelling
From DC to RF
Solutions Manual
Luis Moura
Izzat Darwazeh
Contents
1 Elementary electrical circuit analysis 3
2 Complex numbers: An introduction 35
3 Frequency domain electrical signal and circuit analysis 37
4 Natural and forced responses circuit analysis 60
5 Electrical two-port network analysis 78
6 Basic electronic amplier building blocks 119
7 RF circuit analysis techniques 141
8 Noise in electronic circuits 175
2
Chapter 1
Elementary electrical circuit analysis
Solution of problem 1.1
The current owing through the capacitor is given by:
i(t) = C
d v(t)
dt
= 10
6
2 1000 cos(2 100 t +/4) A
= 6.3 cos(2 100 t +/4) mA
Figure 1.1 shows the waveforms for the voltage across and the current through the capacitor.
i(t)
(V)
v(t)
(mA)
5
10
5 10
15 20
t (ms)
10
5
5
10
0
0
5
10
Voltage
Current
Figure 1.1: Waveforms for the voltage across and the current through the capacitor.
1. Elementary electrical circuit analysis 4
Solution of problem 1.2
The voltage across the terminals of the inductor is given by:
v(t) = L
d i(t)
dt
= 3 10
3
2 5000 20 10
3
sin(2 5000 t) V
= 1.9 sin(2 5000 t) V
Figure 1.2 shows the waveforms for the voltage across and the current through the inductor.
i(t)
(mA)
t (ms)
10
0
0
1
2
v(t)
(V)
0.5
20
10
20
1
2
Voltage
Current
Figure 1.2: Waveforms for the voltage across and the current through the inductor.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 5
Solution of problem 1.3
The calculations of the voltages across and the currents through each circuit elements are effected
applying the Nodal analysis. This method can be outlined as follows:
1. First, we indicate the voltages at each node. These voltages indicate the potential difference
between the node being considered and a reference node which can be chosen arbitrarily. This
node is traditionally called node zero (0) or the ground terminal and is often chosen as the
node with the highest number of attached electrical elements. This is illustrated in gure 1.3 a)

+ +
V
A
V
B
R
1

+ +
V
A V
B
(V
A
)
(V
B
)
0

+
+ +

(V
A
)
(V
B
)
V
A
V
B
0
a)
0
d)
c)
b)
V
A
(V
B
)
R
1
I
R1
I
R1
=
V
A
V
B
R
1
R
1
V
R1
= V
A
V
B
V
A
V
B
V
R1
= V
A
V
B
V
R1
= V
A
+ (V
B
)
Figure 1.3: Application of the Nodal analysis method. a) Indication of the voltage is the nodes A
and B b) Indication of the current I
R
1
c) I
R
1
= (V
A
V
B
)/R. d) Adding vectors.
2. Then, we consider, in an arbitrary manner, the current direction in each branch, as indicated
in gure 1.3 b).
3. The current that ows through each resistance can be expressed, according to Ohms law, as
the ratio of the voltage across that resistance and the resistance value;
I
R
1
=
V
A
V
B
R
1
(1.1)
Note that the similarity between the way we express the voltage across the resistance, as
V
A
V
B
, and the calculation of the sum (or subtraction) of vectors shown in gure 1.3 d).
4. Finally, we apply the current voltage law to each node
1
We apply now the Nodal analysis method to solve the circuits of the problem 1.3 where the voltages
at each node and the directions of the currents have been chosen as indicated in gure 1.4.
1
As its name suggests the Nodal analysis method is based on the application of the current voltage law to each node of
the circuit. However, the calculation of some circuits may require the application of the voltage law.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 6
+

R
1
V
1
R
3
R
2
0
I
R3
I
R1
I
R2
V
A
V
B
+

+
R
1
R
2
R
3
V
1
V
2
R
4
V
A
V
B V
C
V
D
0
I
R1
I
R2
I
R3
I
R4
R
1
I
1
I
2
V
A
0
I
R1
+

V
1
+

V
2
R
2
V
A
V
B
V
C I
R2
0
R
1
I
R1
+

R
2
V
1
R
4
R
1
R
3
V
A
V
B
V
C
0
I
R1
I
R2
I
R3
I
R4
+
R
2
R
4
V
1
R
3
0
V
A
V
B
V
C
R
1
I
R1
I
R3
I
R2
I
R4
I
1
f)
e)
d)
a)
c)
b)
Figure 1.4: Circuits of problem 1.3.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 7
Circuit a): Applying the current law we can write:
I
R
1
= I
1
+I
2
= 0.7 A
The voltage across R
1
is V
A
which is obtained applying Ohms law:
V
A
= I
R
1
R
1
= 70 V
Circuit b): For this circuit we can write the following set of eqns:
_

_
I
R
1
= I
R
2
V
A
V
C
= V
1
V
B
= V
2
(1.2)
which can be rewritten as follows:
_

_
V
B
V
A
R
1
=
V
C
R
2
V
A
V
C
= V
1
V
B
= V
2
(1.3)
Solving this set of eqns in order to obtain V
A
, V
B
and V
C
we can write:
V
A
=
R
2
V
2
+R
1
V
1
R
1
+R
2
= 2.63 V
V
B
= V
2
= 3 V
V
C
= R
2
V
2
V
1
R
1
+R
2
= 0.63 V
The current I
R
1
is equal to I
R
2
= 3.7 mA.
Circuit c): For this circuit we can write
_

_
I
R
1
=
V
A
R
1
V
A
= V
1
I
R
2
= I
R
3
(1.4)
that is,
_

_
I
R
1
=
V
1
R
1
V
1
V
B
R
2
=
V
B
R
3
(1.5)
Solving to obtain V
B
we get
V
B
= V
1
R
3
R
2
+R
3
= 1.1 V
The voltage across R
2
is V
A
V
B
= 0.9 V. The currents through the resistances are:
I
R
1
= 4 mA
I
R
2
= I
R
3
= 7.5 mA
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 8
Circuit d): For this circuit we write the following set of eqns:
_

_
I
R
1
+I
R
2
+I
R
3
= 0
I
R
4
= I
R
3
V
B
V
A
= V
1
V
B
V
C
= V
2
(1.6)
This set of eqns can be written as:
_

_
V
A
R
1
+
V
B
R
2
+
V
D
R
3
= 0
V
C
V
D
R
4
=
V
D
R
3
V
B
V
A
= V
1
V
B
V
C
= V
2
(1.7)
Solving to obtain V
A
, V
B
, V
C
and V
D
we get:
V
A
= R
1
R
2
V
2
V
1
(R
2
+R
3
+R
4
)
R
2
(R
1
+R
3
+R
4
) +R
1
(R
3
+R
4
)
= 29.3 mV
V
B
= R
2
R
1
V
2
+V
1
(R
3
+R
4
)
R
2
(R
1
+R
3
+R
4
) +R
1
(R
3
+R
4
)
= 1.97 V
V
C
=
V
1
R
2
(R
3
+R
4
) V
2
(R
2
R
3
+R
2
R
4
+R
1
+R
3
+R
1
R
4
)
R
2
(R
1
R
3
+R
4
) +R
1
(R
3
+R
4
)
= 1.03 V
V
D
= R
3
(R
1
+R
2
)V
2
R
2
V
1
R
2
(R
1
+R
3
+R
4
) +R
1
(R
3
+R
4
)
= 0.46 V
Circuit e): For this circuit we write
_
_
_
I
R
4
= I
R
1
+I
R
3
I
R
2
= I
R
3
V
A
= V
1
(1.8)
or
_

_
V
C
R
4
=
V
1
V
C
R
1
+
V
B
V
C
R
3
V
1
V
B
R
2
=
V
B
V
C
R
3
(1.9)
Solving to obtain V
B
and V
C
:
V
B
= V
1
R
1
R
3
+R
4
(R
1
+R
2
+R
3
)
R
1
(R
2
+R
3
+R
4
) +R
4
(R
2
+R
3
)
= 1.8 V
V
C
= V
1
R
4
(R
1
+R
2
+R
3
)
R
1
(R
2
+R
3
+R
4
) +R
4
(R
2
+R
3
)
= 1.33 V
Circuit f): For this circuit we write the following set of eqns:
_
_
_
I
1
= I
R
1
+I
R
3
I
1
= I
R
2
+I
R
4
V
1
= V
A
V
C
(1.10)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 9
that is
_

_
I
1
=
V
B
V
A
R
1
+
V
B
V
C
R
3
I
1
=
V
A
R
2
+
V
C
R
4
V
1
= V
A
V
C
(1.11)
Solving to obtain V
A
, V
B
and V
C
we get
V
A
= R
2
V
1
+R
4
I
1
R
2
+R
4
= 8.75 V
V
B
= V
1
R
2
R
3
R
1
R
4
(R
2
+R
4
)(R
1
+R
3
)
+I
1
_
R
1
R
3
R
1
+R
3
+
R
2
R
4
R
2
+R
4
_
= 14.46 V
V
C
= R
4
R
2
I
1
V
1
R
2
+R
4
= 6.75 V
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 10
Solution of problem 1.4
We consider N resistances connected in series and driven by a DC voltage source V as shown in
gure 1.5. For this circuit we can write:
+

V
+ + +
V
R2
V
RN
R
2
R
N R
1
V
R1
I
Figure 1.5: N resistances connected in series.
V = V
R
1
+V
R
2
+. . . +V
R
N
= I (R
1
+R
2
+. . . +R
N
)
= I R
eq
that is
R
eq
= R
1
+R
2
+. . . +R
N
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 11
Solution of problem 1.5
We consider N resistances connected in parallel and driven by a DC voltage source V as shown in
gure 1.6. For this circuit we can write:
+

V
I
I
R2
I
R1
R
1
(G
1
)
R
2
(G
N
) (G
2
)
R
N
I
RN
Figure 1.6: N resistances connected in parallel.
I = I
R
1
+I
R
2
+. . . +I
R
N
= V (G
1
+G
2
+. . . +G
N
)
= V G
eq
that is
G
eq
= G
1
+G
2
+. . . +G
N
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 12
Solution of problem 1.6
Circuit a): The equivalent resistance between points A and B is given by the parallel combi-
nation of the three resistance, that is:
R
eq
= (R
1
[[R
2
)[[R
3
Let R
1,2
be the resistance resulting from the parallel combination of R
1
and R
2
;
R
1,2
=
R
1
R
2
R
1
+R
2
= 22.2
R
eq
can be calculated as follows:
R
eq
=
R
1,2
R
3
R
1,2
+R
3
= 16.2
The equivalent conductance is G
eq
= R
1
eq
= 61.7 mS.
Circuit b): Since the three resistances are connected in series we can write
R
eq
= R
1
+R
2
+R
3
= 210
The equivalent conductance is G
eq
= R
1
eq
= 4.8 mS
Circuit c): The resistance R
1
is connected in series with R
2
;
R
1,2
= R
1
+R
2
= 400
R
1,2
is connected in parallel with R
3
:
R
1,2,3
=
R
1,2
R
3
R
1,2
+R
3
= 114.3
R
1,2,3
is connected in series with R
4
, that is
R
eq
= R
1,2,3
+R
4
= 384.3
The equivalent conductance is G
eq
= R
1
eq
= 2.6 mS.
Circuit d): The resistance R
1
is connected in series with R
2
and R
3
is connected in series with
R
4
;
R
1,2
= R
1
+R
2
= 150
R
3,4
= R
3
+R
4
= 150
The equivalent resistance results from the parallel combination of R
1,2
with R
5
and with R
3,4
R
eq
= R
1,2
[[R
5
[[R
3,4
= 42.9
The equivalent conductance is G
eq
= R
1
eq
= 23.3 mS.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 13
+

R
3
R
5
R
2
R
4
0
I
R2
I
R5
I
R4
I
R3
V
Z
V
Y
I
R1
R
1
I
t
V
t
V
X
A
B
Figure 1.7: Circuit of problem 2 e).
Circuit e) For this circuit we cannot identify any combination of resistances which share the
same voltage across their terminals or share the same current. This means that there are no
parallel nor series connections. In order to determine the equivalent resistance we have to
apply a test voltage source V
t
to the circuit between points A and B as shown in gure 1.7.
This source supplies a current I
t
to the circuit. By evaluating V
t
/I
t
we calculate the equivalent
resistance:
R
eq
=
V
t
I
t
(1.12)
We apply the Nodal analysis method to evaluate V
t
/I
t
. For the circuit of gure 1.7 we can
write
_

_
I
t
= I
R
1
+I
R
4
I
t
= I
R
5
+I
R
3
I
R
1
= I
R
5
+I
R
2
V
X
= V
t
(1.13)
that is,
_

_
I
t
=
V
t
V
Y
R
1
+
V
t
V
Z
R
4
I
t
=
V
Y
R
5
+
V
Z
R
3
V
t
V
Y
R
1
=
V
Y
R
5
+
V
Y
V
Z
R
2
(1.14)
Solving in order to obtain V
t
we obtain:
V
t
= I
t
R
5
R
3
(R
1
+R
2
+R
4
) +R
1
R
4
(R
2
+R
3
+R
5
) +R
2
(R
4
R
5
+R
1
R
3
)
R
2
(R
1
+R
3
+R
4
+R
5
) + (R
3
+R
5
)(R
1
+R
4
)
If we divide both terms of last eqn by I
t
we obtain the desired equivalent resistance;
V
t
I
t
=
R
5
R
3
(R
1
+R
2
+R
4
) +R
1
R
4
(R
2
+R
3
+R
5
) +R
2
(R
4
R
5
+R
1
R
3
)
R
2
(R
1
+R
3
+R
4
+R
5
) + (R
3
+R
5
)(R
1
+R
4
)
= 83.5
The equivalent conductance is G
eq
= R
1
eq
= 12.0 mS.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 14
Solution of problem 1.7
We consider N capacitances connected in series and driven by a voltage source v(t) as shown in
gure 1.8. For this circuit we can write:
+

+ + +
v(t)
i(t)

v
C1
(t) v
C2
(t) v
CN
(t)
C
1
C
2
C
N
Figure 1.8: N capacitances connected in series.
v(t) = v
C
1
(t) +v
C
2
(t) +. . . +v
C
N
(t)
=
_
1
C
1
+
1
C
2
+. . . +
1
C
N
__
t
0
i(t)dt
=
1
C
eq
_
t
0
i(t)dt
that is
1
C
eq
=
1
C
1
+
1
C
2
+. . . +
1
C
N
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 15
Solution of problem 1.8
We consider N capacitances connected in parallel and driven by a voltage source v(t) as shown in
gure 1.9. For this circuit we can write:
+

i(t)
v(t)
i
CN
(t) i
C2
(t) i
C1
(t)
C
1
C
2
C
N
Figure 1.9: N capacitances connected in parallel.
i(t) = i
C
1
(t) +i
C
2
(t) +. . . +i
C
N
(t)
= (C
1
+C
2
+. . . +C
N
)
d v(t)
dt
= C
eq
d v(t)
dt
that is
C
eq
= C
1
+C
2
+. . . +C
N
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 16
Solution of problem 1.9
Circuit a): All capacitors are connected in series:
1
C
eq
=
1
C
1
+
1
C
2
+
1
C
3
Solving, we obtain:
C
eq
= 0.67 F
Circuit b): Now, all capacitors are connected in parallel:
C
eq
= C
1
+C
2
+C
3
= 11 F
Circuit c): C
1
is connected in parallel with C
2
. The capacitance resulting from this combina-
tion is connected in series with C
3
;
C
eq
=
(C
1
+C
2
)C
3
(C
1
+C
2
) +C
3
= 3 F
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 17
Solution of problem 1.10
We consider N inductances connected in series and driven by a voltage source v(t) as shown in
gure 1.10. For this circuit we can write:
+

+ + +
v(t)
i(t) L
1
L
2
L
N

v
L1
(t)
v
L2
(t) v
LN
(t)
Figure 1.10: N inductances connected in series.
v(t) = v
L
1
(t) +v
L
2
(t) +. . . +v
L
N
(t)
= (L
1
+L
2
+. . . +L
N
)
d i(t)
dt
= L
eq
d i(t)
dt
that is
L
eq
= L
1
+L
2
+. . . +L
N
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 18
Solution of problem 1.11
We consider N inductances connected in parallel and driven by a voltage source v(t) as shown in
gure 1.11. For this circuit we can write:
+

i
L1
(t)
L
1
i(t)
v(t)
i
LN
(t) i
L2
(t)
L
2 L
N
Figure 1.11: N inductances connected in parallel.
i(t) = i
L
1
(t) +i
L
2
(t) +. . . +i
L
N
(t)
=
_
1
L
1
+
1
L
2
+. . . +
1
L
N
__
t
0
v(t) dt
=
1
L
eq
_
t
0
v(t) dt
that is
1
L
eq
=
1
L
1
+
1
L
2
+. . . +
1
L
N
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 19
Solution of problem 1.12
Circuit a): The inductance L
2
is connected in series with L
3
and L
5
is connected in parallel
with L
6
. Hence, we can write:
L
2,3
= L
2
+L
3
= 11 mH
L
5,6
=
L
5
L
6
L
5
+L
6
= 5.74 mH
The circuit of gure 1.12 a) can be simplied as shown in gure 1.12 b). From the circuit of
A
L
1
L
2,3
B
L
4,5,6
A
L
1
L
2,3
L
5,6
L
4
B
A
L
1
L
2,3,4,5,6
B
A
L
1
L
4
L
5
L
6
1 mH 7 mH
6 mH
4 mH
12 mH
11 mH
L
2
L
3
a)
b)
c)
d)
Figure 1.12: Circuits of problem 1.12 a)
gure 1.12 b) we can observe that L
4
is connected in series with L
5,6
;
L
4,5,6
= L
4
+L
5,6
= 11.74 mH
From gure 1.12 c) we see that L
4,5,6
is connected in parallel with L
2,3
;
L
2,3,4,5,6
=
L
4,5,6
L
2,3
L
4,5,6
+L
2,3
= 5.68 mH
From gure 1.12 d) we see that the equivalent inductance is given by the series combination
of L
1
with L
2,3,4,5,6
, that is:
L
eq
= L
1
+L
2,3,4,5,6
= 6.68 mH
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 20
Circuit b): L
2
is connected in parallel with L
3
. The resulting inductance is connected in series
with L
1
and L
4
;
L
eq
= L
1
+
L
2
L
3
L
2
+L
3
+L
4
= 25.26 mH
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 21
Solution of problem 1.13
Circuit a): Using the expression for the resistive current divider we can obtain the current
through R
o
as follows:
I
o
= 0.1
R
1
[[R
2
R
o
+ (R
1
[[R
2
)
= 23.4 mA
and the voltage across R
o
is 1.4 Volt.
Circuit b): Using the expression for the resistive voltage divider we can obtain the voltage
across R
o
as follows:
V
o
= 3
R
o
R
o
+R
1
+R
2
= 0.4 V
and the current through R
o
is 10 mA.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 22
Solution of problem 1.14
We use the Nodal Analysis method to analyse the circuits of gure 1.13.
Circuit a): For this circuit we observe that the voltage across R
1
is the voltage supplied by V
s
,
that is, 5 V. Hence we have:
I
R
1
=
V
s
R
1
= 73.5 mA
Note that the current that ows through the short-circuit is I
sc
= I
R
1
+I
s
= 273.5 mA.
Circuit b): For the circuit of gure 1.13 b) we can write the following set of eqns:
_
_
_
I
s
= I
R
1
+I
R
3
+I
R
5
I
s
= I
R
2
+I
R
4
+I
R
5
I
R
1
= I
R
2
(1.15)
that is
_

_
I
s
=
V
A
V
B
R
1
+
V
A
V
C
R
3
+
V
A
R
5
I
s
=
V
B
R
2
+
V
C
R
4
+
V
A
R
5
V
A
V
B
R
1
=
V
B
R
2
(1.16)
Solving in order to obtain V
A
, V
B
and V
C
we get:
V
A
= I
s
R
5
(R
3
+R
4
)(R
2
+R
1
)
R
5
(R
1
+R
2
+R
3
+R
4
) + (R
4
+R
3
)(R
1
+R
2
)
= 30 V
V
B
= I
s
R
5
R
2
(R
3
+R
4
)
R
5
(R
1
+R
2
+R
3
+R
4
) + (R
4
+R
3
)(R
1
+R
2
)
= 14 V
V
C
= I
s
R
5
R
4
(R
2
+R
1
)
R
5
(R
1
+R
2
+R
3
+R
4
) + (R
4
+R
3
)(R
1
+R
2
)
= 18 V
V
R
1
is equal to (V
A
V
B
) = 16 V and I
R
1
= 200 mA.
Circuit c): For this circuit we can write:
_

_
V
C
V
D
= V
s
I
3
+I
2
+I
4
+I
6
= I
s
I
1
+I
s
= I
5
I
5
= I
4
+I
6
(1.17)
that is
_

_
V
C
V
D
= V
s
V
D
R
3
+
V
C
R
2
+
V
B
R
4
+
V
B
R
6
= I
s
V
C
V
A
R
1
+I
s
=
V
A
V
B
R
5
V
A
V
B
R
5
=
V
B
R
4
+
V
B
R
6
(1.18)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 23
+

0.2 A
c)
R
1
R
2
R
3
R
4
R
4
R
1
R
3
R
5
R
6
R
2
V
A
a)
b)
V
B
V
B
V
C
V
C
V
D 0
0
V
s
V
s
I
s
R
1
I
R
1
I
s
R
5
I
R
1
I
R
2
I
R
3
I
R
4
I
R
5
I
R
2
I
R
4
I
sc
I
R
5
V
A
I
R
1
I
R
3
0
I
R
6
Figure 1.13: Circuits of problem 1.14.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 24
Since R
4
is connected in parallel with R
6
the last set of eqns can be written as
_

_
V
C
V
D
= V
s
V
D
R
3
+
V
C
R
2
+
V
B
R
4,6
= I
s
V
C
V
A
R
1
+I
s
=
V
A
V
B
R
5
V
A
V
B
R
5
=
V
B
R
4,6
(1.19)
where R
4,6
= R
4
[[R
6
= 21.7 . Solving in order to obtain V
A
, V
B
, V
C
and V
D
we get
V
A
=
R
4
(R
4,6
+R
5
)[I
s
(R
3
R
1
+R
2
R
1
+R
3
R
2
) +R
2
V
s
]
(R
3
R
4
+R
2
R
4
)(R
4,6
+R
5
+R
1
) +R
3
R
2
(R
4,6
+R
4
)
= 6.95 V
V
B
=
R
4
R
4,6
[I
s
(R
3
R
1
+R
2
R
1
+R
3
R
2
) +R
2
V
s
]
(R
3
R
4
+R
2
R
4
)(R
4,6
+R
5
+R
1
) +R
3
R
2
(R
4,6
+R
4
)
= 2.71 V
V
C
=
R
2
[V
s
R
4
(R
4,6
+R
5
+R
1
) +I
s
R
3
(R
4
R
4,6
+R
4
R
5
R
1
R
4,6
)]
(R
3
R
4
+R
2
R
4
)(R
4,6
+R
5
+R
1
) +R
3
R
2
(R
4,6
+R
4
)
= 7.33 V
V
D
=
R
3
I
s
R
2
[R
4
(R
4,6
+R
5
) R
1
R
4,6
]
(R
3
R
4
+R
2
R
4
)(R
4,6
+R
5
+R
1
) +R
3
R
2
(R
4,6
+R
4
)

R
3
V
s
[R
4
(R
4,6
+R
5
+R
1
) +R
2
(R
4,6
+R
4
)]
(R
3
R
4
+R
2
R
4
)(R
4,6
+R
5
+R
1
) +R
3
R
2
(R
4,6
+R
4
)
= 2.67 V
V
R
1
is equal to V
C
V
A
= 0.37 V and I
R
1
= 24.8 mA.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 25
Solution of problem 1.15
Th evenin equivalent circuits between points A and B (see gure 1.14).
+

V
Th
R
Th
A
B
Figure 1.14: Th evenin equivalent circuit between points A and B.
Circuit b): The Th evenin voltage, V
Th
, is the voltage between points A and B obtained in the
previous problem:
V
Th
= V
A
= 30 V
The Th evenin resistance, R
Th
is determined by calculating the equivalent resistance between
the points A and B (after substituting the current source by an open-circuit). Figure 1.15
shows the equivalent circuit for the calculation of R
Th
. From this gure we can write:
A
R
1
R
2
R
3
R
4
R
5
B
R
Th
Figure 1.15: Equivalent circuit for the calculation of R
Th
.
R
Th
= (R
1
+R
2
)[[(R
3
+R
4
)[[R
5
= 42.9
Circuit c): The Th evenin voltage, V
Th
, is the voltage between points A and B obtained in the
previous problem:
V
Th
= V
A
V
B
= 4.24 V
The Th evenin resistance, R
Th
is determined by calculating the equivalent resistance between
the points A and B (after substituting the current source by an open-circuit and the voltage
source by a short-circuit). Figure 1.16 shows the equivalent circuit for the calculation of R
Th
.
From this gure we can write:
R
Th
= R
5
[[[(R2[[R
3
) + (R
4
[[R
6
) +R
1
]
= 19.4
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 26
R
5
R
2
A
B
R
Th
R
4
R
6
R
1
R
3
Figure 1.16: Equivalent circuit for the calculation of R
Th
.
Solution of problem 1.16
Norton equivalent circuits between points A and B (see gure 1.17).
I
Nt
R
Nt
A
B
Figure 1.17: Norton equivalent circuit.
Circuit b): The Norton current can be determined as follows:
I
Nt
=
V
Th
R
Th
= 699.3 mA
and the Norton resistance is equal to R
Nt
= R
Th
= 42.9 .
Circuit c): The Norton current can be determined as follows:
I
Nt
=
V
Th
R
Th
= 219.1 mA
and R
Nt
= R
Th
= 19.4 .
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 27
Solution of problem 1.17
We use the Nodal analysis method to solve the circuits of gure 1.18.
Circuit a): For this circuit we can write the following set of equations:
_

_
I
s
+I +I
R
2
= 0
I
R
2
= A
i
I
I =
V
A
R
1
I
R
3
= A
i
I
(1.20)
that is
_

_
I
s
+I +
V
B
V
A
R
2
= 0
V
B
V
A
R
2
= A
i
I
I =
V
A
R
1
V
C
R
3
= A
i
I
(1.21)
Solving in order to obtain V
A
, V
B
and V
C
we get:
V
A
=
R
1
I
s
1 +A
i
= 1.73 V
V
B
=
I
s
(R
1
A
i
R
2
)
1 +A
i
= 8.65 V
V
C
=
I
s
A
i
R
3
1 +A
i
= 16.15 V
The voltage across R
3
is V
C
. Thus, I
R
3
= 230.7 mA.
Circuit b): We observe that V = V
B
. Hence we can write:
_

_
V
C
R
3
= G
m
V
V = V
s
R
2
R
2
+R
1
(1.22)
that is,
V
C
= R
3
G
m
V
s
R
2
R
2
+R
1
= 32.1 V
The voltage across R
3
is V
C
. Thus, I
R
3
= 321 mA.
Circuit c): For this circuit we can write
_

_
I
R
1
= I
R
2
+I
R
4
V
B
V
C
= A
v
V
B
I
R
1
= I
R
2
+I
R
3
(1.23)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 28
+

R
2 A
i
I
I
R
1
a)
I
s
0
V
A V
B
V
C
R
3
I
R
2
I
R
3
I
R
3
I
R
1
I
R
2
I
R
4
I
R
3
I
R
3
I
R
1
+
+

+
R
3
R
1 A
v
V

V
c)
R
2
R
4
0
V
B
V
C
+

R
2
R
3
G
m
V
V
b)
R
1
V
s
V
0
V
B V
C

+
R
2 R
3
+
I
R
m
I

R
1
0
d)
V
B
V
A
V
C
V
D
V
s
V
s
V
s
V
s
I
s
V
D
Figure 1.18: Circuits of problem 1.17.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 29
that is
_

_
V
s
V
B
R
1
=
V
B
R
2
+
V
D
R
4
V
B
V
C
= A
v
V
B
V
s
V
B
R
1
=
V
B
R
2
+
V
C
V
D
R
3
(1.24)
Solving to obtain V
B
, V
C
and V
D
we have:
V
B
=
V
s
R
2
(R
3
+R
4
)
R
3
(R
2
+R
1
) +R
1
R
2
(1 A
v
) +R
4
(R
1
+R
2
)
= 0.56 V
V
C
=
V
s
R
2
(R
3
+R
4
)(A
v
1)
R
3
(R
2
+R
1
) +R
1
R
2
(1 A
v
) +R
4
(R
1
+R
2
)
= 5.08 V
V
D
=
R
4
V
s
R
2
(A
v
1)
R
3
(R
2
+R
1
) +R
1
R
2
(1 A
v
) +R
4
(R
1
+R
2
)
= 4.32 V
The voltage across R
3
is (V
C
V
D
) = 0.76 V and I
R
3
= 76 mA.
Circuit d): For this circuit we write:
_

_
V
B
V
C
= R
m
V
B
R
2
V
D
= V
s
V
A
R
1
+
V
C
V
D
R
3
=
V
B
R
2
V
A
R
1
= I
s
(1.25)
Solving to obtain V
A
, V
B
, V
C
and V
D
we get:
V
A
= I
s
R
1
= 23.4 V
V
B
=
R
2
(I
s
R
3
V
s
)
R
2
+R
m
+R
3
= 4.6 V
V
C
=
(I
s
R
3
V
s
)(R
2
+R
m
)
R
2
+R
m
+R
3
= 14.8 V
V
D
= V
s
= 10 V
The voltage across R
3
is V
C
V
D
= 4.8 V and I
R
3
= 66.7 mA.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 30
Solution of problem 1.18
We apply the Superposition theorem to the circuits of gure 1.19 to nd the current owing through
R
2
(I
R
2
).
+
+
+

R1
R2
R3
R4 R5
a)
Gm V
+
V
R1
R2
R3
R4
R5
b)
Vs1
Vs2
Is
Is
Vs
Figure 1.19: Circuits of problem 1.18.
1. Circuit a)
V
s1
: Figure 1.20 shows the equivalent circuit for the calculation of the contribution from
V
s1
to the current I
R
2
. The current source I
s
has been replaced by an open-circuit and
the voltage source V
s2
has been replaced by a short-circuit. From this circuit we can
write:
I
R
2
=
V
s1
R
1
+R
2
= 40.5 mA
I
s
: Figure 1.21 shows the equivalent circuit for the calculation of the contribution from
I
s
to the current I
R
2
. Both voltage sources were replaced by short-circuits. From this
gure we observe that R
1
and R
2
form a resistive current divider. Hence we have:
I
R
2
=
R
1
R
1
+R
2
I
s
= 64.9 mA
V
s2
: Figure 1.22 shows the equivalent circuit for the calculation of the contribution from
V
s2
to the current I
R
2
. The current source I
s
was replaced by an open-circuit and the
voltage source V
s1
was replaced by a short-circuit. We observe that there is no closed
electrical path between R
2
and V
s2
. Hence the contribution fromV
s2
to the current I
R
2
is
zero.The current that ows through R
2
(sum of all contributions) is I
R
2
= 40.5+64.9 =
105.4 mA.
2. Circuit b)
V
s1
: Figure 1.23 shows the equivalent circuit for the calculation of the contribution from
V
s
to the current I
R
2
. The current source I
s
was replaced by an open-circuit. For this
circuit we can write:
_

_
I
R
1
= I
R
2
I
R
2
+G
m
V = I
R
4
I
R
4
= I
R
5
V = V
C
V
D
(1.26)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 31
+

R
1
R
2
V
s1
I
R2
Figure 1.20: Equivalent circuit for the calculation of the contribution from V
s1
to the current I
R
2
.
R
2
R
3
R
4 R
5
I
s
R
1
Figure 1.21: Equivalent circuit for the calculation of the contribution from I
s
to the current I
R
2
.
that is
_

_
V
s
V
B
R
1
=
V
B
V
C
R
2
V
B
V
C
R
2
+G
m
(V
C
V
D
) =
V
C
V
D
R
4
V
C
V
D
R
4
=
V
D
R
5
(1.27)
Solving, we obtain:
V
B
= V
s
R
5
+R
4
G
m
R
2
R
4
+R
2
G
m
R
2
R
4
R
2
R
5
R
4
+R
1
G
m
R
4
R
1
= 1.79 V
V
C
= V
s
R
5
+R
4
G
m
R
2
R
4
R
2
R
5
R
4
+R
1
G
m
R
4
R
1
(1.28)
= 0.08 V
V
D
= V
s
R
5
G
m
R
2
R
4
R
2
R
5
R
4
+R
1
G
m
R
4
R
1
= 0.03 V
and
I
R
2
=
V
B
V
C
R
2
= 20.8 mA
I
s
: Figure 1.24 shows the equivalent circuit for the calculation of the contribution from
I
s
to the current I
R
2
. The voltage source V
s
was replaced by a short-circuit. For this
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 32
+
R
2
R
5
R
1
I
R2
R
4
V
s2
Figure 1.22: Equivalent circuit for the calculation of the contribution from V
s2
to the current I
R
2
.
+

G
m
V
+
V
R
1
R
2
R
5
V
B
V
C
V
D
I
R5
I
R4
I
R2
I
R1
R
4
0
V
s
Figure 1.23: Equivalent circuit for the calculation of the contribution from V
s
to the current I
R
2
.
circuit we write:
_

_
I
s
= I
R
3
I
s
= I
R
1
+I
R
2
I
R
2
+G
m
V = I
R
4
V = (V
C
V
D
)
I
R
4
= I
R
5
+I
s
(1.29)
that is
_

_
I
s
=
V
A
V
B
R
3
I
s
=
V
B
R
1
+
V
B
V
C
R
2
V
B
V
C
R
2
+G
m
(V
C
V
D
) =
V
C
V
D
R
4
V
C
V
D
R
4
=
V
D
R
5
+I
s
(1.30)
Solving in order to obtain V
A
, V
B
, V
C
and V
D
we get:
V
A
= I
s
(G
m
R
4
1)(R
3
R
2
+R
3
R
1
+R
1
R
2
)
G
m
R
2
R
4
R
2
R
5
R
4
+R
1
G
m
R
4
R
1
I
s
R
3
(R
5
+R
4
) +R
1
R
4
(1 +G
m
R
5
)
G
m
R
2
R
4
R
2
R
5
R
4
+R
1
G
m
R
4
R
1
= 1.3 V
V
B
= I
s
R
1
R
5
G
m
R
4
+R
4
G
m
R
2
R
4
+R
2
G
m
R
2
R
4
R
2
R
5
R
4
+R
1
G
m
R
4
R
1
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 33
G
m
V
+
V
R
3
R
1
R
2
I
s
0
V
A
V
B
V
C
V
D
I
R5
R
5
R
4
I
R4
I
R3
I
R2
I
R1
Figure 1.24: Equivalent circuit for the calculation of the contribution from I
s
to I
R
2
.
= 0.3 V
V
C
= I
s
R
2
R
5
+R
2
R
5
G
m
R
4
+R
5
G
m
R
4
R
1
+R
4
R
1
G
m
R
2
R
4
R
2
R
5
R
4
+R
1
G
m
R
4
R
1
= 5.96 V
V
D
= I
s
R
5
R
2
+G
m
R
2
R
4
+R
1
G
m
R
4
R
4
G
m
R
2
R
4
R
2
R
5
R
4
+R
1
G
m
R
4
R
1
= 5.81 V
and the current owing through R
2
is:
I
R
2
=
V
B
V
C
R
2
= 69.6 mA
The total current (the sum of all the contributions) is 90.4 mA.
3. Circuit c)
V
s
: Figure 1.25 a) shows the equivalent circuit for the calculation of the contribution
from V
s
to V
R
2
. From this gure we observe that the voltage across R
2
is:
V
R
2
= A
v
V
C
+V
s
= (1 A
v
) V
s
= 90 V
Note that V
C
= V
s
. I
R
2
= 0.45A.
I
r
: Figure 1.25 b) shows the equivalent circuit for the calculation of the contribution
from I
r
to V
R
2
. Note that V
C
is zero. Hence, the voltage-controlled voltage source is
now effectively a short-circuit and the voltage-controlled current source is now an open-
circuit. From this gure we observe that the voltage across R
2
is zero.
The overall voltage across R
2
is 90 V and the overall current through R
2
is 0.45 A.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
1. Elementary electrical circuit analysis 34
+

V
C
R
1
+
V
s
G
m
V
C
A
v
V
C
+

a)
b)
+

R
2
V
R2
+

V
R2
I
r
+

V
C
= 0
R
2
I
R2
Figure 1.25: a) Equivalent circuit for the calculation of the contribution fromV
s
to V
R
2
b) Equivalent
circuit for the calculation of the contribution from I
r
to V
R
2
.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
Chapter 2
Complex numbers: An introduction
Solution of problem 2.1
Axis
Real
Axis
Imaginary
2
4
4

3
2.5
z
1
z
2
z
3
z
4
Figure 2.1: Representation of the complex numbers of problem 1.
Solution of problem 2.2
1. 2
2. j 2
3. 11.25 +j 2.5
4. 0.3562 +j 0.3836
5. (1.25, 0.9)
6. (2.2, 5.1)
7. (4, 15.5)
8. (1.1746, 0.4483)
Solution of problem 2.3
2. Complex numbers: An introduction 36
1. z = 3/2 +j

127/2 or z = 3/2 j

127/2
2. z = 1/4 +

21/4 or z = 1/4

21/4
3. z = 1/4 +j 1/4

39 or z = 1/4 j 1/4

39
4. z = 3
5. z =

7/4 +j

65/4 or z =

7/4 j

65/4
Solution of problem 2.4
1. 1.414 0.785 (rad)
2. 1.732 2.186 (rad)
3. 2.022 0.149 (rad)
4. 3.162 2.562 (rad)
Solution of problem 2.5
1. 0.5
2. 0.75 j 1.3
3. j 0.5
4. j 0.5
Solution of problem 2.6
1. 2
2. 8
3. 13.753 +j 9.992
4. 0.072 +j 0.222
5. 4.511 +j 8.142
6. 0.45 j 0.279
Solution of problem 2.7
1. z = 1 or z = 1
2. z =

2/2(1 +j) or z =

2/2(1 j)
3. z = 2
1/6
exp(j/12) or
z = 2
1/6
exp(j9/12) or
z = 2
1/6
exp(j17/12)
4. z = (5/2)
1/5
exp(j3/20) or
z = (5/2)
1/5
exp(j5/20) or
z = (5/2)
1/5
exp(j13/20) or
z = (5/2)
1/5
exp(j21/20) or
z = (5/2)
1/5
exp(j29/20).
Introduction to linear circuit analysis and modelling Moura and Darwazeh
Chapter 3
Frequency domain electrical signal
and circuit analysis
Solution of problem 3.1
The effective value for each voltage waveform v
i
(t) can be determined as follows:
V
eff
i
=

1
T
_
t
o
+T
t
o
v
2
i
(t) dt (3.1)
where t
o
can be chosen to facilitate the calculation of the integral in the last eqn.
a) Using eqn 3.1 with t
o
= T/2 we can write:
V
eff
1
=

1
T
_
T/2
T/2
v
2
1
(t) dt
The integral of the last eqn can be determined as follows:
1
T
_
T/2
T/2
v
2
1
(t) dt =
V
2
A
T
_
T/4
T/4
cos
2
( t) dt (with = 2/T)
=
V
2
A
2 T
_
T/4
T/4
[1 + cos(2 t)] dt
=
V
2
A
2 T
_
t
_
T/4
T/4
+
V
2
A
4 T
_
sin(2 t)
_
T/4
T/4
=
V
2
A
4
Hence, V
eff
1
= V
A
/2.
b) Using eqn 3.1 with t
o
= 0 we can write:
V
eff
2
=

1
T
_
T
0
v
2
2
(t) dt
The integral of the last eqn can be determined as follows:
1
T
_
T
0
v
2
2
(t) dt =
V
2
B
T
3
_
T
0
t
2
dt
=
V
2
B
T
3
_
t
3
3
_
T
0
=
V
2
B
3
Hence, V
eff
2
= V
B
/

3.
3. Frequency domain electrical signal and circuit analysis 38
c) Using eqn 3.1 with t
o
= T/2 we can write:
V
eff
3
=

1
T
_
T/2
T/2
v
2
3
(t) dt
The integral of the last eqn can be determined as follows:
1
T
_
T/2
T/2
v
2
3
(t) dt =
V
2
C
T
_
T/4
T/4
sin
2
(4 t) dt (with = 2/T)
=
V
2
C
2 T
_
T/4
T/4
[1 + cos(8 t)] dt
=
V
2
C
2 T
_
t
_
T/4
T/4
+
V
2
C
2 T 8
_
sin(8 t)
_
T/4
T/4
=
V
2
C
4
Hence, V
eff
3
= V
C
/2.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 39
Solution of problem 3.2
Assuming that the AC voltage across Z
L
is:
v
a
(t) = V
a
cos( t +
v
)
and that the AC current through Z
L
is:
i
a
(t) = I
a
cos( t +
i
)
we can obtain the average power dissipated by Z
L
as follows:
P
AV
=
1
T
_
T
0
v
a
(t) i
a
(t) dt
=
V
a
I
a
2 T
_
T
0
cos(
v

i
) dt +
V
a
I
a
2 T
_
T
0
cos(2 t +
v
+
i
) dt
=
V
a
I
a
2
cos(
v

i
)
=
V
a
I
a
2
Real
_
e
j
v
e
j
i

=
1
2
Real[V
A
I

A
]
with
V
A
= V
a
e
j
v
I
A
= I
a
e
j
i
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 40
Solution of problem 3.3
We solve the circuits of this problem using the Nodal analysis method together with phasor analysis.
+

V
Z
C
Z
L
R
I
Figure 3.1: Circuit (a) of problem 3.3.
Circuit a): The impedances associated with the capacitor, Z
C
and the inductor, Z
L
, are:
Z
C
=
1
j C

=30 krad/s
= j 37.04
Z
L
= j L

=30 krad/s
= j 90.0
The (static) phasor associated with the voltage source is V = 10 exp(j /4) V. Since R is
connected in series with C and with L we can determine the current I as follows:
I =
V
Z
L
+Z
C
+R
=
10 e
j /4
j 90 j37.04 + 100
= 88.4 e
j 0.30
mA
The voltage across the resistance, V
R
, can be obtained from:
V
R
= RI
= 8.84 e
j 0.30
V
The voltage across the capacitance, V
C
, can be obtained from:
V
C
= Z
C
I
= 3.27e
j 0.30j /2
V
= 3.27e
j 1.27
V
The voltage across the inductance, V
L
, is:
V
L
= Z
L
I
= 7.95e
j 0.30+j /2
V
= 7.95e
j 1.87
V
Note that, as expected, the voltage and the current through the resistance are in phase, that
is, the phase difference between the voltage and the current is zero. On the other hand, the
voltage across the capacitor lags the current by /2 while the voltage across the inductor leads
the current by /2.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 41
+

Z
C
Z
L
R
2
V
R
1
V
A
V
B
V
C
b)
V
R
1
Z
CLR2
V
B
I
ZL
I
R1
I
ZC
V
A
= V
0
0
a)
Figure 3.2: a) Circuit (b) of gure 3.1. b) Equivalent circuit
Circuit b): The impedances associated with the capacitance and inductance are:
Z
C
=
1
j C

=30 krad/s
= j166.7
Z
L
= j L

=30 krad/s
= j 300.0
From gure 3.2 a) we observe that the series combination of R
2
with Z
L
is connected in
parallel with Z
C
. Hence, we can obtain an equivalent impedance, which represent these com-
binations, as follows:
Z
CLR
2
= Z
C
[[(Z
L
+R
2
)
= 77.3 j 201.0 (3.2)
Fromgure 3.2 b) we recognise that R
1
and Z
CLR
2
forman impedance voltage divider. Hence
we can write:
V
B
= V
Z
CLR
2
Z
CLR
2
+R
1
= 1.97 e
j 0.23
V
From gure 3.2 a) we also note that Z
L
and R
2
form an impedance voltage divider which
allows us to relate V
C
and V
B
as follows:
V
C
= V
B
R
2
Z
L
+R
2
= 1.39 e
j 1.02
V
Now, the current in each element can be obtained:
I
R
1
=
V V
B
R
1
= 9.1 e
j 0.97
mA
I
Z
C
=
V
B
Z
C
= 11.8 e
j 1.34
mA
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 42
I
Z
L
=
V
B
V
C
Z
L
= 4.6 e
j 1.02
mA
I
R
2
= I
Z
L
Circuit c): The impedances associated with the capacitance and inductance are:
+
+
V
I R
3
V
I
R
1
R
2
Z
L
Z
C
b)
a)
0
0
Z
CR2
R
3
V
A
V
B
V
C
V
C
V
D
V
A
I
LR1
Z
LR1
I
CR2
I
R3
Figure 3.3: a) Circuit (c) of gure 3.1. b) Equivalent circuit
Z
C
=
1
j C

=30 krad/s
= j47.6
Z
L
= j L

=30 krad/s
= j 150
Since R
1
is in series with Z
L
and R
2
is in series with Z
C
we can obtain the equivalent circuit
of gure 3.3 b) with
Z
LR
1
= Z
L
+R
1
= 250 +j 150
Z
CR
2
= Z
C
+R
2
= 200 j47.6
For this circuit we can write the following set of eqns:
_
_
_
I
LR
1
+I
R
3
= I
V
A
V
C
= V
(3.3)
that is:
_

_
V
A
Z
LR
1
+
V
C
R
3
= I
V
A
V
C
= V
(3.4)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 43
Solving in order to obtain V
A
and V
C
we get:
V
A
= Z
LR
1
V +I R
3
R
3
+Z
LR
1
= 27.38 e
j 1.26
V
V
C
= R
3
I Z
LR
1
V
R
3
+Z
LR
1
= 19.05 e
j 1.50
V
Hence, the current that ows through C and R
2
is given by:
I
CR
2
=
V
A
V
C
Z
CR
2
= 48.6 e
j 1.02
mA (3.5)
and the current that ows through L and R
1
is given by:
I
LR
1
=
V
A
Z
LR
1
= 93.9 e
j 0.72
mA (3.6)
The current that ows through R
3
is given by:
I
R
3
=
V
C
R
3
= 68.0 e
j 1.50
mA (3.7)
The voltages across R
2
and C are given by:
V
R
2
= I
CR
2
R
2
= 9.73 e
j 1.02
V
V
Z
C
= I
CR
2
Z
C
= 2.32 e
j 0.55
V
The voltages across R
1
and L are given by:
V
R
1
= I
LR
1
R
1
= 23.48 e
j 0.72
V
V
Z
L
= I
LR
1
Z
L
= 14.09 e
j 2.29
V
Circuit d): The impedances associated with the capacitance and inductance are:
Z
C
=
1
j C

=30 krad/s
= j 33.3
Z
L
= j L

=30 krad/s
= j 180
Since R
1
is in parallel with Z
C
and R
2
is in series with Z
L
we can obtain the equivalent circuit
of gure 3.4 b) with
Z
CR
1
=
Z
C
R
1
Z
C
+R
1
= 0.85 j 33.31
Z
LR
2
= Z
L
+R
2
= 800 +j180
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 44
+

V
1
+
V
Z
C
R
1
Z
L
R
2
G
m
V
1
(A)
G
m
V
1
(A)
+

V
1
V
B
V
A
= V = V
1
Z
CR1
V
Z
LR2
a)
b)
0
I
LR2
Figure 3.4: a) Circuit (d) of gure 3.1. b) Equivalent circuit
For this circuit we can write the following:
I
LR
2
+G
m
V
1
= 0
Since V
1
= V we can write the last eqn as:
V
B
Z
LR
2
G
m
V = 0
that is
V
B
= Z
LR
2
G
m
V
= 820.0 e
j 1.01
V
The currents that ow through C, I
Z
C
, and through R
1
, I
R
1
, are given by
I
Z
C
=
V
Z
C
= 0.3 e
j 2.36
A
I
R
1
=
V
R
1
= 7.7 e
j 0.79
mA
The current that ows through the series combination of L with R
2
is
I
LR
2
= 1.0 e
j 0.79
A
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 45
Solution of problem 3.4
In order to have maximum power transfer at f = 35 kHz Z
L
must be equal to Z

S
at this frequency.
Z
S
is the impedance of the series combination of the 120 resistor and the capacitor (see gure
+

Z
L
Z
L
V
v(t)
b)
a)
0.6 F
120
Z
S
Figure 3.5: a) Circuit of problem 3.4 b) Equivalent circuit.
3.5):
Z
S
= R +
1
j 2 f C

f=35 kHz
= 120 j 7.58
Hence Z
L
should be made equal to Z

S
= 120 + j 7.58 . A circuit which realises this impedance
Z
L
= Z

S
at f = 35 kHz is the series combination of a 120 resistance with an inductance L such
that;
j 2 f L

f=35 kHz
= j 7.58
that is L = 34.46 H.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 46
Solution of problem 3.5
a): The average value C
0
is determined as follows:
C
0
=
1
T
_
T/2
T/2
v
1
(t) dt
=
1
T
_
T/4
T/4
V
A
cos( t) dt ( = 2/T)
=
V
A
T
T
2
_
sin
_
2
T
t
__
T/4
T/4
=
V
A

The coefcients C
n
([n[ > 0) are determined as
C
n
=
1
T
_
T/2
T/2
v
1
(t) e
j 2
n
T
t
dt
=
V
A
T
_
T/2
T/2
cos
_
2
1
T
t
_
e
j 2
n
T
t
dt
=
V
A
2 T
_
T/4
T/4
e
j 2
1n
T
t
dt +
V
A
2 T
_
T/4
T/4
e
j 2
1+n
T
t
dt
=
V
A
2 T
T
j 2 (1 n)
_
e
j 2
1n
T
t
_
T/4
T/4
+
V
A
2 T
T
j 2 (1 +n)
_
e
j 2
1+n
T
t
_
T/4
T/4
=
V
A
2
_
sin
_
(1 n)

1 n
+
sin
_
(1 +n)

1 +n
_
=
V
A
4
sinc
_
1 n
2
_
+
V
A
4
sinc
_
1 +n
2
_
Figure 3.6 shows the spectrum of v
1
(t).
b): The average value C
0
is determined as follows:
C
0
=
1
T
_
T
0
v
2
(t) dt
=
1
T
_
T
0
V
B
t
T
dt
=
V
B
2
(3.8)
The coefcients C
n
([n[ > 0) are determined from
C
n
=
1
T
_
T
0
v
2
(t) e
j 2
n
T
t
dt
=
1
T
_
T
0
V
B
t
T
e
j 2
n
T
t
dt
=
V
B
T
2
_
e
j 2
n
T
t
_
j 2
n
T
_
2
_
1 +j 2
n
T
t
_
_
T
0
=
V
B
(2n)
2
_
e
j 2 n
. .
1
(1 +j 2 n) 1
_
=
j V
B
2n
(3.9)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 47
2 4 6 4 6 2
6 2 4 6 4 2

1
f/T
|C
n
| (V)
C
n
(rad)
f/T
a)
b)
Figure 3.6: Spectrum of v
1
(t) a) Magnitude. b) Phase.
Figure 3.7 shows the spectrum of v
2
(t).
c): The average value C
0
is zero. The coefcients C
n
([n[ > 0) are determined from
C
n
=
1
T
_
T
0
v
3
(t) e
j 2
n
T
t
dt
=
1
T
_
T/4
T/4
V
C
cos(4 t) dt ( = 2/T)
=
V
C
4
sinc
_
4 n
2
_
+
V
A
4
sinc
_
4 +n
2
_
Figure 3.8 shows the spectrum of v
3
(t). Note that the spectrum contains no DC component.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 48
2 4 6 4 6 2

1
|C
n
| (V)
C
n
(rad)
f/T
a)
b)
6
4 2
2 4 6
f/T
Figure 3.7: Spectrum of v
2
(t) a) Magnitude. b) Phase.
Solution of problem 3.6
Using phasor analysis we determine the output voltage V
R
as follows:
V
R
= V
S
R
Z
C
+R
(3.10)
where Z
C
is the impedance associated with the capacitor:
Z
C
=
1
j 2 f C
Eqn 3.10 can be written as:
V
R
= V
S
j 2 f RC
1 +j 2 f RC
(3.11)
we dene
H(f) =
V
R
V
S
giving
=
j 2 f RC
1 +j 2 f RC
(3.12)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 49
2 4 6 4 6 2
6 2 4 6 4 2

1
f/T
|C
n
| (V)
C
n
(rad)
f/T
a)
b)
Figure 3.8: Spectrum of v
3
(t) a) Magnitude. b) Phase.
Solution of problem 3.7
a): Using the result of the last problem (see eqn 3.11 with V
O
= V
R
) and by applying the
Superposition theorem, that is, substituting the phasor V
S
in eqn 3.11 by the phasors C
n
given
by eqn 3.8 and 3.9, we obtain the phasors representing the output voltage, V
O
n
, as follows:
V
O
n
=
_

_
0 , n = 0
V
B
RC
T
_
1 +j 2
n
T
RC
_
, n ,= 0
(3.13)
and the output voltage, v
o
(t) can be written as :
v
o
(t) =

n=1
[2 V
O
n
[ cos
_
2
n
T
t +V
O
n
_
=

n=1
5.6
_
1 + (2.8 n)
2
cos
_
2
n
T
t + tan
1
(2.8 n)
_
V
(3.14)
b): Using phasor analysis we determine the output voltage V
O
as follows:
V
O
= V
S
Z
L
Z
L
+R
(3.15)
where Z
L
is the impedance associated with the inductance:
Z
L
= j 2 f L
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 50
Eqn 3.15 can be written as:
V
O
= V
S
j 2 f L/R
1 +j 2 f L/R
(3.16)
Using again the Superposition theorem, that is, substituting the phasor V
S
in eqn 3.16 by the
phasors C
n
given by eqn 3.8 and 3.9, we obtain the phasors V
O
n
as follows:
V
O
n
=
_

_
0 , n = 0
V
B
L/R
T
_
1 +j 2
n
T
L/R
_
, n ,= 0
(3.17)
and the output voltage, v
o
(t) can be written as :
v
o
(t) =

n=1
[2 V
O
n
[ cos
_
2
n
T
t +V
O
n
_
=

n=1
5.6
_
1 + (2.8 n)
2
cos
_
2
n
T
t + tan
1
(2.8 n)
_
V
(3.18)
Comparing eqn 3.14 with eqn 3.18 we observe that these are identical. This means that both
circuits produce the same output when driven by the same input signal, regardless of fre-
quency. Both circuits are high-pass lters.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 51
Solution of problem 3.8
We apply phasor analysis together with the Nodal analysis method to the circuits of gure 3.9.
+

+
a)
I
S
V
O
R
Z
C
Z
L

0
c)
V
S
I
O
Z
L
Z
C
R
0
V
S
V
A
+

b)
V
S V
O
Z
L
Z
C
R
1
R
2
0
V
A
V
O
V
S
V
O
Figure 3.9: Circuits of problem 3.8.
Circuit a): For this circuit we observe that the output voltage is applied to the parallel com-
bination of Z
C
, Z
L
and R. This parallel combination can be represented by an equivalent
impedance Z
eq
given by:
Z
eq
= Z
C
[[Z
L
[[R
=
j 2 f LR
R(1 (2 f)
2
LC +j 2 fL
(3.19)
Since V
O
= I
S
Z
eq
the transfer function is equal to Z
eq
;
H(f) =
j 2 f LR
R(1 (2 f)
2
LC +j 2 fL
(3.20)
The magnitude of the transfer function is:
[H(f)[ =
2 f LR
_
R
2
[1 (2 f)
2
LC]
2
+ (2 f)
2
L
2
(3.21)
Figure 3.10 shows the magnitude of the transfer function versus the frequency.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 52
10
3
10
4
f
c1
f
c2
10
5
f (Hz)
|H(f)| ()
250
200
150
100
50
f
o
Figure 3.10: Magnitude of the transfer function versus the frequency.
Note that the peak value of the magnitude of the transfer function is equal to R = 230 and
it occurs at the central frequency f
o
given by:
f
o
=
1
2

LC
= 5.03 kHz
The 3 dB cut-off frequencies satisfy the following eqn :
2 f LR
_
R
2
[1 (2 f)
2
LC]
2
+ (2 f)
2
L
2
=
R

2
Solving, we obtain:
(2f)
2
=
1 + 2
C
/
L
2
2
C

_
1 + 4
C
/
L
2
2
C
where
C
= RC and
L
= L/R. Taking the square root we nd:
f
c
1
=
_
1 + 2
C
/
L

_
1 + 4
C
/
L
_1
2
2

2
C
f
c
2
=
_
1 + 2
C
/
L
+
_
1 + 4
C
/
L
_1
2
2

2
C
The bandwidth is (f
c
2
f
c
1
) = 692 Hz. The Quality factor can be calculated as indicated
below:
Q =
f
o
f
c
2
f
c
1
= 7.3
Circuit b): For this circuit we can write the following set of eqns:
_
_
_
V
S
V
A
R
1
=
V
A
Z
C
+
V
A
V
O
Z
L
V
O
=
R
2
R
2
+Z
L
V
A
(3.22)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 53
with
Z
C
=
1
j C
Z
L
= j L
Solving we obtain:
V
O
= V
S
R
2
R
2
+R
1
+j 2 f (R
2
R
1
C +L) LR
1
C (2 f)
2
that is:
H(f) =
R
2
R
2
+R
1
+j 2 f (R
2
R
1
C +L) LR
1
C (2 f)
2
Figure 3.11 shows the magnitude of the transfer function versus the frequency. The 3 dB
10
5
|H(f)|
f (Hz)
f
c
10
4
10
3
10
2
0.7
0.6
0.2
0.1
0.5
0.4
0.3
Figure 3.11: Magnitude of the transfer function versus the frequency.
cut-off frequency satises the following eqn :
[H(f)[ =
1

2
R
2
R
2
+R
1
From gure 3.11 we can obtain the 3 dB cut-off frequency; f
c
= 2.64 kHz. The bandwidth is
also 2.64 kHz.
Circuit c): For this circuit we can write;
V
O
=
Z
LR
Z
LR
+Z
C
V
S
where Z
LR
is the impedance associated with the parallel combination of R with L, that is:
Z
LR
=
j 2 f LR
j 2 f L +R
The output current I
O
can be expressed as:
I
O
=
V
O
Z
L
that is:
I
O
= V
S
Z
LR
Z
LR
+Z
C
1
Z
L
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 54
Finally,
H(f) =
Z
LR
Z
LR
+Z
C
1
Z
L
=
j 2 f C
j 2 f L +R[1 (2 f)
2
LC]
Figure 3.12 shows the magnitude of the transfer function versus the frequency. The 3 dB
10
2
0.3
0.2
0.1
|H(f)| (mS)
10
4
f
c1 f
c2
10
3
f (Hz)
Figure 3.12: Magnitude of the transfer function versus the frequency.
cut-off frequency satisfy the following eqn :
[H(f)[ =
1

2
C
L
From gure 3.12 we can obtain the 3 dB cut-off frequencies; f
c
1
= 1.27 kHz and f
c
2
= 1.43
kHz. The bandwidth is therefore 160 Hz.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 55
Solution of problem 3.9
Signal a): v
1
(t) can be expressed as
v
1
(t) =
_
_
_
b
a
t for 0 < t < a
0 elsewhere
(3.23)
with b = 3/2 and a = 4 10
3
.
V
1
(f) can be calculated as follows:
V
1
(f) =
_

v
1
(t) e
j 2 f t
dt
=
_
a
0
b
a
t e
j 2 f t
dt
= b
(1 + 2 j a f) e
2 j a f
1
4 a
2
f
2
Signal b): v
2
(t) can be expressed as
v
2
(t) =
_

_
t + 3a for 3a < t < 2a
a for 2a t 2a
t + 3a for 2a < t < 3a
0 elsewhere
(3.24)
with a = 10
3
.
V
2
(f) can be calculated as follows:
V
2
(f) =
_

v
2
(t) e
j 2 f t
dt
=
_
2a
3a
(t + 3a) e
j 2 f t
dt +
_
2a
2a
a e
j 2 f t
dt
+
_
3a
2a
(t + 3a) e
j 2 f t
dt
=
cos(4 f a) cos(6 f a) 2 sin(4 f a)
2
2
f
2
+
1
4
sinc (4 f a)
Signal c): v
3
(t) can be expressed as
v
3
(t) = 2 rect
_
t
2 a
_
+ rect
_
t 2 a
2 a
_
+ rect
_
t + 2 a
2 a
_
with a = 10
3
.
V
3
(f) can be calculated as follows:
V
3
(f) =
_

v
3
(t) e
j 2 f t
dt
= 4 a sinc (2 f a) [1 + cos(4 f a)]
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 56
Solution of problem 3.10
Let us consider the convolution between two functions x(t) and y(t). x(t) y(t) can be expressed
as:
x(t) y(t) =
_

x(t ) y() d (3.25)


Using the variable transformation
= t
we have
d = d


and eqn 3.25 can be written as follows:
x(t) y(t) =
_

+
x() y(t ) d
=
_
+

x() y(t ) d
= y(t) x(t)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 57
Solution of problem 3.11
The transfer function of the circuit can be calculated using phasor analysis:
H(f) =
V
O
V
S
=
1
1 +j 2 f RC (2 f)
2
LC
This transfer function can be written as follows:
H(f) =

2
o

2
o
+j 2 f (2
o
) (2 f)
2
where

o
=
1

LC
= 30.9 krad/s
and
=
1
2
R
_
C
L
= 0.7
The transfer function can also be written as
H(f) =

2

1
_
1

1
+j 2 f

1

2
+j 2 f
_
with

1
=
o

o
_

2
1

2
=
o

o
_

2
1
Choosing
1
=
o

o
_

2
1 and
2
=
o
+
o
_

2
1 and using the table of Fourier
transforms in Appendix A we can write the impulse response as:
h(t) =

2

1
_
e

1
t
e

2
t
_
u(t)
=

o
2
_

2
1
e

o
t
_
e

2
1 t
e

2
1 t
_
u(t)
Since is less than one, the last eqn can be written as:
h(t) =

o
j 2
_
1
2
e

o
t
_
e
j
o

1
2
t
e
j
o

1
2
t
_
u(t)
=

o
_
1
2
e

o
t
sin
_

o
_
1
2
t
_
u(t)
Figure 3.13 shows h(t).
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 58
15
10
5
h(t)
(10
3
)
1 2 3
t (s)
(10
4
)
Figure 3.13: Impulse response.
Solution of problem 3.12
The output voltage is given by:
v
o
(t) = h(t) v
i
(t)
=
_

h() v
i
(t )d (3.26)
where h(t) is as calculated in the previous exercise and v
i
(t) is given by
v
i
= V
a
rect
_
t T
a
/2
T
a
_
Eqn 3.26 can be written as:
v
o
(t) =
_

_
_
t
0
h() V
a
d for < t < T
a
_
t
tT
a
h() V
a
d for t T
a
(3.27)
Solving, we obtain:
v
o
(t) =
_

_
V
a

V
a
_
1
2
e

o
t
sin
_
_
1
2

o
t +
_
, 0 < t < T
a
V
a
_
1
2
_
e

o
t
sin
_
_
1
2

o
t +
_
e

o
(tT
a
)
sin
_
_
1
2

o
(t T
a
) +
__
, t T
a
(3.28)
with
= tan
1
_
_
1
2

_
Figure 3.14 shows v
i
(t) and v
o
(t).
Introduction to linear circuit analysis and modelling Moura and Darwazeh
3. Frequency domain electrical signal and circuit analysis 59
0.5
t
(ms)
t
(ms)
0.5
2
2
a)
b)
v
o
(t) (V)
v
i
(t) (V)
Figure 3.14: a) v
i
(t). b) v
o
(t).
Introduction to linear circuit analysis and modelling Moura and Darwazeh
Chapter 4
Natural and forced responses circuit
analysis
Solution of problem 4.1
T 5T 4T 3T 2T
0.2
0.4
0.6
v
C
(t)/V
s
1.0
0.8
t
Figure 4.1: Voltage normalised to V
s
versus time normalised to T.
Figure 4.1 shows v
C
(t) when = T/3. From this gure we observe that the circuit reaches its
steady-state at about 2T. We conclude that for a smaller time constant the circuit bandwidth in-
creases and, therefore, the circuit reaches its steady-state more quickly.
4. Natural and forced responses circuit analysis 61
Solution of problem 4.2
The Laplace transform of v
1
(t) can be calculated as follows:
V
1
(s) =
_

0
v
1
(t) e
s t
dt
=
_
1
0
t e
s t
dt +
_

0
e
s t
dt
=
_

t
s
e
s t

1
s
2
e
s t
_
1
0
+
_

1
s
e
s t
_

0
=
1
s
2
_
1 e
s
_
Real(s) > 0
The Laplace transform of v
2
(t) can be calculated as follows:
V
2
(s) =
_

0
v
2
(t) e
s t
dt
=
_

0
t
2
e
s t
dt
=
_
t
2
s
e
s t

2 t
s
2
e
s t

2
s
3
e
s t
_

0
=
2
s
3
Real(s) > 0
v
3
(t) can be expressed as follows:
v
3
(t) = t
2
u(t) (t 1)
2
u(t 1)
Now the Laplace transform of v
2
(t) can be calculated as follows:
V
1
(s) = V
2
(s) V
2
(s) e
s
=
2
s
3
_
1 e
s
_
Real(s) > 0
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 62
Solution of problem 4.3
The roots of the equation (s a)
2
+b
2
= 0 are:
s = a j b
Now we can write:
1
(s a)
2
+b
2
=
K
1
s a j b
+
K
2
s a +j b
that is:
1
(s a)
2
+b
2
=
K
1
(s a +j b) +K
2
(s a j b)
(s a)
2
+b
2
The last eqn is an equality if:
_
_
_
K
1
+K
2
= 0
K
1
(a +j b) +K
2
(a j b) = 1
(4.1)
Solving, we obtain:
K
1
=
1
j 2 b
K
2
=
1
j 2 b
The inverse Laplace transform can now be obtained as follows:
x
1
(t) =
1
j 2 b
e
(a+j b) t

1
j 2 b
e
(aj b) t
=
1
b
e
a t
e
j b t
e
j b t
2 j
=
1
b
e
a t
sin(b t)
We can write X
2
(s) as follows:
s
(s +a)
2
(s +b)
2
=
K
a
1
(s +a)
2
+
K
a
2
s +a
+
K
b
1
(s +b)
2
+
K
b
2
s +b
The coefcients K
a
1
, K
a
2
, K
b
1
and K
b
2
can be obtained solving the following set of eqns:
_

_
K
a
2
+K
b
2
= 0
K
a
2
a + 2 K
a
2
b +K
a
1
+K
b
1
+K
b
2
b + 2 K
b
2
a = 0
2 K
a
1
b + 2 K
a
2
a b +K
a
2
b
2
+ 2 K
b
1
a + 2 K
b
2
b a +K
b
2
a
2
= 1
K
a
1
b
2
+K
b
2
b a
2
+K
a
2
a b
2
+K
b
1
a
2
= 0
(4.2)
Solving, we obtain:
K
a
1
=
a
(a b)
2
K
b
1
=
b
(a b)
2
K
a
2
=
(a +b)
(a b)
3
K
a
3
=
(a +b)
(a b)
3
The inverse Laplace transform can be written as
x
2
(t) = (K
a
1
+K
a
2
t) e
a t
u(t) + (K
b
1
+K
b
2
t) e
b t
u(t)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 63
X
3
(s) can be written as
1
s
2
a
2
=
K
1
s +a
+
K
2
s a
with
K
1
=
1
2 a
K
2
=
1
2 a
and x
1
(t) can be obtained as follows:
x
1
(t) =
1
2 a
e
a t
u(t) +
1
2 a
e
a t
u(t)
=
1
a
sinh(a t) u(t)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 64
Solution of problem 4.4
Circuit a): Figure 4.2 a) shows the equivalent circuit for t < 0. Note that, if connected to a DC

+
V
s
I
L
R
1
R
2
R
3
a)
R
2
b)
V
R2
(f)
(V
R2
(s))

+
+

+
(V
L
(s))

I(f)
(I(s))
(V
R1
(s))
V
R1
(f)
V
L
(f)
L
R
1
Figure 4.2: a) Equivalent circuit for t < 0. b) Equivalent circuit for t 0.
source for a long time the inductor behaves as a short-circuit. The current that ows through
R
1
and L can be determined as follows:
I
L
=
V
s
(R
1
[[R
2
) +R
3
R
2
R
1
+R
2
(4.3)
= 0.75 mA
The voltage across R
1
is:
V
R
1
=
R
1
R
1
+R
2
V
s
= 0.75 V
Figure 4.2 b) shows the equivalent circuit for t 0. Using Fourier transforms we can write
the following eqn:
V
R
1
(f) +V
L
(f) = V
R
2
(f)
that is:
R
1
I(f) +j 2 f LI(f) LI
L
= R
2
I(f)
where I
L
is given by eqn 4.3. Solving this eqn to obtain I(f) we have:
I(f) =
LI
L
R
1
+R
2
+j 2 f L
and V
R
1
(f) is:
V
R
1
(f) = R
1
I(f)
=
R
1
LI
L
R
1
+R
2
+j 2 f L
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 65
Calculating the inverse Fourier transform we obtain the time domain voltage across R
1
for
t 0, that is:
v
R
1
(t) = R
1
I
L
e
t (R
1
+R
2
)/L
u(t) (4.4)
The voltage v
R
1
(t) can be written, for all time t, as follows:
v
R
1
(t) =
R
1
R
1
+R
2
V
s
u(t) +R
1
I
L
e
t (R
1
+R
2
)/L
u(t) (4.5)
Now, we use Laplace transforms to analyse the circuit (see gure 4.2 b)). We can write the
following eqn:
R
1
I(s) +s LI(f) LI
L
= R
2
I(s)
that is:
I(f) =
LI
L
R
1
+R
2
+s L
and V
R
1
(s) is:
V
R
1
(f) = R
1
I(s)
=
R
1
LI
L
R
1
+R
2
+s L
Calculating the inverse Laplace transform we obtain the time domain voltage across R
1
for
t 0, that is:
v
R
1
(t) = R
1
I
L
e
t (R
1
+R
2
)/L
u(t) (4.6)
Comparing eqn 4.4 with 4.6 we observe that these are equal. This is expected since both
methods (Fourier and Laplace transforms) can be used to study the natural response of a
circuit. Figure 4.3 shows the voltage across R
1
.
6 2 4
t
(s)
v
R
1
(t)
(V)
0
0.8
0.2
0.4
0.6
Figure 4.3: Voltage across R
1
.
Circuit b): Figure 4.4 a) shows the equivalent circuit for t < 0. Note that, for DC, the
capacitor behaves as an open-circuit. Hence all the current ows through R
2
giving rise to a
voltage across its terminals:
V
R
2
= R
2
I
s
= 4 V
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 66
I
s
a)
b)
R
1
C (V
C
(s))
V
C
(f)
R
2
+

Figure 4.4: a) Equivalent circuit for t < 0 b)Equivalent circuit for t 0.


Since the resistor R
1
is not conducting, v
R
1
(t) = 0 for t < 0 and the voltage across the
capacitor, for t < 0, is V
R
2
.
Figure 4.4 b) shows the equivalent circuit for t 0. From this circuit it is clear that the voltage
across R
1
is the same as the voltage across the capacitor. Using Fourier transforms we can
write:
V
C
(f)
R
1
= j 2 f C V
C
(f) +C V
R
2
Note that V
R
2
corresponds to the initial condition of the capacitor. The voltage V
C
(f) can be
obtained as:
V
C
(f) = V
R
2
R
1
C
1 +j 2 f R
1
C
Taking the inverse Fourier transform we get:
v
c
(t) = V
R
2
e
t/
u(t)
with = R
1
C. The voltage across the resistance R
1
, for all time t, can be written as:
v
R
1
(t) = V
R
2
e
t/
u(t)
Using Laplace transforms we can write (for t 0):
V
C
(s)
R
1
= s C V
C
(s) +C V
R
2
The voltage V
C
(s) can be obtained as:
V
C
(s) = V
R
2
R
1
C
1 +s R
1
C
Taking the inverse Laplace transform we get:
v
c
(t) = V
R
2
e
t/
u(t)
where = R
1
C. The voltage across the resistance R
1
can be written, for all time t, as:
v
R
1
(t) = V
R
2
e
t/
u(t)
Once again the Fourier transform and Laplace transforms give the same result. Figure 4.5
shows the voltage across R
1
.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 67
2 0 4 6 8 10
(ms)
t
v
R
1
(t)
(V)
2
4
Figure 4.5: Voltage across R
1
.
Solution of problem 4.5
Circuit a): Figure 4.6 a) shows the equivalent circuit for t < 0. Since the capacitor represents

+
V
s
a)
R
2
+
R
1
+ R
3
+

V
L
(s)

V
C
(s)
+
C
b)
V
R
(s)
L
R
3
I(s)
Figure 4.6: a) Equivalent circuit for t < 0. b) Equivalent circuit for t 0.
an open-circuit at DC, R
1
is not conducting and the voltage across the capacitor, V
co
, is the
voltage across R
3
, which is given by:
V
R
3
= V
s
R
3
R
2
+R
3
= 0.44 V
The inductor behaves as a short-circuit at DC. Therefore, the voltage across its terminals is
zero. The current that ows through the inductor is the current that ows through R
3
:
I
lo
= I
R
3
I
R
3
=
V
R
3
R
3
= 3.7 mA
Figure 4.6 b) shows the equivalent circuit for t 0. For this circuit we can write (using
Laplace domain analysis):
V
C
(s) = V
R
(s) +V
L
(s)
that is

I(s)
s C
+
V
co
s
= RI(s) +s LI(s) LI
lo
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 68
with R = R
1
+R
3
. Solving in order to obtain I(s) we get:
I(s) = =
C V
co
+LC s I
lo
1 +s C R +LC s
2
The last eqn can be written as follows:
I(s) = C V
co

2
n
s
2
+ 2
n
s +
2
n
+ I
lo
s
s
2
+ 2
n
s +
2
n
with

n
=
1

LC
= 50 krad/s
=
1
2
R
_
C
L
= 2.2
Taking the inverse Laplace Transform ( > 1) we have:
i(t) = C V
co

n
_

2
1
sinh
_

n
_

2
1 t
_
e
t
n
u(t)
. .
Contribution from V
co
+ I
lo
_
cosh
_

n
_

2
1 t
_

2
1
sinh
_

n
_

2
1 t
_
_
e
t
n
u(t)
. .
Contribution from I
lo
Figure 4.7 shows i(t) versus the time.
40
60 80 20
4
1
2
3
i(t)
(mA)
i(t)
Contribution
Contribution
100
(s)
t
from V
co
from I
lo
Figure 4.7: The current for all time t.
Circuit b): Figure 4.8 a) shows the equivalent circuit for t < 0. The voltage across the
capacitor is equal to the voltage across R
1
given by:
V
co
= V
R
1
= I
s
R
1
The current through the inductor is zero since the capacitor is not conducting.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 69
R
1
V
R1
(s)
+

I
s
C
+

L
b)
V
R2
(s)
a)
I
(
s)
V
L
(s)
+
R
2

V
C
(s)
+
Figure 4.8: a) Equivalent circuit for t < 0. b) Equivalent circuit for t 0.
Figure 4.8 b) shows the equivalent circuit for t 0. For this circuit we can write:
V
L
(s) = V
R
2
+V
C
(s)
that is
s LI(s) = RI(s)
I
(
s)
s C
+
V
co
s
Solving, we get:
I(s) =
C V
co
s
2
LC +s C R + 1
= C I
s
R
1

2
n
s
2
+ 2
n
s +
2
n
with

n
=
1

LC
= 14.1 krad/s
=
1
2
R
_
C
L
= 0.35
Taking the inverse Laplace transform we obtain
i(t) = C V
co

n
_
1
2
sin
_

n
_
1
2
t
_
e
t
n
u(t)
Figure 4.9 shows i(t).
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 70
6 8 10
5
10
10
2
i(t) (A)
t (s)
10
4
4 2
5
Figure 4.9: The current i(t).
Solution of problem 4.6
Circuit a): Figure 4.10 shows the equivalent circuit in the s-domain. For this circuit we can
+
R
2
R
1
V
S
(s)

1
s C
+

V
C
1
(s)
Figure 4.10: Equivalent circuit in the s-domain.
write:
V
C
1
(s) = V
S
(s)
R
1
[[
1
s C
1
_
R
1
[[
1
s C
1
_
+R
2
= V
S
(s)
R
1
R
1
+R
2

1
1 +s
with
V
S
(s) =
V
s
s
= C
1
R
1
R
2
R
1
+R
2
V
s
= 3 V. Thus V
C
1
(s) can be written as:
V
C
1
(s) =
V
s
s

R
1
R
1
+R
2

1
1 +s
Taking the inverse Laplace transform we obtain
v
C
1
(t) =
V
s
R
1
R
1
+R
2
_
1 e
t/
_
u(t)
Figure 4.11 shows v
C
1
(t)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 71
2
4 10
4
t (s)
v
C
1
(t) (V)
3
1.5
Figure 4.11: The voltage across the capacitor C
1
.
+
V
S
(s)

(s C
1
)
1
(s C
2
)
1
R
1
R
2
Figure 4.12: Equivalent circuit in the s-domain.
Circuit b): Figure 4.12 shows the equivalent circuit in the s-domain. For this circuit we can
write:
V
C
1
(s) = V
S
(s)
R
1
[[
1
s C
1
_
R
1
[[
1
s C
1
_
+
_
R
2
[[
1
s C
2
_
that is:
V
C
1
(s) = V
S
(s)
R
1
R
1
+R
2
1 +s R
2
C
2
1 +s (C
1
+C
2
)
R
1
R
2
R
1
+R
2
Since R
1
C
1
= R
2
C
2
the last eqn can be written as:
V
C
1
(s) = V
S
(s)
R
1
R
1
+R
2
Taking the inverse Laplace transform we have
v
C
1
(t) =
R
1
R
1
+R
2
v
S
(t)
= 2.5 u(t)
This shows that if R
1
C
1
= R
2
C
2
then the output waveform is a smaller though undistorted
version of the input. This result is important for the design of attenuators and can be found in
nearly all oscilloscope attenuators and probes.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 72
Solution of problem 4.7
Circuit a): Figure 4.13 shows the equivalent circuit in the s-domain. For this circuit we can
+
R
2
R
1 V
S
(s)

s L
I
S
(s) I
L
(s)
Figure 4.13: Equivalent circuit in the s-domain.
write:
I
S
(s) =
V
S
(s)
R
2
+ (R
1
[[s L)
= V
S
(s)
R
1
+s L
R
2
R
1
+s L(R
2
+R
1
)
Now the current in L can be obtained from the current divider expression:
I
L
(s) = I
S
(s)
R
1
R
1
+s L
= V
S
(s)
R
1
R
1
+R
2
1
R
1
R
2
R
1
+R
2
+s L
=
V
s
s
R
1
R
1
+R
2
1
R
1
R
2
R
1
+R
2
+s L
with V
s
= 4 V. Taking the inverse Laplace transform we obtain:
i
L
(t) =
V
s
R
2
_
1 e
t/
_
(4.7)
with = L/(R
1
[[R
2
). Figure 4.14 shows I
L
(t).
10
20
2 4 6 8 t (s)
I
L
(t) (mA)
Figure 4.14: The current i
L
(t).
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 73
+
R
1
R
2
V
S
(s)
s L

I
L
(s)
I
S
(s)
Figure 4.15: Equivalent circuit in the s-domain.
Circuit b): Figure 4.15
shows the equivalent circuit in the s-domain. For this circuit we can write:
I
S
(s) =
V
S
(s)
R
1
+ (R
2
[[s L)
= V
S
(s)
R
2
+s L
R
2
R
1
+s L(R
2
+R
1
)
and
I
L
(s) =
R
2
R
2
+s L
I
L
(s)
=
V
s
s
1
R
1
1
1 +s L
R
1
+R
2
R
1
R
2
Taking the inverse Laplace transform we obtain:
i
L
(t) =
V
s
R
1
_
1 e
t/
_
(4.8)
with = L/(R
1
[[R
2
). Figure 4.16 shows I
L
(t).
t (s)
2 4 6 8 10
7
I
L
(t) (mA)
8
4
Figure 4.16: The current i
L
(t).
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 74
Solution of problem 4.8
Figure 4.17 shows the equivalent circuit in the s-domain. The current through the resistance can be
C
L
I
S
(s)
R
I
L
(s) I
C
(s)
I
R
(s)
Figure 4.17: Equivalent circuit in the s-domain.
obtained as follows:
I
R
(s) = I
S
(s)
Z
LC
Z
LC
+R
with I
S
(s) = I
s
/s and with Z
LC
representing the parallel combination of s L with (s C)
1
;
Z
LC
= s L[[(s C)
1
=
s L
1 +s
2
LC
Hence, I
R
(s) can be written as:
I
R
(s) = I
S
(s)
s L
s
2
LC R +s L +R
= I
S
(s)
2
n
s
s
2
+ 2
n
s +
2
n
= I
s
2
n
s
2
+ 2
n
s +
2
n
with

n
=
1

LC
= 64.6 krad/s
=
1
2 R
_
L
C
= 0.48
Taking the inverse Laplace transform we have:
i
R
(t) = I
s
2 e
t
n
_
1
2
sin
_
_
1
2

n
t
_
u(t)
The current through the capacitor can be obtained as follows:
I
C
(s) = I
S
(s)
Z
LR
Z
LR
+ (s C)
1
with Z
LR
representing the parallel combination of s L and R;
Z
LR
= s L[[R
=
s LR
R +s L
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 75
Hence, I
C
(s) can be written as:
I
C
(s) = I
S
(s)
s
2
LC R
s
2
LC R +s L +R
= I
S
(s)
s
2
s
2
+ 2
n
s +
2
n
= I
s
s
s
2
+ 2
n
s +
2
n
Taking the inverse Laplace transform we have:
i
C
(t) = I
s
e
t
n
_
1
2
cos
_
_
1
2

n
t +
_
u(t)
with
= tan
1
_

_
1
2
_
The current through the inductor can be obtained as:
I
L
(s) = I
S
(s)
Z
CR
Z
CR
+s L
with Z
CR
representing the parallel combination of (s C)
1
and R;
Z
CR
= (s C)
1
[[R
=
R
1 +s C R
Hence, I
L
(s) can be written as:
I
L
(s) = I
S
(s)
R
s
2
LC R +s L +R
= I
S
(s)

2
n
s
2
+ 2
n
s +
2
n
= I
s

2
n
s (s
2
+ 2
n
s +
2
n
)
Taking the inverse Laplace transform we have:
i
L
(t) = I
s
_
1
e
t
n
_
1
2
sin
_
_
1
2

n
t +

_
_
u(t)
with

= tan
1
_
_
1
2

_
Figure 4.18 shows i
S
(t), i
R
(t), i
C
(t) and i
L
(t). Note the oscillatory response associated to i
R
(t),
i
C
(t) and i
L
(t) due to < 1. It is interesting to note that as t the inductor conducts I
s
while R
and C do not conduct. This is expected since, as t the electrical elements see i
S
(t) as a DC
current source and it is known that for DC the inductor behaves as a short-circuit and the capacitor
behaves as an open-circuit.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 76
1
2 3
t (s)
10
4
2
4
6
2
8
12
10
1
2
3
t (s)
10
4
2
4
6
2
8
12
10
1
2 3
t (s)
10
4
2
4
6
2
8
12
10
1
2 3
t (s)
10
4
2
4
6
2
8
12
10
i
L
(t) (mA)
i
C
(t) (mA)
i
S
(t) (mA)
i
R
(t) (mA)
Figure 4.18: i
S
(t), i
R
(t), i
C
(t) and i
L
(t)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
4. Natural and forced responses circuit analysis 77
Solution of problem 4.9
The circuit is critically damped when = 1. Using the results obtained in the previous problem we
have
R = 2
_
L
C
= 38.7
Introduction to linear circuit analysis and modelling Moura and Darwazeh
Chapter 5
Electrical two-port network analysis
Solution of problem 5.1
Circuit a): Figure 5.1 a) shows the equivalent circuit for the calculation of Z
11
and Z
21
. From
this gure we can write:
V
1
= (Z
1
+Z
2
) I
1
V
2
= Z
2
I
1
Hence we have:
Z
11
=
V
1
I
1

I
2
=0
= Z
1
+Z
2
Z
21
=
V
2
I
1

I
2
=0
= Z
2
Figure 5.1 b) shows the equivalent circuit for the calculation of Z
12
and Z
22
. For this circuit
we can write:
V
2
= Z
2
I
2
V
1
= V
2
Hence we have:
Z
12
=
V
1
I
2

I
1
=0
= Z
2
Z
22
=
V
2
I
2

I
1
=0
= Z
2
Z
1 Z
1
Z
2
I
2
Z
2
+ + +

I
1
+

V
1
V
2

V
1
V
2

b) a)
I
1
= 0 I
2
= 0
Figure 5.1: a) Calculation of Z
11
and Z
21
. b) Calculation of Z
12
and Z
22
.
5. Electrical two-port network analysis 79
Z
1
Z
2
Z
1
Z
2
I
1
+

V
1 V
2
+

V
1
+
V
2

a) b)
I
1
= 0
I
2
= 0
I
2
Figure 5.2: a) Calculation of Z
11
and Z
21
. b) Calculation of Z
12
and Z
22
.
Circuit b): Figure 5.2 a) shows the equivalent circuit for the calculation of Z
11
and Z
21
. From
this gure we can write:
V
1
= Z
1
I
1
V
2
= V
1
Hence we have:
Z
11
=
V
1
I
1

I
2
=0
= Z
1
Z
21
=
V
2
I
1

I
2
=0
= Z
1
Figure 5.2 b) shows the equivalent circuit for the calculation of Z
12
and Z
22
. For this circuit
we can write:
V
2
= (Z
2
+Z
1
) I
2
V
1
= Z
1
I
2
Hence we have:
Z
12
=
V
1
I
2

I
1
=0
= Z
1
Z
22
=
V
2
I
2

I
1
=0
= Z
1
+Z
2
Circuit c): Figure 5.3 a) shows the equivalent circuit for the calculation of Z
11
and Z
21
. From
I
1
Z
3
Z
4
Z
1
Z
3
Z
4
I
2
Z
2
+
V
2

V
1
+
V
1

+
V
2

0
0
V
B
Z
1 Z
2
a) b)
I
Z2
I
Z1
I
Z4
I
Z1
I
Z2
I
Z3 I
Z3 I
1
= 0 I
2
= 0
V
C
V
B
V
A
I
Z4
Figure 5.3: a) Calculation of Z
11
and Z
21
. b) Calculation of Z
12
and Z
22
.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 80
this gure we can write:
_

_
I
1
= I
Z
1
+I
Z
3
I
1
= I
Z
2
+I
Z
4
I
Z
1
= I
Z
4
V
2
= V
B
V
C
(5.1)
that is
_

_
I
1
=
V
1
V
C
Z
1
+
V
1
V
B
Z
3
I
1
=
V
B
Z
2
+
Z
C
Z
4
V
1
V
C
Z
1
=
V
C
Z
4
V
2
= V
B
V
C
(5.2)
Solving, to obtain V
1
and V
2
we get:
V
1
= I
1
(Z
3
+Z
2
)(Z
4
+Z
1
)
Z
3
+Z
4
+Z
1
+Z
2
V
2
= I
1
(Z
2
Z
1
Z
3
Z
4
)
Z
3
+Z
4
+Z
1
+Z
2
Hence we have:
Z
11
=
V
1
I
1

I
2
=0
=
(Z
3
+Z
2
)(Z
4
+Z
1
)
Z
3
+Z
4
+Z
1
+Z
2
Z
21
=
V
2
I
1

I
2
=0
=
(Z
2
Z
1
Z
3
Z
4
)
Z
3
+Z
4
+Z
1
+Z
2
Figure 5.3 b) shows the equivalent circuit for the calculation of Z
12
and Z
22
. For this circuit
we can write:
_

_
I
2
= I
Z
3
+I
Z
2
I
2
= I
Z
4
+I
Z
1
I
Z
3
= I
Z
1
V
1
= V
A
V
B
(5.3)
that is
_

_
I
2
=
V
2
V
A
Z
3
+
V
2
V
B
Z
2
I
2
=
V
B
Z
4
+
V
A
Z
1
V
2
V
A
Z
3
=
V
A
Z
1
V
1
= V
A
V
B
(5.4)
Solving, to obtain V
1
and V
2
we get:
V
1
= I
2
Z
2
Z
1
Z
3
Z
4
Z
3
+Z
4
+Z
1
+Z
2
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 81
V
2
= I
2
(Z
2
+Z
4
)(Z
3
+Z
1
)
Z
3
+Z
4
+Z
1
+Z
2
Hence we have:
Z
12
=
V
1
I
2

I
1
=0
=
Z
2
Z
1
Z
3
Z
4
Z
3
+Z
4
+Z
1
+Z
2
Z
22
=
V
2
I
2

I
1
=0
=
(Z
2
+Z
4
)(Z
3
+Z
1
)
Z
3
+Z
4
+Z
1
+Z
2
Circuit d): Figure 5.4 a) shows the equivalent circuit for the calculation of Z
11
and Z
21
. For
a) b)
Z
3
Z
1
Z
3
Z
1

+
V
1
Z
2
V
2
+

V
1

+ +
Z
2
V
2

I
1
= 0 I
2
= 0
I
1
I
2
Figure 5.4: a) Calculation of Z
11
and Z
21
. b) Calculation of Z
12
and Z
22
.
this circuit we can write:
V
1
= I
1
[Z
1
[[(Z
2
+Z
3
)]
= I
1
Z
1
(Z
2
+Z
3
)
Z
1
+Z
2
+Z
3
and
V
2
= I
1
Z
2
Z
1
Z
1
+Z
2
+Z
3
Hence we have:
Z
11
=
V
1
I
1

I
2
=0
=
Z
1
(Z
2
+Z
3
)
Z
1
+Z
2
+Z
3
Z
22
=
V
2
I
1

I
2
=0
= Z
2
Z
1
Z
1
+Z
2
+Z
3
Figure 5.4 b) shows the equivalent circuit for the calculation of Z
11
and Z
21
. For this circuit
we can write:
V
2
= I
2
Z
2
[[(Z
1
+Z
3
)
= I
2
Z
2
(Z
1
+Z
3
)
Z
1
+Z
2
+Z
3
and
V
1
= I
2
Z
1
Z
2
Z
1
+Z
2
+Z
3
(5.5)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 82
Hence we have:
Z
12
=
V
1
I
2

I
1
=0
= Z
1
Z
2
Z
1
+Z
2
+Z
3
Z
22
=
V
2
I
2

I
1
=0
=
Z
2
(Z
1
+Z
3
)
Z
1
+Z
2
+Z
3
Circuit e): Figure 5.5 a) shows the equivalent circuit for the calculation of Z
11
and Z
21
. For
+

I
1
+

R
i
A
rv
V
o
A
fi
I
i
I
2
+

V
1
+

R
o
V
o
= V
2
I
1
= I
i
= 0
I
i
R
i
A
rv
V
o
R
o
A
fi
I
i
I
2
= 0
+
V
o
= V
2

+
V
1
b)
a)
Figure 5.5: a) Calculation of Z
11
and Z
21
. b) Calculation of Z
12
and Z
22
.
this circuit we can write:
I
1
=
V
1
A
rv
V
o
R
i
=
V
1
A
rv
V
2
R
i
(5.6)
and
V
o
= V
2
= A
fi
I
i
R
o
= A
fi
I
1
R
o
(5.7)
Equations 5.6 and 5.7 can be solved to obtain V
1
as follows:
V
1
= I
1
(R
i
+A
rv
A
fi
R
o
)
Hence, we can write
Z
11
=
V
1
I
1

I
2
=0
= R
i
+A
rv
A
fi
R
o
= 103 k
Z
21
=
V
2
I
1

I
2
=0
= A
fi
R
o
= 1 M
Figure 5.5 b) shows the equivalent circuit for the calculation of Z
12
and Z
22
. For this circuit
we have I
1
= I
i
= 0. Hence, we can write:
V
2
= I
2
R
o
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 83
and
V
1
= A
rv
V
2
= A
rv
I
2
R
o
Finally we have,
Z
12
=
V
1
I
2

I
1
=0
= A
rv
R
o
= 1 k
Z
22
=
V
2
I
2

I
1
=0
= R
o
= 10 k
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 84
Solution of problem 5.2
Figure 5.6 a) shows the circuit for the calculation of Z
eq
11
and Z
eq
21
. Z
eq
11
can be determined as
follows:
[Z

] + [Z

]
I
2
+

V
2
I
1
+
V
1

1
V

+
V

2
V

1
+

1
I

2
I

2
I

1
V
1

+
[Z

]
[Z

]
+

1
V

+
V

2
V

1
+

1
I

2
+
V
2

2
I

1
I
1
[Z

]
[Z

]
+

V
1
V
2

+
I
2
a)
b)
c)
I
1
= 0
I
2
= 0
Figure 5.6: a) Calculation of Z
eq
11
and Z
eq
21
. b) Calculation of Z
eq
12
and Z
eq
22
. c) Equivalent
two-port circuit.
Z
eq
11
=
V
1
I
1

I
2
=0
Since port 2 is an open-circuit then I
2
= I

2
= I

2
= 0 and I
1
= I

1
= I

1
. We also have V
1
=
V

1
+V

1
. Therefore, we can write the last eqn as follows:
Z
eq
11
=
V

1
I

2
=0
+
V

1
I

2
=0
= Z

11
+Z

11
In addition we have V
2
= V

2
+V

2
. Therefore we can write:
Z
eq
21
=
V

2
I

2
=0
+
V

2
I

2
=0
= Z

21
+Z

21
Figure 5.6 b) shows the circuit for the calculation of Z
eq
12
and Z
eq
22
. Z
eq
12
is given by:
Z
eq
12
=
V
1
I
2

I
1
=0
Since port 1 is an open-circuit then I
1
= I

1
= I

1
= 0 and I
2
= I

2
= I

2
. Again we have
V
1
= V

1
+V

1
and V
2
= V

2
+V

2
. Therefore, we can write:
Z
eq
12
=
V

1
I

1
=0
+
V

1
I

1
=0
= Z

12
+Z

12
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 85
and
Z
eq
22
=
V

2
I

1
=0
+
V

2
I

1
=0
= Z

22
+Z

22
From the above we can write
[Z
eq
] = [Z

] + [Z

]
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 86
Solution of problem 5.3
Circuit a): Figure 5.7 a) shows the equivalent circuit for the calculation of Y
11
and Y
21
. For
+

a)
Z
1
Z
2
V
1
I
1
I
2
Z
1
Z
2
V
2
I
2
I
1
b)
V
1
= 0
V
2
= 0
Figure 5.7: a) Calculation of Y
11
and Y
21
. b) Calculation of Y
12
and Y
22
.
this circuit we can write:
I
1
= V
1
1
Z
1
and
I
2
= V
1
1
Z
1
= I
1
Hence we can write:
Y
11
=
I
1
V
1

V
2
=0
=
1
Z
1
Y
21
=
I
2
V
1

V
2
=0
=
1
Z
1
Figure 5.7 b) shows the equivalent circuit for the calculation of Y
12
and Y
22
. For this circuit
we can write:
I
2
= V
2
_
1
Z
1
+
1
Z
2
_
I
2
= V
2
(Y
1
+Y
2
)
and
I
1
= V
2
1
Z
1
Hence we can write:
Y
12
=
I
1
V
2

V
1
=0
=
1
Z
1
Y
22
=
I
2
V
2

V
1
=0
= Y
1
+Y
2
Circuit b): Figure 5.8 a) shows the equivalent circuit for the calculation of Y
11
and Y
21
. For
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 87
+

Z
1
Z
2
Z
1
Z
2
V
2
= 0
I
2
I
1
V
1
= 0
V
2
b) a)
I
2
I
1
V
1
Figure 5.8: a) Calculation of Y
11
and Y
21
. b) Calculation of Y
12
and Y
22
.
this circuit we can write:
Y
11
=
I
1
V
1

V
2
=0
= Y
1
+Y
2
Y
21
=
I
2
V
1

V
2
=0
= Y
2
Figure 5.8 b) shows the equivalent circuit for the calculation of Y
12
and Y
22
. For this circuit
we can write:
Y
12
=
I
1
V
2

V
1
=0
= Y
2
Y
22
=
I
2
V
2

V
1
=0
= Y
2
Circuit c): Figure 5.9 a) shows the equivalent circuit for the calculation of Y
11
and Y
21
. For
+

Z
1
Z
3
Z
2
Z
4
Z
1
Z
3
Z
2
Z
4
I
1
V
1
= 0 V
2
= 0
I
2
I
1
V
1
V
2
b)
0 0
a)
V
A
V
B
V
B
I
2
V
A
Figure 5.9: a) Calculation of Y
11
and Y
21
. b) Calculation of Y
12
and Y
22
.
this circuit we can write:
_

_
V
A
V
B
= V
1
V
A
Y
1
+V
A
Y
3
= I
1
V
B
Y
2
V
B
Y
4
= I
1
V
A
Y
1
+V
B
Y
4
= I
2
V
A
Y
3
V
B
Y
2
= I
2
(5.8)
Solving to obtain I
1
and I
2
we get:
I
1
= V
1
(Y
1
+Y
3
) (Y
2
+Y
4
)
Y
1
+Y
3
+Y
2
+Y
4
I
2
= V
1
Y
3
Y
4
Y
2
Y
1
Y
1
+Y
4
+Y
3
+Y
2
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 88
that is
Y
11
=
(Y
1
+Y
3
) (Y
2
+Y
4
)
Y
1
+Y
3
+Y
2
+Y
4
Y
21
=
Y
2
Y
1
Y
3
Y
4
Y
1
+Y
4
+Y
3
+Y
2
Figure 5.9 b) shows the equivalent circuit for the calculation of Y
12
and Y
22
. For this circuit
we can write:
_

_
V
A
V
B
= V
2
V
A
Y
2
+V
A
Y
3
= I
2
V
B
Y
1
V
B
Y
4
= I
2
V
A
Y
2
+V
B
Y
4
= I
1
V
A
Y
3
V
B
Y
1
= I
1
(5.9)
Solving to obtain I
1
and I
2
we get:
I
1
= V
2
Y
3
Y
4
Y
2
Y
1
Y
1
+Y
4
+Y
3
+Y
2
I
2
= V
2
(Y
3
+Y
2
) (Y
1
+Y
4
)
Y
1
+Y
4
+Y
3
+Y
2
that is:
Y
12
=
Y
2
Y
1
Y
3
Y
4
Y
1
+Y
4
+Y
3
+Y
2
Y
22
=
(Y
3
+Y
2
) (Y
1
+Y
4
)
Y
1
+Y
4
+Y
3
+Y
2
Note the symmetrical results as expected.
Circuit d): Figure 5.10 a) shows the equivalent circuit for the calculation of Y
11
and Y
21
. For
a) b)
Z
3
Z
1
Z
3
Z
1
Z
2 Z
2
I
1
V
1
V
2
V
1
= 0
V
2
= 0
I
2
I
1 I
2

+
+

Figure 5.10: a) Calculation of Y


11
and Y
21
. b) Calculation of Y
12
and Y
22
.
this circuit we can write:
I
1
= V
1
(Y
1
+Y
3
)
I
2
= V
1
Y
3
Hence, we can write:
Y
11
=
I
1
V
1

V
2
=0
= Y
1
+Y
3
Y
21
=
I
1
V
1

V
2
=0
= Y
3
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 89
Figure 5.10 b) shows the equivalent circuit for the calculation of Y
12
and Y
22
. For this circuit
we can write:
I
1
= V
2
Y
3
I
2
= V
2
(Y
2
+Y
3
)
Hence, we can write:
Y
12
=
I
1
V
2

V
1
=0
= Y
3
Y
22
=
I
2
V
2

V
1
=0
= Y
2
+Y
3
Circuit e): Figure 5.11 a) shows the equivalent circuit for the calculation of Y
11
and Y
21
. For
+

R
i
R
o
A
fi
I
i
I
2
I
1
= I
i
+

V
1
V
o
= V
2
= 0
R
i
A
rv
V
o
I
2
V
2
+

R
o
V
o

+
V
1
= 0
I
1
= I
i
b)
a)
A
fi
I
i
Figure 5.11: Calculation of: a) Y
11
; b) Y
21
.
this circuit we can write:
V
1
= R
i
I
1
I
2
= A
i
V
1
R
i
Hence we can write:
Y
11
=
I
1
V
1

V
2
=0
=
1
R
i
= 0.33 mS
and
Y
21
=
I
2
V
1

V
2
=0
=
A
fi
R
i
= 33.33 mS
Figure 5.11 b) shows the equivalent circuit for the calculation of Y
12
and Y
22
. For this circuit
we can write:
I
1
=
A
rv
V
2
R
i
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 90
I
2
=
V
2
R
o
+
A
rv
A
fi
V
2
R
i
Hence we can write:
Y
12
=
I
1
V
2

V
1
=0
=
A
rv
R
i
= 33.33 S
and
Y
22
=
I
2
V
2

V
1
=0
=
1
R
o
+
A
rv
A
fi
R
i
= 3.4 mS
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 91
Solution of problem 5.4
Figure 5.12 a) shows the circuit for the calculation of Y
eq
11
and Y
eq
21
. Y
eq
11
can be determined as
follows:
+

+
V
1

I
1
I
2
+

V
2
[Y

] + [Y

]
a)

V

2
I

2
I
2
V

2
I

2
I

1
V

1

I
1
I

1
[Y

]
[Y

]
+

V

1
+
+

+
V
2
V
1
= 0

V

2
I

2
I
2
V

2
I

2
I

1
V

1

I
1
I

1
[Y

]
[Y

]
+

V

1
+
+

+
V
1
+

b)
c)
V
2
= 0
Figure 5.12: a) Calculation of Y
eq
11
and Y
eq
21
. b) Calculation of Y
eq
12
and Y
eq
22
. c) Equivalent
two-port circuit.
Y
eq
11
=
I
1
V
1

V
2
=0
Since port 2 is short-circuited V
2
= V

2
= V

2
= 0. In addition we have V
1
= V

1
= V

1
, I
2
= I

2
+I

2
and I
1
= I

1
+I

1
. Therefore, we can rewrite the last eqn as follows:
Y
eq
11
=
I

1
V

2
=0
+
I

2
=0
= Y

11
+Y

11
and Y
eq
21
can be determined as:
Y
eq
21
=
I
2
V
1

V
2
=0
=
I

2
V

2
=0
+
I

2
V

2
=0
= Y

21
+Y

21
Figure 5.12 b) shows the circuit for the calculation of Y
eq
11
and Y
eq
21
. These can be determined as
follows:
Y
eq
12
=
I
1
V
2

V
1
=0
Y
eq
22
=
I
2
V
2

V
1
=0
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 92
Since port 1 is short-circuited, V
1
= V

1
= V

1
= 0. We also have V
2
= V

2
= V

2
, I
2
= I

2
+I

2
and
I
1
= I

1
+I

1
. Therefore, we can rewrite the last two eqns as follows:
Y
eq
12
=
I

1
V

1
=0
+
I

1
V

1
=0
= Y

12
+Y

21
Y
eq
22
=
I

2
V

1
=0
+
I

2
V

1
=0
= Y

22
+Y

22
From the above we can see that
[Y
eq
] = [Y

] + [Y

]
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 93
Solution of problem 5.5
Circuit a): Figure 5.13 a) shows the equivalent circuit for the calculation of A
11
. For this
Z
1
Z
2
+
I
1
+

V
1
V
2

I
2
= 0
Z
1
Z
2
Z
1
Z
2
+
V
2

a)
I
2
= 0
Z
1
Z
2
I
1
+

V
1
+

V
1
I
1
+

I
1
I
2
I
2
V
2
= 0
V
2
= 0 V
1
b)
c)
d)
Figure 5.13: Calculation of: a) A
11
; b) A
12
; c) A
21
; d) A
22
.
circuit we can write:
V
2
= V
1
Z
2
Z
2
+Z
1
Hence,
A
11
=
V
1
V
2

I
2
=0
=
Z
2
+Z
1
Z
2
Figure 5.13 b) shows the equivalent circuit for the calculation of A
12
. For this circuit we can
write:
V
1
= I
2
Z
1
Hence,
A
12
=
V
1
I
2

V
2
=0
= Z
1
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 94
Figure 5.13 c) shows the equivalent circuit for the calculation of A
21
. For this circuit we can
write:
V
2
= I
1
Z
2
Hence,
A
21
=
I
1
V
2

I
2
=0
=
1
Z
2
Figure 5.13 d) shows the equivalent circuit for the calculation of A
22
. For this circuit we can
write:
I
1
= I
2
Hence,
A
22
=
I
1
I
2

V
2
=0
= 1
Circuit b): Figure 5.14 a) shows the equivalent circuit for the calculation of A
11
. For this
Z
1
Z
2
I
1
a)
b)
c)
d)
V
1 V
2
+

V
1
+

V
1 V
2
+

V
1
I
1
+

I
2
I
2
= 0
I
2
I
1
I
1
I
2
= 0
Z
1
Z
2
Z
1
Z
2
Z
1
Z
2
V
2
= 0
V
2
= 0
Figure 5.14: Calculation of: a) A
11
; b) A
12
; c) A
21
; d) A
22
.
circuit we write:
V
1
= V
2
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 95
that is:
A
11
=
V
1
V
2

I
2
=0
= 1
Figure 5.14 b) shows the equivalent circuit for the calculation of A
12
. For this circuit we can
write:
V
1
= I
2
Z
2
Hence,
A
12
=
V
1
I
2

V
2
=0
= Z
2
Figure 5.14 c) shows the equivalent circuit for the calculation of A
21
. For this circuit, since
I
2
= 0, we can write:
V
2
= I
1
Z
1
Hence,
A
21
=
I
1
V
2

I
2
=0
=
1
Z
1
Figure 5.14 d) shows the equivalent circuit for the calculation of A
22
. For this circuit we can
write:
I
2
= I
1
Z
1
Z
1
+Z
2
Hence,
A
22
=
I
1
I
2

V
2
=0
=
Z
1
+Z
2
Z
1
Circuit c): Figure 5.15 a) shows the equivalent circuit for the calculation of A
11
. For this
circuit we can write the following set of eqns:
_

_
V
1
= V
A
V
B
I
Z
3
= I
Z
2
I
Z
1
= I
Z
4
(5.10)
that is
_

_
V
1
= V
A
V
B
V
A
V
2
Z
3
=
V
2
V
B
Z
2
V
A
Z
1
=
V
B
Z
4
(5.11)
Solving to obtain V
1
we get
V
1
= V
2
(Z
2
+Z
3
) (Z
1
+Z
4
)
Z
2
Z
1
Z
3
Z
4
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 96
I
1
Z
3
Z
4
+

V
1
+
V
2

Z
1 Z
2
I
Z2
I
Z1
I
Z4
I
Z3
I
2
= 0
Z
3
Z
4
Z
1 Z
2
I
Z2
I
Z1
I
Z4
Z
3
Z
4
+
V
2

Z
1 Z
2
a)
I
Z2
I
Z1
I
Z4
I
2
= 0
I
1
Z
3
Z
4
+

V
1
+

Z
1 Z
2
I
Z2
I
Z1
I
Z4
I
Z3
+

I
1
I
1
V
1
V
1
+

I
2
V
2
= 0
I
2
c)
d)
b)
I
Z3
V
A
0
I
Z3
V
A
V
A
V
A
V
B
V
2
= 0
0
0
0 V
B
V
B
V
B
Figure 5.15: Calculation of: a) A
11
; b) A
12
; c) A
21
; d) A
22
.
that is:
A
11
=
V
1
V
2

I
2
=0
=
(Z
2
+Z
3
) (Z
1
+Z
4
)
Z
2
Z
1
Z
3
Z
4
Figure 5.15 b) shows the equivalent circuit for the calculation of A
12
. For this circuit we can
write the following set of eqns:
_

_
V
1
= V
A
V
B
I
Z
3
I
Z
2
= I
2
I
Z
4
I
Z
1
= I
2
(5.12)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 97
that is
_

_
V
1
= V
A
V
B
V
A
Z
3
+
V
B
Z
2
= I
2

V
B
Z
4

V
A
Z
1
= I
2
(5.13)
Solving to obtain V
1
we get
V
1
= I
2
Z
1
Z
3
Z
4
+Z
1
Z
3
Z
2
+Z
1
Z
4
Z
2
+Z
3
Z
4
Z
2
Z
3
Z
4
Z
2
Z
1
that is:
A
12
=
V
1
I
2

V
2
=0
=
Z
1
Z
3
Z
4
+Z
1
Z
3
Z
2
+Z
1
Z
4
Z
2
+Z
3
Z
4
Z
2
Z
2
Z
1
Z
3
Z
4
Figure 5.15 c) shows the equivalent circuit for the calculation of A
21
. For this circuit we can
write:
_

_
I
1
= I
Z
3
+I
Z
1
I
1
= I
Z
2
+I
Z
4
I
Z
3
= I
Z
2
(5.14)
that is
_

_
I
1
=
V
A
V
2
Z
3
+
V
A
Z
1
I
1
=
V
2
V
B
Z
2

V
B
Z
4
V
A
V
2
Z
3
=
V
2
V
B
Z
2
(5.15)
Solving to obtain I
1
we get
I
1
= V
2
Z
1
+Z
4
+Z
2
+Z
3
Z
2
Z
1
Z
3
Z
4
and
A
21
=
I
1
V
2

I
2
=0
=
Z
1
+Z
4
+Z
2
+Z
3
Z
2
Z
1
Z
3
Z
4
Figure 5.15 d) shows the equivalent circuit for the calculation of A
22
. For this circuit we can
write:
_

_
I
1
= I
Z
3
+I
Z
1
I
1
= I
Z
2
+I
Z
4
I
2
= I
Z
3
I
Z
2
(5.16)
that is
_

_
I
1
=
V
A
Z
3
+
V
A
Z
1
I
1
=
V
B
Z
2

V
B
Z
4
I
2
=
V
A
Z
3
+
V
B
Z
2
(5.17)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 98
Solving to obtain I
1
we can write
I
1
= I
2
(Z
1
+Z
3
)(Z
4
+Z
2
)
Z
3
Z
4
Z
2
Z
1
and nally,
A
22
=
I
1
I
2

V
2
=0
=
(Z
1
+Z
3
)(Z
4
+Z
2
)
Z
2
Z
1
Z
3
Z
4
Circuit d): Figure 5.16 a) shows the equivalent circuit for the calculation of A
11
. For this
a)
Z
3
Z
1
+
Z
2
V
2

I
2
= 0
Z
3
Z
1
Z
2
Z
3
Z
1

+
V
1
+
Z
2
V
2

I
2
= 0
I
1
Z
3
Z
1

+
V
1
Z
2
I
1
I
1
I
1
+
V
1

+
V
1
V
2
= 0
I
2
I
2
V
2
= 0
b)
c)
d)
Figure 5.16: Calculation of: a) A
11
; b) A
12
; c) A
21
; d) A
22
.
circuit we can write:
V
2
= V
1
Z
2
Z
2
+Z
3
that is
A
11
=
V
1
V
2

I
2
=0
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 99
=
Z
2
Z
2
+Z
3
Figure 5.16 b) shows the equivalent circuit for the calculation of A
12
. For this circuit we can
write:
V
1
= I
2
Z
3
that is:
A
12
=
V
1
I
2

V
2
=0
= Z
3
Figure 5.16 c) shows the equivalent circuit for the calculation of A
21
. For this circuit we can
write:
V
2
= I
1
Z
2
Z
1
Z
1
+Z
2
+Z
3
that is:
A
21
=
I
1
V
2

I
2
=0
=
Z
1
+Z
2
+Z
3
Z
2
Z
1
Figure 5.16 d) shows the equivalent circuit for the calculation of A
22
. For this circuit we can
write:
I
2
= I
1
Z
1
Z
1
+Z
3
that is
A
22
=
I
1
I
2

V
2
=0
=
Z
1
+Z
3
Z
1
Circuit e): Figure 5.17 a) shows the equivalent circuit for the calculation of A
11
. For this
circuit we can write:
V
2
= A
fi
I
i
R
o
I
1
= I
i
=
V
1
A
rv
V
2
R
i
Hence we can write V
2
as follows:
V
2
= A
fi
R
o
V
1
A
rv
V
2
R
i
that is
V
2
= V
1
A
fi
R
o
R
i
+A
rv
A
fi
R
o
and
A
11
=
V
1
V
2

I
2
=0
=
_
A
fi
R
o
R
i
+A
rv
A
fi
R
o
_
1
= 0.1
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 100
+

I
1
+

I
1
I
i
R
i
R
o
A
fi
I
i
I
i
R
i
A
rv
V
o
R
o
A
fi
I
i
I
2
= 0
+
V
o
= V
2

+
V
1
I
i
R
i
A
rv
V
o
R
o
A
fi
I
i
I
2
= 0
+
V
o
= V
2

a)
I
1
I
1
+

+
V
1
V
1
I
i
R
i
R
o
A
fi
I
i

+
V
1
V
o
= V
2
= 0
I
2
I
2
V
o
= V
2
= 0
b)
c)
d)
Figure 5.17: Calculation of: a) A
11
; b) A
12
; c) A
21
; d) A
22
.
Figure 5.17 b) shows the equivalent circuit for the calculation of A
11
. Note that since V
o
=
V
2
= 0, the voltage controlled-current source is replaced by a short-circuit. For this circuit we
can write:
I
2
= A
fi
I
i
= A
fi
V
1
R
i
that is
A
12
=
V
1
I
2

V
2
=0
=
R
i
A
fi
= 30
Figure 5.17 c) shows the equivalent circuit for the calculation of A
21
. For this circuit we can
write:
V
2
= A
fi
I
1
R
o
and
A
21
=
I
1
V
2

I
2
=0
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 101
= (A
fi
R
o
)
1
= 1 S
Figure 5.17 c) shows the equivalent circuit for the calculation of A
21
. For this circuit we can
write:
A
22
=
I
1
I
2

V
2
=0
=
1
A
fi
= 0.01
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 102
Solution of problem 5.6
The chain parameters for each two port circuit of gure 5.18 satisfy the following eqns:
V

1
= A

11
V

2
A

12
I

2
(5.18)
I

1
= A

21
V

2
A

22
I

2
(5.19)
and
V

1
= A

11
V

2
A

12
I

2
(5.20)
I

1
= A

21
V

2
A

22
I

2
(5.21)
Figure 5.18 a) shows the circuit for the calculation of A
eq
11
which is given by
A
eq
11
=
V
1
V
2

I
2
=0
(5.22)
Using eqn 5.18 and since V
1
= V

1
, V

2
= V

1
, V
2
= V

2
and I

2
= I

1
we can write eqn 5.22 as
follows:
A
eq
11
= A

11
V

1
V

2
=0
+A

12
I

1
V

2
=0
(5.23)
that is:

V

2
+ + +

+
I
1
= I

1 I

2
I

1
[A

] V

1
I
2
= I

2
V

1
[A

] V

2
+

+
V
1

I
1
I
2
+

V
2 [A

] [A

]

V

2
+ + +

+
I
1
= I

1 I

2
I

1
[A

] V

1
I
2
= I

2
V

1
[A

] V

2

V

2
+ + +

+
I
1
= I

1 I

2
I

1
[A

] V

1
I
2
= I

2
V

1
[A

] V

2

V

2
+ + +

+
I
1
= I

1 I

2
I

1
[A

] V

1
I
2
= I

2
V

1
[A

] V

2
V
1
V
1
I
1
I
1
a)
b)
c)
d)
e)
Figure 5.18: a) Calculation of A
eq
11
. b) Calculation of Y
eq
21
. c) Calculation of Y
eq
12
. d) Y
eq
22
. e)
Equivalent two-port circuit.
A
eq
11
= A

11
A

11
+A

12
A

21
Figure 5.18 b) shows the circuit for the calculation of A
eq
12
which is given by
A
eq
12
=
V
1
I
2

V
2
=0
(5.24)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 103
Using again the result of eqn 5.18 and since V
1
= V

1
, V

2
= V

1
, V
2
= V

2
= 0 and I

2
= I

1
we
can write eqn 5.24 as follows:
A
eq
12
= A

11
V

1
I

2
=0
+A

12
I

1
I

2
=0
= A

11
A

12
+A

12
A

22
Figure 5.18 c) shows the circuit for the calculation of A
eq
21
which is given by
A
eq
21
=
I
1
V
2

I
2
=0
(5.25)
Using the result of eqn 5.19 and since V
1
= V

1
, I
1
= I

1
, V

2
= V

1
, I
2
= I

2
= 0 and I

2
= I

1
we
can write eqn 5.25 as follows:
A
eq
21
= A

21
V

1
V

2
=0
+A

22
I

1
V

2
=0
= A

21
A

11
+A

22
A

21
Figure 5.18 d) shows the circuit for the calculation of A
eq
22
which is given by
A
eq
22
=
I
1
I
2

V
2
=0
(5.26)
Using the result of eqn 5.19 and since V
1
= V

1
, I
1
= I

1
, V

2
= V

1
, V
2
= V

2
= 0 and I

2
= I

1
we can write eqn 5.26 as follows:
A
eq
22
= A

21
V

1
I

2
=0
+A

22
I

1
I

2
=0
= A

21
A

12
+A

22
A

22
From the above we get:
[A
eq
] = [A

] [A

] (5.27)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 104
Solution of problem 5.7
[V ] = [Z] [I]
Using elementary matrix algebra we can solve the last eqn to obtain [Y ]
[Y ] = [Z]
1
[V ]
that is [Y ] = [Z]
1
.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 105
Solution of problem 5.8
+

+
V
1
= 0
V
1
V
2
Y
f Y
f
I
1 I
2 I
2
I
1
a) b)
V
2
= 0
Figure 5.19: a) Calculation of Y
11
and Y
21
. b) Calculation of Y
12
and Y
22
.
Figure 5.19 a) shows the equivalent circuit for the calculation of Y
11
and Y
21
Y
11
=
I
1
V
1

V
2
=0
= Y
f
Y
21
=
I
2
V
1

V
2
=0
= Y
f
Figure 5.19 b) shows the equivalent circuit for the calculation of Y
12
and Y
22
Y
12
=
I
1
V
2

V
1
=0
= Y
f
Y
22
=
I
2
V
2

V
1
=0
= Y
f
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 106
Solution of problem 5.9
+

I
1
I
2
I

1
= 0
V
2
[Y
a
]
b)
I

2 I

1
[Y

M
]
a)
V
1
I
1
I
2
I

2
[Y
a
]
I

1
[Y

M
]
I

1
Y
1
Y
1
Y
2
Y
2
I

2
I

2
= 0
Figure 5.20: a) Calculation of Y
M
11
and Y
M
21
. b) Calculation of Y
M
12
and Y
M
22
.
Figure 5.20 a) shows the equivalent circuit for the calculation of Y
M
11
and Y
M
12
. Y
M
11
is given by;
Y
M
11
=
I

1
V
1

V
2
=0
=
I
1
+I

1
V
1

V
2
=0
=
I
1
+Y
1
V
1
V
1

V
2
=0
=
I
1
V
1

V
2
=0
+Y
1
= Y
a
11
+Y
1
Y
M
21
is given by;
Y
M
21
=
I

2
V
1

V
2
=0
=
I
2
V
1

V
2
=0
= Y
a
21
= 0
Figure 5.20 b) shows the equivalent circuit for the calculation of Y
M
12
and Y
M
22
. Y
M
12
is given by;
Y
M
12
=
I

1
V
2

V
1
=0
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 107
=
I
1
V
2

V
2
=0
= Y
a
21
Y
M
22
is given by;
Y
M
22
=
I

2
V
2

V
1
=0
=
I
2
+I

2
V
2

V
2
=0
= Y
a
22
+Y
2
Since Y
1
= Y
f
(1 A
v
) and Y
2
= Y
f

Y
f
A
v
we can write
_
Y

as indicated below:
_
Y

=
_
_
Y
a
11
+Y
f
(1 A
v
) 0
Y
a
21
Y
a
22
+Y
f

Y
f
A
v
_
_
(5.28)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 108
Solution of problem 5.10
The chain parameters can be dened by the set of eqns indicated below:
_
_
_
V
1
= A
11
V
2
A
12
I
2
I
1
= A
21
V
2
A
22
I
2
(5.29)
while the Y parameters can be dened by the following set of eqns:
_
_
_
I
1
= Y
11
V
1
+Y
12
V
2
I
2
= Y
21
V
1
+Y
22
V
2
(5.30)
Solving the rst eqn of 5.29 in order to obtain I
2
we have:
I
2
=
1
A
12
V
1
+
A
11
A
12
V
2
(5.31)
Using the expression for I
2
, given by this last eqn, on the second eqn of 5.29 we obtain:
I
1
= A
21
V
2
A
22
_
1
A
12
V
1
+
A
11
A
12
V
2
_
=
A
22
A
12
V
1
+
_
A
21

A
22
A
11
A
12
_
V
2
(5.32)
Comparing eqns 5.31 and 5.32 with the set of eqns dened by 5.30 we can write:
Y
11
=
A
22
A
12
Y
12
=
_
A
21

A
22
A
11
A
12
_
Y
21
=
1
A
12
Y
22
=
A
11
A
12
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 109
Solution of problem 5.11
Circuit a):
+

a)
Ri
+

V
o
+

g
m
V
i
+
V
i

R
o
+

g
m
V
i
+
V
i
R
o
g
m
V
i
b)
c)
+
V
i

R
o
g
m
V
i
Ri
V
o
= V
2
= 0
I
o
= I
2
V
o
= V
2
I
o
= I
2
= 0
V
2
I
o
= I
2 I
s
= I
1
V
s
= V
1
= 0
+
V
i

R
o
+

g
m
V
i
V
s
+

Ri
I
s
= I
1
I
o
= I
2
= 0
V
o
= V
2
I
s
= I
1
V
1
V
s
Ri
+

V
1
I
o
= I
2
I
s
= I
1
V
s

+
+
V
s

Ri
V
o
= V
2
= 0

I
s
= I
1
e)
d)
R
o
Z =
(Y = 0)
V
i
= 0
Figure 5.21: Calculation of: a) Z
11
and A
21
; b) Y
22
; c) A
11
; d) A
22
; e) A
12
.
1. The input impedance (I
o
= 0) corresponds to Z
11
. Figure 5.21 a) shows the equivalent
circuit for the calculation of Z
11
.
Z
11
=
V
1
I
1

I
2
=0
= R
i
= 2.5 k
2. The output impedance (V
s
= 0) corresponds to (Y
22
)
1
. Figure 5.21 b) shows the
equivalent circuit for the calculation of Y
22
Y
22
=
I
2
V
2

V
1
=0
=
1
R
o
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 110
Thus, the output impedance is R
o
= 10 k.
3. The voltage gain V
o
/V
s
(I
o
= 0) corresponds to (A
11
)
1
. Figure 5.21 c) shows the
equivalent circuit for the calculation of A
11
A
11
=
V
1
V
2

I
2
=0
=
V
1
g
m
V
1
R
o
=
1
g
m
R
o
Thus, the voltage gain is g
m
R
o
= 400.
4. The current gain I
o
/I
s
(V
o
= 0) corresponds to (A
22
)
1
. Figure 5.21 d) shows the
equivalent circuit for the calculation of A
22
.
A
22
=
I
1
I
2

V
2
=0
=
V
1
R
i
g
m
V
1
=
1
g
m
R
i
Thus, the current gain is g
m
R
i
= 100.
5. The transimpedance gain V
o
/I
s
(V
o
= 0) corresponds to (A
21
)
1
. Figure 5.21 a) shows
the equivalent circuit for the calculation of A
21
.
A
21
=
I
1
V
2

I
2
=0
=
V
1
R
i
g
m
V
1
R
o
=
1
g
m
R
i
R
o
The transimpedance gain is g
m
R
i
R
o
= 1 M.
6. The transconductance gain I
o
/V
s
(V
o
= 0) corresponds to (A
12
)
1
. Figure 5.21 e)
shows the equivalent circuit for the calculation of A
12
.
A
12
=
V
1
I
2

V
2
=0
=
V
1
g
m
V
1
=
1
g
m
The transconductance gain is g
m
= 40 mS.
Circuit b):
1. The input impedance (I
o
= 0) corresponds to Z
11
. Figure 5.22 a) shows the equivalent
circuit for the calculation of Z
11
. For this circuit we can write:
I
1
=
V
1
R
i
g
m
V
i
= V
1
1 +g
m
R
i
R
i
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 111
c)
d)
e)
+

g
m
V
i
+
V
o

R
o
+

g
m
V
i
R
o
Ri
+
V
i

g
m
V
i
+

R
o
V
s
= V
1
= 0
V
2
+
V
o
+

Ri
+
V
i

g
m
V
i
R
o
+

+
V
i

g
m
V
i
R
o
I
o
= I
2
I
s
= I
1
I
o
= I
2
I
o
= I
2
I
s
= I
1
I
s
I
1
Ri
+

Ri

+
I
s
I
1
V
o
= V
2
= 0
V
o
= V
2
= 0
I
o
= I
2
= 0
V
o
= V
2
I
o
= I
2
= 0
I
s
= I
1
V
1
V
1
+
Ri

V
1
V
s
V
1
V
1
V
i
V
i
= 0

Z =
a)
b)
Figure 5.22: Calculation of: a) Z
11
and A
21
; b) Y
22
; c) A
11
; d) A
22
; e) A
12
.
Z
11
=
V
1
I
1

I
2
=0
=
R
i
1 +g
m
R
i
= 24.8
2. The output impedance (V
s
= 0) corresponds to (Y
22
)
1
. Figure 5.22 b) shows the
equivalent circuit for the calculation of Y
22
.
Y
22
=
I
2
V
2

V
1
=0
=
1
R
o
Thus, the output impedance is R
o
= 10 k.
3. The voltage gain V
o
/V
s
(I
o
= 0) corresponds to (A
11
)
1
. Figure 5.22 c) shows the
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 112
equivalent circuit for the calculation of A
11
.
A
11
=
V
1
V
2

I
2
=0
=
V
i
g
m
V
i
R
o
=
1
g
m
R
o
Thus, the voltage gain is g
m
R
o
= 400.
4. The current gain I
o
/I
s
(V
o
= 0) corresponds to (A
22
)
1
. Figure 5.22 d) shows the
equivalent circuit for the calculation of A
22
.
A
22
=
I
1
I
2

V
2
=0
=
V
1
R
i
g
m
V
i
g
m
V
i
=
V
1
1+g
m
R
i
R
i
g
m
V
1
=
1 +g
m
R
i
g
m
R
i
Thus, the current gain is 0.99.
5. The transimpedance gain V
o
/I
s
(V
o
= 0) corresponds to (A
21
)
1
. Figure 5.22 a) shows
the equivalent circuit for the calculation of A
21
.
A
21
=
I
1
V
2

I
2
=0
=
V
1
1+g
m
R
i
R
i
g
m
V
1
R
o
=
1 +g
m
R
i
g
m
R
i
R
o
The transimpedance gain is 9.9 k.
6. The transconductance gain I
o
/V
s
(V
o
= 0) corresponds to (A
12
)
1
. Figure 5.22 e)
shows the equivalent circuit for the calculation of A
12
.
A
12
=
V
1
I
2

V
2
=0
=
V
1
g
m
V
1
=
1
g
m
The transconductance gain is g
m
= 40 mS.
Circuit c):
1. The input impedance (I
o
= 0) corresponds to Z
11
. Figure 5.23 a) shows the equivalent
circuit for the calculation of Z
11
. For this circuit we can write:
I
1
=
V
i
R
i
V
2
= R
o

_
g
m
V
i
+
V
i
R
i
_
V
1
= V
i
+V
o
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 113
a)
b)
c)
d)
e)
R
i
I
s
V
i

g
m
V
i
+

R
i
V
i

+

R
i
V
i

g
m
V
i

R
i
V
i

g
m
V
i
R
i
V
i

g
m
V
i
I
o
= I
2
= 0
I
o
= I
2
I
o
= I
2
= 0
V
o
= V
2
V
o
= V
2
V
s
= V
1
= 0
+

+
+
+
+
+
+
+

+
I
1
+
+ I
1
I
o
= I
2
I
o
= I
2
V
2
V
o
= V
2
= 0
V
o
= V
2
= 0
R
o
R
o
R
o
R
o
R
o
I
s
I
s
= I
1
I
s
= I
1
I
s
= I
1
V
1
= V
s
V
s
V
1
V
1
= V
s
V
1
V
s
g
m
V
i
+

V
o
Figure 5.23: Calculation of: a) Z
11
and A
21
; b) Y
22
; c) A
11
; d) A
22
; e) A
12
.
and
Z
11
=
V
1
I
1

I
2
=0
= R
i
+R
o
(1 +g
m
R
i
)
= 1.013 M
2. The output impedance (V
s
= 0) corresponds to (Y
22
)
1
. Figure 5.23 b) shows the
equivalent circuit for the calculation of Y
22
.
Y
22
=
I
2
V
2

V
1
=0
=
g
m
V
2
+
V
2
R
o
+
V
2
R
i
V
2
=
g
m
R
o
R
i
+R
o
+R
i
R
o
R
i
Thus, the output impedance is 24.7 .
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 114
3. The voltage gain V
o
/V
s
(I
o
= 0) corresponds to (A
11
)
1
. Figure 5.23 c) shows the
equivalent circuit for the calculation of A
11
.
A
11
=
V
1
V
2

I
2
=0
=
V
i
+V
o
V
o
=
V
i
+R
o

_
g
m
V
i
+
V
i
R
i
_
R
o

_
g
m
V
i
+
V
i
R
i
_
=
R
i
+R
o
(1 +g
m
R
i
)
R
o
(1 +g
m
R
i
)
Thus, the voltage gain is 0.998.
4. The current gain I
o
/I
s
(V
o
= 0) corresponds to (A
22
)
1
. Figure 5.23 d) shows the
equivalent circuit for the calculation of A
22
.
A
22
=
I
1
I
2

V
2
=0
=
V
i
R
i
g
m
V
i
+
V
i
R
i
=
1
1 +g
m
R
i
Thus, the current gain is 101.
5. The transimpedance gain V
o
/I
s
(V
o
= 0) corresponds to (A
21
)
1
. Figure 5.23 a) shows
the equivalent circuit for the calculation of A
21
.
A
21
=
I
1
V
2

I
2
=0
=
V
i
R
i
R
o

_
g
m
V
i
+
V
i
R
i
_
=
1
R
o
(1 +g
m
R
i
)
The transimpedance gain is 1.01 M.
6. The transconductance gain I
o
/V
s
(V
o
= 0) corresponds to (A
12
)
1
. Figure 5.23 e)
shows the equivalent circuit for the calculation of A
12
.
A
12
=
V
1
I
2

V
2
=0
=
V
i
g
m
V
i
+
V
i
R
i
=
R
i
g
m
R
i
+ 1
The transconductance gain is 40.4 mS.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 115
Solution of problem 5.12
+
V
s

R
o +
V
o

R
f
1 A
va

V
i
+
R
i R
s
I
s

V
o

+
R
o
R
i

V
s
+
R
f
Two-port circuit a
a)
b)
g
m
V
i
g
m
V
i
R
s
+

V
i
R
f
A
va
A
va
1
Figure 5.24: a) Two-port network a) application of Millers theorem.
The two-port network a indicated in gure 5.24 a) (not including R
s
and R
f
) can be characterised
by an admittance representation given by
Y
11
=
1
R
i
= 0.2 mS
Y
12
= 0
Y
21
= g
m
= 40 mS
Y
22
=
1
R
o
= 0.2 mS
and Y
f
= 1/R
f
= 0.02 mS. Since [Y
21
[ >> [Y
f
[ and [Y
22
[ >> [Y
f
[ we can write:
A
v
a

Y
21
Y
22
= 200
Figure 5.24 b) shows the circuit resulting from the application of Millers theorem. The input
impedance and the voltage gain V
o
/V
s
can be obtained assuming that a voltage source V
s
is ap-
plied to the circuit. The input impedance R
in
is given by:
R
in
=
V
s
I
s
= R
s
+
_
R
f
1 A
v
a
[[ R
i
_
= 309.4
In order to calculate the voltage gain we can write
V
o
= g
m
V
i
_
R
f
A
v
a
A
v
a
1
[[ R
o
_
and
V
i
= V
s
_
R
f
1A
v
a
[[ R
i
_
_
R
f
1A
v
a
[[ R
i
_
+R
s
The voltage gain can be obtained as follows
A
V
=
V
o
V
s
=
V
o
V
i

V
i
V
s
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 116
= g
m
_
R
f
A
v
a
A
v
a
1
[[ R
o
_

_
R
f
1A
v
a
[[ R
i
_
_
R
f
1A
v
a
[[ R
i
_
+R
s
= 122.4
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 117
Solution of problem 5.13
+

V
o
R
o
Two-port circuit f
Two-port circuit a
Two-port circuit s
R
s
V
s R
i
V
i

+
g
m
V
i
R
f

+
Figure 5.25: Two-port network
Figure 5.25 shows the circuit of the previous problem as an interconnection of two-ports. The two-
port networks a and f can be characterised by admittance parameters as follows:
[Y
a
] =
_
_
1
R
i
0
g
m
1
R
o
_
_
(5.33)
[Y
f
] =
_
_
1
R
f
1
R
f
1
R
f
1
R
f
_
_
(5.34)
The parallel connection of the two-port network a with the two-port network f is given by the
sum of [Y
a
] with [Y
f
] that is
[Y
a+f
] =
_
_
1
R
i
+
1
R
f

1
R
f
g
m

1
R
f
1
R
o
+
1
R
f
_
_
(5.35)
Converting [Y
a+f
] to a chain representation we get:
[A
a+f
] =
_

_
R
f
+R
o
R
o
(1g
m
R
f
)
R
f
1g
m
R
f
R
f
+R
p
+R
i
(1+g
m
R
o
)
R
i
R
o
(1g
m
R
f
)
R
f
+R
i
R
i
(1g
m
R
f
)
_

_ (5.36)
The two-port networks s can be characterised by a chain representation as follows:
[A
s
] =
_
_
1 R
s
0 1
_
_
(5.37)
The two-port network can be characterised by an equivalent chain representation given by:
[A
eq
] = [A
s
] [A
a+f
]
The voltage gain can now be obtained as follows:
A
V
=
1
A
eq
11
= 125.8
Introduction to linear circuit analysis and modelling Moura and Darwazeh
5. Electrical two-port network analysis 118
and the input impedance can be obtained (see table in appendix C) as follows:
R
in
= Z
eq
11
=
A
eq
11
A
eq
21
= 329
Comparing these values with those obtained in the previous problemwe conclude that the application
of Millers theorem introduces an error of about 6% in the calculation of the input impedance and an
error of 2.8% in the calculation of the voltage gain. These errors are relatively small and it should
be noticed that the application of Millers theorem leads to simpler calculations.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
Chapter 6
Basic electronic amplier building
blocks
Solution of problem 6.1
The gain of a non-inverter amplier is
A
v
=
R
2
R
1
+ 1
For a gain of 20 we have that R
2
= 19 R
1
. Choosing R
1
= 1 k we obtain R
2
= 19 k.
+

v
s
+

v
o
R
1
R
2
Figure 6.1: Non-inverter amplier.
6. Basic electronic amplier building blocks 120
Solution of problem 6.2
The voltage gain is
A
v
=
R
2
R
1
= 5
The input impedance is R
1
= 1 k.
+

v
o
v
s
R
2
R
1
Figure 6.2: Inverting amplier.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 121
Solution of problem 6.3
This circuit can be implemented with an inverting amplier with R
2
= R
1
. We can choose R
2
=
R
1
= 1 k.
+

v
o
v
s
R
2
R
1
Figure 6.3: Inverting amplier.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 122
Solution of problem 6.4
Figure 6.4 shows the circuit designed with R = 1 k. Note that v

o
= (v
i1
+ v
i2
+ v
i3
), since
all resistances are equal. The second op-amp with two equal resistances, also chosen as R = 1 k,
implements an amplier with a voltage gain of 1 such that v
o
= v

o
= v
i1
+v
i2
+v
i3
.
+

v
i3
R
R
v
i2
v
i1
R
R
R
R
v
o
v

o
Figure 6.4: Adder amplier.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 123
Solution of problem 6.5
V
o
=
R
2
R
1

2 R
3
+R
4
R
4
(v
sb
v
sa
)
= 3 (v
sb
v
sa
)
+
v
o
v

v
sb
v
sa
v
a
v
b
v
sa
v
sb
R
3
R
3
R
4
R
1
R
1
R
2
+
R
2
+
+
+

Figure 6.5: Instrumentation amplier.


Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 124
Solution of problem 6.6
+

vs
v
in
R
s
v
o
+

a)
b)
R

L
vs
v
in
R
s
R
L
v
o
R
B
R
C
+


Y
r

L
g
m
v

g
m
v

Figure 6.6: a) Common-emitter small-signal equivalent amplier for the mid and high-frequency
ranges. b) Equivalent representation.
Figure 6.6 b) shows the common-emitter small-signal equivalent amplier for the mid and high-
frequency ranges. Using the nodal analysis method we can write:
(v
s
v

) Y
s
= v

(Y

+j C

) + (v

v
o
)j C

(6.1)
(v

v
o
)j C

= g
m
v

+
v
o
R

L
(6.2)
with
Y

=
1
R
B
+
1
r

Y
s
=
1
R
s
R

L
= R
L
[[R
C
Equation 6.1 can be rewritten as follows:
v
s
Y
s
= v

(Y

+j C

) + (v

v
o
)j C

(6.3)
with
Y

=
1
R
s
+
1
R
B
+
1
r

Solving the set of eqns given by 6.2 and 6.3 to obtain the voltage transfer function, v
o
/v
s
, we get:
A
v
=
Y
s
R

L
(j C

g
m
)
Y

(1 +j R

L
C

) +j [C

+C

(1 +g
m
R

L
)]
2
C

L
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 125
Solution of problem 6.7
R
s
+

g
m
v

v
o
R
C
C

+ C

(1 A
vBC
)
R
B
(R
1
||R
2
)
R
L
R
s
+

g
m
v

v
o
R
C
R
B
(R
1
||R
2
)
R
L
v

= 0
r

a)
Z
C

Av
BC
Av
BC
1
C

b)
v

Figure 6.7: Calculation of the high-frequency time constants.


Figure 6.7 a) shows the equivalent circuit to calculate the equivalent resistance at the terminals of
C

+C

(1+g
m
R

L
). Note that the voltage source v
s
is replaced by a short-circuit. From this circuit
it is clear that this resistance is
R
eq
1
= R
s
[[R
B
[[r

Figure 6.7 b) shows the equivalent circuit to calculate the equivalent resistance at the terminals of
C

. Again the voltage source v


s
is replaced by a short-circuit. Since v

= 0 the voltage controlled


current source is effectively an open-circuit. Hence, we have:
R
eq
1
= R
L
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 126
Solution of problem 6.8
The current gain is given by:
i
c
i
b

g
m
r

1 +j (C

+C

) r

T
= 2 f
T
is the frequency for which the current gain is unity,

i
c
i
b

= 1 (0 dB)
that is:
g
m
r

_
1 + (
T
(C

+C

) r

)
2
= 1
1 +r
2

(C

+C

)
2

2
T
= (g
m
r

)
2

2
T
=
(g
m
r

)
2
1
r
2

(C

+C

)
2
Since g
m
r

>> 1 we can write:

T

g
m
r

(C

+C

)
=
g
m
C

+C

Introduction to linear circuit analysis and modelling Moura and Darwazeh


6. Basic electronic amplier building blocks 127
Solution of problem 6.9
Figure 6.8 shows the equivalent circuit for the calculation of the f
T
for FETs. For this circuit we can
g
m
v
gs
i
d
C
gd
C
gs
i
g
r
o v
gs

+
Figure 6.8: Calculation of the f
T
for FETs.
write:
i
g
= j C
gs
v
gs
+j C
gd
v
gs
i
d
= g
m
v
gs
j C
gd
v
gs
Note that the voltage across C
gd
is v
gs
. This is because the drain is short-circuited to the source.
Solving this set of eqns we obtain:
i
d
i
d
=
g
m
j C
gd
j (C
gd
+C
gs
)
For the range of frequencies for which this model is valid we have that g
m
>> C
gd
. Hence, we
can write:
i
d
i
d

g
m
j (C
gd
+C
gs
)
and the frequency
T
= 2 f
T
for which we have:

i
d
i
d

= 1
is

T
=
g
m
C
gd
+C
gs
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 128
Solution of problem 6.10
DC analysis: Figure 6.9 shows the equivalent circuit for DC analysis. Since the gate current
V
CC
V
S
V
D
I
D
I
D
V
G
R
D
R
S
R
1
R
2
Figure 6.9: Circuit for DC analysis.
is zero we can write:
V
G
= V
CC
R
2
R
2
+R
1
= 2 V
Assuming that the transistor operates in the saturation region, the drain (and the source) current
is given by
I
D
=
1
2
k
n
W
L
(V
GS
V
Th
)
2
(6.4)
and V
GS
can be written as
V
GS
= V
G
V
S
= V
G
R
S
I
D
Now eqn 6.4 can be written as
I
D
=
1
2
k
n
W
L
(V
G
R
S
I
D
V
Th
)
2
(6.5)
Solving we obtain
_

_
I
D
= 1.5 mA and V
GS
= 1.85 V
or
I
D
= 68.5 mA and V
GS
= 4.9 V
(6.6)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 129
Clearly, the second pair of solutions is not valid since V
GS
< V
Th
. Hence we have I
D
= 1.5
mA and V
GS
= 1.85 V. Note that V
DS
= 5.8 V is greater than V
GS
V
Th
= 0.85 V. Thus,
the FET operates in the saturation region as assumed previously.
Mid frequency range AC analysis: Figure 6.10 shows the equivalent circuit for AC analysis.
g
m
v
gs
+

r
o
||R
L
||R
D
v
o

+
v
gs
R
s
v
s
R
G
Figure 6.10: Circuit for AC analysis.
We can write the voltage gain as
A
v
=
v
o
v
s
=
v
o
v
gs

v
gs
v
s
= g
m
(r
o
[[R
L
[[R
D
)
R
G
R
G
+R
s
with R
G
= R
1
[[R
2
= 16 k. g
m
and r
o
are given by
g
m
=
2 I
D
V
GS
V
Th
= 3.5 mA/V
r
o
=
V
A
I
D
= 53 k
Hence, the voltage gain is calculated to be 7.7.
Low-frequency cut-off frequency: Figure 6.11 shows the equivalent circuit for the calculation
of the time constants associated with each DC blocking (AC coupling) and by-pass capacitor
using the short-circuit time constants method. Figure 6.11 a) shows the equivalent circuit for
the calculation of the time constant associated with C
G
where we replace C
G
by a test voltage
source in order to calculate equivalent resistance, R
eq
G
, seen by this capacitor. Note that all
remaining capacitors are replaced by short-circuits and the voltage source is replaced by a
short-circuit. From this gure it clear that R
eq
G
is
R
eq
G
= R
s
+R
G
= 16.1 k
Figure 6.11 b) shows the equivalent circuit for the calculation of the time constant associated
with C
S
. Since there is no current owing through R
s
and R
G
we have v
gs
= v
t
and we
can write:
v
o
R

L
+
v
o
v
t
r
o
g
m
v
t
= 0 (6.7)
v
o
v
t
r
o
g
m
v
t
=
v
t
R
S
+i
t
(6.8)
with R

L
= R
D
[[R
L
. Solving these eqns in order to obtain v
t
/it we get:
R
eq
S
=
v
t
i
t
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 130
+

g
m
v
gs
v
gs
R
G

+
R
s
r
o
R
L
||R
D
v
o
v
t
i
t
g
m
v
gs
R
G

+
R
s
R
L
||R
D
+
v
gs
= 0
r
o
Z
v
t
R
S
g
m
v
gs
v
gs
R
G

+
R
s
+
v
t
r
o
||R
L
||R
D
a)
c)
b)
Figure 6.11: Calculation of time constants.
=
R
S
(r
o
+R

L
)
R
S
(g
m
r
o
+ 1) +r
o
+R

L
= 74.6
Figure 6.11 c) shows the equivalent circuit for the calculation of the time constant associated
with C
L
. Since v
gs
= 0 and we can write:
R
eq
L
=
v
t
i
t
= r
o
[[R
L
[[R
D
= 2.2 k
and f
L
is given by:
f
L
=
1
2
_
1
R
eq
G
C
G
+
1
R
eq
S
C
S
+
1
R
eq
L
C
L
_
= 287.7 Hz
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 131
High-frequency cut-off frequency: Figure 6.12 a) shows the equivalent circuit for the high-
frequency range. By applying Millers theorem to C
gd
we obtain the circuit of gure 6.12 b)
+

v
s
R
s
+

v
s
R
s
g
m
v
gs
v
gs

+
g
m
v
gs
C
gd
v
gs
+
C
gs
R
G
R
G

a)
b)
C
gd
A

v
A

v
1
C
gs
+ C
gd
(1 A

v
)
R

L
R

L
v
o
v
o
Figure 6.12: a) Equivalent circuit for the high-frequency range. b) Application of Millers theorem
to C
gd
.
where A

v
is the gain between the gate and the drain;
A

v
=
v
o
v
gs
g
m
R

L
= 7.7
with R

L
= R

L
[[ r
o
. The two time constants are:

1
= (R
G
[[R
s
) [C
gs
+C
gd
(1 +g
m
R

L
)]
= 3.7 ns

2
= R

L
C
gd
g
m
R

L
1 +g
m
R

L
= 3.9 ns
The cut-off frequency is
f
H
=
1
2 (
1
+
2
)
= 20.9 MHz
Hence, the bandwidth is f
H
f
L
f
H
= 20.9 MHz.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 132
Solution of problem 6.11
DC analysis: Figure 6.13 shows the equivalent circuit for DC analysis. Neglecting the base
V
CC
R
E
(10 V)
V
B
V
E
R
1
R
2
I
E
0.7 V
Figure 6.13: Equivalent circuit for DC analysis.
current (I
B
0) we can write:
V
B
= V
CC
R
2
R
2
+R
1
= 5 V
and
V
E
= V
B
0.7
= 4.3 V
The emitter current is
I
E
=
V
E
R
E
= 1 mA
The collector current is approximately equal to I
E
.
AC analysis (mid-range): The transistor transconductance is
g
m
=
I
C
V
T
(V
T
25 mV)
= 40 mS
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 133
and r

is
r

=

g
m
= 5 k
Figure 6.14 shows the equivalent circuit for the mid-frequency range AC analysis. The current
+
Z
in
a
+
r

R
E
g
m
v

i
s
i
b i
e
R
L
i
o
R

s
a)
+
r

R
E
R
L
g
m
v

i
t
b)

v
t
i
e
Figure 6.14: a) Equivalent circuit for mid-frequency range AC analysis. b) Equivalent circuit for the
calculation of Z
in
a
.
gain is given by
A
i
=
i
o
i
s
=
i
o
i
e

i
e
i
b

i
b
i
s
the partial gains i
o
/i
e
and i
b
/i
s
can be obtained from the resistive current divider expression
while i
e
= ( + 1) i
b
. Thus, we can write:
A
i
=
R
E
R
E
+R
L
( + 1)
R

s
R

s
+Z
in
a
(6.9)
where R

s
= R
s
[[R
1
[[R
2
= 5 k. Z
in
a
can be calculated by applying rst a test voltage, v
t
,
to the relevant part of the circuit as illustrated in gure 6.14 b). From this circuit we can write.
i
t
=
v

and
v
t
= v

+i
e
(R
E
[[R
L
)
= v

+
_
v

+g
m
v

_
(R
E
[[R
L
)
Thus we have
Z
in
a
=
v
t
i
t
= r

+ (g
m
r

+ 1) (R
E
[[R
L
)
= r

+ ( + 1) (R
E
[[R
L
)
= 676.7 k
Now the current gain can be calculated using eqn 6.9, that is, A
i
= 0.33.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 134
AC analysis (low-frequency range): Figure 6.15 a) shows the equivalent circuit for the calcu-
Z
in
a
+
r

R
E
R
L
g
m
v

R
s
R
B
+
v
t
+
r

g
m
v

s
+
R
E
Z
o
a
b)
a)
c)
+
r

g
m
v

s
+

v
t
v
t
R
L
i
t
Figure 6.15: Calculation of time constants. Low-frequency range.
lation of the equivalent resistance seen by C
B
where C
B
is replaced by a test voltage v
t
. From
this circuit we can write
R
eq
B
= R
s
+ (R
B
[[Z
in
a
)
= 19.9k
with R
B
= R
1
[[R
2
. Figure 6.15 b) shows the equivalent circuit for the calculation of the
equivalent resistance seen by C
E
;
R
eq
E
= R
L
+ (R
E
[[Z
o
a
)
where Z
o
a
can be obtained from the circuit of gure 6.15 c). We can write:
v

= v
t
r

+R

s
and
i
t
= g
m
v

+
v
t
r

+R

s
= g
m
v
t
r

+R

s
+
v
t
r

+R

s
Now Z
o
a
can be obtained as follows:
Z
o
a
=
v
t
i
t
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 135
=
r

+R

s
g
m
r

+ 1
=
r

+R

s
+ 1
= 49.8
and R
eq
E
is approximately equal to R
L
= 15 k. The cut-off frequency is:
f
L
=
1
2
_
1
R
eq
E
C
E
+
1
R
eq
B
C
B
_
= 2.7 Hz
AC analysis (high-frequency range): Figure 6.16 a) shows the equivalent circuit at the high-
i
s
+
r

R
E
g
m
v

+
R
E
g
m
v

R
L
+

+
b)
c)
+
r

R
E
g
m
v

a)
C

v
t
Z
ina
R

s
R

s
R

s
v
t
r

R
L
R
L
v
b
v
o
i
t
Figure 6.16: a) High-frequency equivalent circuit b) Calculation of time constant associated with
C

. c) Calculation of time constant associated with C

.
frequency regime. Figure 6.16 b) shows the equivalent circuit for the calculation of the resis-
tance seen by C

where, according to the open-circuit time-constants method, i


s
is replaced
by an open-circuit and C

is also replaced by an open-circuit. R


eq

is:
R
eq

= R

s
[[Z
in
a
= 5.0 k
Figure 6.16 c) shows the equivalent circuit for the calculation of the resistance seen by C

.
Again, i
s
is replaced by an open-circuit and C

is also replaced by an open-circuit. For this


circuit we can write:
i
t
=
v
t
r

+
v
b
R

s
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 136
But v
b
is
v
b
= v
t
+
_
v
t
r

+g
m
v
t
_
R

L
Hence we have:
i
t
=
v
t
r

+
v
t
R

s
+v
t
_
1 +g
m
r

_
R

L
R

s
Finally,
R
eq

=
v
t
i
t
= r

[[R

s
[[
r

s
(1 +g
m
r

) R

L
= 36.9
The cut-off frequency is:
f
H
=
1
2
_
1
R
eq

+R
eq

_
= 10.2 MHz
and the bandwidth is f
H
f
L
f
H
.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 137
Solution of problem 6.12
_
I
ds
1

_
I
ds
2
=
_
1
2
k
n
W
L
v
s
(6.10)
and
I
ds
2
= I
Q
I
ds
1
(6.11)
Substituting I
ds
2
, given by the last eqn, in eqn 6.10 we can write:
_
I
ds
1

_
I
Q
I
ds
1
=
_
1
2
k
n
W
L
v
s
Squaring both parts of the last eqn we get:
I
Q

1
2
k
n
W
L
v
2
s
= 2
_
I
ds
1
(I
Q
I
ds
1
) (6.12)
After squaring again we can write:
4 I
2
ds
1
4 I
ds
1
I
Q
+
_
I
Q

1
2
k
n
W
L
v
2
s
_
2
= 0 (6.13)
solving to obtain I
ds
1
we get
1
:
I
ds
1
=
I
Q
2
+
1
2

I
2
Q

_
I
Q

1
2
k
n
W
L
v
2
s
_
2
=
I
Q
2
+
_
I
Q
k
n
W
L
v
s
2

1
v
2
s
/4 k
n
W
L
I
Q
Using eqn 6.11 we have
I
ds
2
=
I
Q
2

_
I
Q
k
n
W
L
v
s
2

1
v
2
s
/4 k
n
W
L
I
Q
1
Note that the other solution for I
ds
1
is not valid since I
ds
1
increases with the increase of v
s
!
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 138
Solution of problem 6.13
Figure 6.17 shows the equivalent circuit for DC analysis. Assuming that all transistors operate in the
Q
2
V
SS
(5 V)
Q
4
Q
3
Q
1
R
D
R
D
(6 k)
(6 k)
(5 V) V
DD
(3 k)
R
S
I
Q
I
Q
V
G
I
Q
/2
I
Q
/2
Figure 6.17: Equivalent circuit for DC analysis.
saturation region we can write:
I
Q
=
1
2
k
n
W
L
(V
GS
4
V
Th
)
2
V
GS
4
= V
G
V
SS
V
G
= I
Q
R
S
that is:
I
Q
=
1
2
k
n
W
L
(
I
Q
R
s
V
SS
V
Th
)
2
Solving we obtain
_

_
I
Q
= 1 mA and V
GS
4
= 2 V
or
I
Q
= 1.8 mA and V
GS
4
= 0.4 V
(6.14)
The second solution is not valid since V
GS
4
< V
Th
. The current that ows through Q
3
is I
Q
and
V
GS
3
= V
GS
4
. The current that biases Q
1
and Q
2
is I
Q
/2 and V
GS
1
= V
GS
2
= 1.71 V. Note that
all transistors operate in the saturation regime as assumed initially.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 139
The voltage gain is
A
v
=
g
m
(R
D
[[r
o
)
2
=
I
Q
2(V
GS
2
V
Th
)
_
R
D
[[
2 V
A
I
Q
_
= 4.1
Introduction to linear circuit analysis and modelling Moura and Darwazeh
6. Basic electronic amplier building blocks 140
Solution of problem 6.14
g
m
3
v
gs
3
+

v
gs
1
= v
gs
2
+

+

v
gs
3
g
m
2
v
gs
2
g
m
1
v
gs
1
v
ds
1
i
t
+

r
o
1
||R
r
o
3
v
t
r
o
2
Figure 6.18: Small-signal equivalent circuit for the current mirror.
Figure 6.18 shows the small-signal equivalent circuit for the current mirror where we apply a test
voltage source v
t
. The output resistance is given by
R
o
=
v
t
i
t
For this circuit we can write:
i
t
= g
m
3
v
gs
3
+
v
t
v
gs
2
r
o
3
(6.15)
i
t
= g
m
2
v
gs
2
+
v
gs
2
r
o
2
(6.16)
v
gs
3
= v
ds
1
v
gs
2
= (r
o
1
[[R) g
m
1
v
gs
2
v
gs
2
(6.17)
Assuming that all three transistors are equal we have r
o
1
= r
o
2
= r
o
3
= r
o
and g
m
1
= g
m
2
=
g
m
3
= g
m
.
Solving the set of eqns 6.156.17 to obtain v
t
/i
t
we get:
R
o
= r
o
2 (g
m
r
o
+ 1) +g
2
m
r
o
(r
o
[[R)
g
m
r
o
+ 1
Assuming that g
m
r
o
>> 1 and that r
o
<< R we can write the last eqn as follows:
R
o
g
m
r
2
o
g
m
r
o
+ 2
g
m
r
o
. .
1
g
m
r
2
o
Introduction to linear circuit analysis and modelling Moura and Darwazeh
Chapter 7
RF circuit analysis techniques
Solution of problem 7.1
V (kx)
V ([k 1]x)
=
_
L
C

2
L
2
x
2
4
j
Lx
2
_
L
C

2
L
2
x
2
4
+j
Lx
2
=
_
_
L
C


2
L
2
x
2
2
_
2
+
2
L
2
x
2
_
L
C


2
L
2
x
2
4
_
L
C
exp
_
_
j tan
1
_
_
Lx
_
L
C


2
L
2
x
2
4
L
C


2
L
2
x
2
2
_
_
_
_
We increase the number of sections, N , and decrease the length of each section, x 0, in
such a way that the product l = xN is kept constant. Hence, we have:
lim
k
x0
k x = x
where x is now a continuous variable representing the physical length. H(f, x) can be written as:
lim
k
x0
H(f, k x) = lim
k
x0
_
V (kx)
V ([k 1]x)
_
k
= lim
k
x0
_
_
_
_
L
C
_
2
L
C
_
_
k
lim
k
x0
exp
_
_
j tan
1
_
_
Lx
_
L
C


2
L
2
x
2
4
L
C


2
L
2
x
2
2
_
_
k
_
_
= 1 lim
k
x0
exp
_
_
j tan
1
_
_
Lx
_
L
C


2
L
2
x
2
4
L
C


2
L
2
x
2
2
_
_
k
_
_
Expanding the arc-tangent in a series as follows:
tan
1
() =
1
2

3
24
5
+. . .
with
=
Lx
_
L
C


2
L
2
x
2
4
L
C


2
L
2
x
2
2
7. RF circuit analysis techniques 142
then, the only term of the series, multiplied by k, that does not vanish when k and x 0 is
the rst one, that is,
lim
k
x0
exp
_
_
j tan
1
_
_
Lx
_
L
C


2
L
2
x
2
4
L
C


2
L
2
x
2
2
_
_
k
_
_
= exp
_
j

LC x
_
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 143
Solution of problem 7.2
The current in a particular section of the line k x can be written as
I(k x) =
V (k x)
Z
L
=
_
V (kx)
V ([k 1]x)
_
k
V (0)
Z
L
=
_
V (kx)
V ([k 1]x)
_
k
V (0)
jLx +
_
L
C

2
L
2
x
2
4
Taking the limits N and x 0 and using the results of the previous problem we have:
I(x) =
e
j

LC x
_
L
C
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 144
Solution of problem 7.3
Z
in
(d) =
V (d)
I(d)
= Z
o
1 + (d)
1 (d)
= Z
o
1 +
o
e
2 j d
1
o
e
2 j d
= Z
o
1 +
Z
L
Z
o
Z
L
+Z
o
e
2 j d
1
Z
L
Z
o
Z
L
+Z
o
e
2 j d
= Z
o
(Z
L
+Z
o
) e
j d
+ (Z
L
Z
o
) e
j d
(Z
L
+Z
o
) e
j d
(Z
L
Z
o
) e
j d

e
j d
e
j d
= Z
o
Z
L
_
e
j d
+e
j d
_
+Z
o
_
e
j d
e
j d
_
Z
o
(e
j d
+e
j d
) +Z
L
(e
j d
e
j d
)
= Z
o
Z
L
cos( d) +j Z
o
sin( d)
Z
o
cos( d) +j Z
L
sin( d)
= Z
o
Z
L
+j Z
o
tan( d)
Z
o
+j Z
L
tan( d)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 145
Solution of problem 7.4
The characteristic impedance is
Z
o
=
_
L
C
= 74.2
For = 2 300 rad/s we have:
=

LC
= 1.4 10
5
rad/m
and
Z
in
(d = l) = Z
o
Z
L
+j Z
o
tan( l)
Z
o
+j Z
L
tan( l)
= 25 +j 0.01
In other words, the line impedance barely affects the input impedance making Z
in
(d = l) Z
L
.
For = 2 5 10
8
rad/s we have:
=

LC
= 23.3 rad/m
and
Z
in
(d = l) = Z
o
Z
L
+j Z
o
tan( l)
Z
o
+j Z
L
tan( l)
= 137.5 +j 96.3
At this high frequency the input impedance is greatly changed with respect to the load impedance.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 146
10
7.5
5
2.5
0.5 1.0 1.5 2.0
1.0
0.5
0.5
1.5
1.0
1.5
1.0
0.5
0.5
1.5
1.0
1.5
1.0
0.5
0.5
1.5
1.0
1.5
0.5 1.0 1.5 2.0
0.5 1.0 1.5 2.0
10
7.5
5
2.5
0.5 1.0 1.5 2.0
0.5 1.0 1.5 2.0
|Zin(d)/Zo|
0.5 1.0 1.5 2.0
d/
d/
(Zin(d))/
(Zin(d))/
d/
d/
1
|Zin(d)/Zo|
|Zin(d)/Zo|
(Zin(d))/
a)
b)
c)
Figure 7.1: Magnitude and angle of Z
in
(d)/Z
o
; a) Z
L
= Z
o
/10. b) Z
L
= Z
o
. c) Z
L
= 10 Z
o
.
Solution of problem 7.5
The input impedance normalised to the characteristic impedance can be written as
Z
in
(d)
Z
o
=
Z
L
+j Z
o
tan( l)
Z
o
+j Z
L
tan( l)
=
Z
L
Z
o
+j tan( l)
1 +j
Z
L
Z
o
tan( l)
Figure 7.1 a) shows the magnitude and angle of Z
in
(d)/Z
o
when Z
L
= Z
o
/10. It can be seen that
for 0 < d < /2 and for < d < 3/2 the input impedance features an inductive component
while for /2 < d < and for 3/2 < d < 2 the input impedance features a capacitive
component.
Figure 7.1 b) shows the magnitude and angle of Z
in
(d)/Z
o
when Z
L
= Z
o
. Since the line is
matched the input impedance is Z
o
regardless of the value for d.
Figure 7.1 c) shows the magnitude and angle of Z
in
(d)/Z
o
when Z
L
= 10 Z
o
. It can be seen
that for 0 < d < /2 and for < d < 3/2 the input impedance is capacitive while for
/2 < d < and for 3/2 < d < 2 the input impedance is inductive.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 147
Solution of problem 7.6
The characteristic impedance of the quarter-wave transform must be:
Z
o
=

30 50
= 38.7
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 148
Solution of problem 7.7

tot
=

AB
(1 +
BL

BA
)
BL
T
AB
T
BA
1 +
BL

BA
=
Z
oB
Z
oA
Z
oB
+Z
oA
_
1 +
Z
L
Z
oB
Z
L
+Z
oB
Z
oA
Z
oB
Z
oB
+Z
oA
_
1 +
Z
L
Z
oB
Z
L
+Z
oB
Z
oA
Z
oB
Z
oB
+Z
oA

Z
L
Z
oB
Z
L
+Z
oB
2 Z
oB
Z
oA
+Z
oB
2 Z
oA
Z
oA
+Z
oB
1 +
Z
L
Z
oB
Z
L
+Z
oB
Z
oA
Z
oB
Z
oB
+Z
oA
Simplifying this eqn we obtain

tot
=
Z
2
oB
Z
oA
Z
L
Z
2
oB
+Z
oA
Z
L
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 149
Solution of problem 7.8
The current in a particular section of the line k x can be written as
I(k x) =
V (k x)
Z
L
=
_
V (kx)
V ([k 1]x)
_
k
V (0)
Z
L
with Z
L
given by (see example 7.3.6):
Z
L
=
(R +j L) x
2
+
_
(R +j L)
2
x
2
+ 4
R+j L
G+j C
2
Taking the limits N and x 0 and using the results derived in example 7.3.6 we obtain:
I(x) =
e
j

LC x
_
R+j L
G+j C
and since V (x) = I(x) Z
o
we can write:
Z
o
=

R +j L
G+j C
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 150
Solution of problem 7.9
1. The complex propagation constant for a lossy transmission line can be expressed as:
=

RG
_
1 +
jL
R
__
1 +
jC
G
_
=

RG

1 +j
_
L
R
+
C
G
_


2
LC
RG
(7.1)
If R >> L and G >> C we have
1 >>
_
L
R
+
C
G
_
>>

2
LC
RG
and we can write:

RG

1 +j
_
L
R
+
C
G
_
Taking into account that

1 +x 1 +x/2 if x << 1 we can write:


RG
_
1 +j
_
L
R
+
C
G
__
=

RG
. .

LF
+j
1
2
_
C
_
R
G
+L
_
G
R
_
. .

LF
If R >> L and G >> C we can also write
Z
o
=

R +j L
G+j C

_
R
G
2. The complex propagation constant for a lossy transmission line can also be expressed as:
=

(jL)(jC)
_
1 +
R
jL
__
1 +
G
jC
_
= j

LC

1 j
_
R
L
+
G
C
_

RG

2
LC
If R << L and G << C we have
1 >>
_
R
L
+
G
C
_
>>
RG

2
LC
and we can write:
j

LC

1 j
_
R
L
+
G
C
_
j

LC
_
1 j
1
2
_
R
L
+
G
C
__
=
1
2
_
R
_
C
L
+G
_
L
C
_
. .

HF
+j

LC
. .

HF
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 151
For R << L and G << C we have
Z
o
=

R +j L
G+j C

j L
j C
=
_
L
C
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 152
Solution of problem 7.10
Z
in
(d) =
V (d)
I(d)
= Z
o
1 + (d)
1 (d)
= Z
o
1 +
o
e
2 d
1
o
e
2 d
= Z
o
1 +
Z
L
Z
o
Z
L
+Z
o
e
2 d
1
Z
L
Z
o
Z
L
+Z
o
e
2 d
= Z
o
(Z
L
+Z
o
) e
d
+ (Z
L
Z
o
) e
d
(Z
L
+Z
o
) e
d
(Z
L
Z
o
) e
d

e
d
e
d
= Z
o
Z
L
_
e
d
+e
d
_
+Z
o
_
e
d
e
d
_
Z
o
(e
d
+e
d
) +Z
L
(e
d
e
d
)
= Z
o
Z
L
cosh( d) +Z
o
sinh( d)
Z
o
cosh( d) +Z
L
sinh( d)
= Z
o
Z
L
+Z
o
tanh( d)
Z
o
+Z
L
tanh( d)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 153
Solution of problem 7.11
assuming that
W
d
< 2 we have that
W
d

8 e
A
e
2A
2
= 1.164
where
A =
Z
o
60
_

r
+ 1
2
+

r
1

r
+ 1
_
0.23 +
0.11

r
_
= 1.968
Hence, we have:
W = d 1.164
= 1.51 mm
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 154
Solution of problem 7.12
Figure 7.2 a) shows the equivalent circuit for the calculation of S
11
and S
21
. S
11
is calculated as
Z
o
a)
+

Z
o
Z
o
Z
o
Z
o
V
S
1
+

Z
o
b)
V
S
1
R
R
C
Z
o
C
V
2
(l
2
)
+

+
Z
o
V
1
(l
1
)
I
1
(l
1
)
I
2
(l
2
)
I
2
(l
2
)
I
1
(l
1
)
+

V
2
(l
2
)
V
1
(l
1
)

+
Z
o
Z
IN
1
Z
IN
2
Figure 7.2: a) Calculation of S
11
and S
21
. b) Calculation of S
12
and S
22
.
S
11
=
Z
IN
1
Z
o
Z
IN
1
+Z
o
with:
Z
IN
1
=
1
j C
+ (R[[ Z
o
)
=
R +Z
o
+j C RZ
o
j C (R +Z
o
)
and S
11
can be written as
S
11
=
R +Z
o
(1 Z
o
j C)
2 j C RZ
o
+R +Z
o
(1 +j C Z
o
)
S
21
is calculated as
S
21
=
b
2
(l
2
)
a
1
(l
1
)

a
2
(l
2
)=0
=
V
2
(l
2
) Z
o
I
2
(l
2
)
V
1
(l
1
) +Z
o
I
1
(l
1
)
It is known that:
V
1
(l
1
) = Z
IN
1
I
1
(l
1
)
=
R +Z
o
+j C RZ
o
j C (R +Z
o
)
I
1
(l
1
)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 155
Also, V
2
(l
2
) can be related to V
1
(l
1
) by the voltage divider expression:
V
2
(l
2
) =
R[[ Z
o
1
j C
+ (R[[ Z
o
)
V
1
(l
1
)
=
j C RZ
o
j C RZ
o
+R +Z
o
Now, a
2
(l
2
) = 0 implying that V
2
(l
2
) = Z
o
I
2
(l
2
) and we have
S
21
=
2 V
2
(l
2
)
V
1
(l
1
)
_
1 +
Z
o
Z
IN
1
_
=
2 j C RZ
o
2 j C RZ
o
+R +Z
o
(1 +j C Z
o
)
Figure 7.2 b) shows the equivalent circuit for the calculation of S
22
and S
12
. S
22
is calculated as
S
22
=
Z
IN
2
Z
o
Z
IN
2
+Z
o
with:
Z
IN
2
=
_
1
j C
+Z
o
_
[[ R
=
R(1 +j C Z
o
)
1 +j C (Z
o
+R)
and S
22
is
S
22
=
R Z
o
(1 +j C Z
o
)
2 j C Z
o
R +R +Z
o
(1 +j C Z
o
)
S
12
is given by
S
12
=
b
1
(l
1
)
a
2
(l2)

a
1
(l1)=0
=
V
1
(l
1
) Z
o
I
1
(l
1
)
V
2
(l
2
) +Z
o
I
2
(l
2
)
(7.2)
Since a
1
(l
1
) = 0 V
1
(l
1
) = Z
o
I
1
(l
1
), the last eqn can be written as
S
12
=
2 V
1
(l
1
)
V
2
(l
2
) +Z
o
I
2
(l
2
)
(7.3)
V
1
(l
1
) can be related to V
2
(l
2
) using the impedance voltage divider formula:
V
1
(l
1
) = V
2
(l
2
)
j C Z
o
1 +j C Z
o
Using the result of the last eqn and since V
2
(l
2
) = Z
IN
2
I
2
(l
2
), we can calculate S
12
as follows:
S
12
=
2 V
1
(l
1
)
V
2
(l
2
)
_
1 +
Z
o
Z
IN
2
_
=
2 j C Z
o
R
2 j C Z
o
R +R +Z
o
(1 +j C Z
o
)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 156
Solution of problem 7.13
circuit a): Figure 7.3 a) shows the circuit for the calculation of S
11
and S
21
. S
11
is calculated
Z
1
Z
o
Z
1
a)
Z
o
Z
o
Z
o
Z
o
+

Z
o
b)
V
S
1

+
V
1
(l
1
)

+
V
1
(l
1
)

+
Z
o
Z
2
Z
2
Z
o
V
2
(l
2
)
V
S
2
V
2
(l
2
)
I
1
(l
1
)
I
1
(l
1
) I
2
(l
2
)
I
2
(l
2
)
+
Z
o
+

Z
IN
1
Z
IN
2
Figure 7.3: a) Calculation of S
11
and S
21
. b) Calculation of S
12
and S
22
.
as
S
11
=
Z
IN
1
Z
o
Z
IN
1
+Z
o
with:
Z
IN
1
= Z
1
+ (Z
2
[[ Z
o
)
=
Z
1
(Z
2
+Z
o
) +Z
2
Z
o
Z
2
+Z
o
and S
11
is
S
11
=
Z
1
Z
2
+Z
o
(Z
1
Z
o
)
Z
o
Z
2
+ (Z
2
+Z
o
) (Z
1
+Z
o
)
S
21
is calculated as
S
21
=
b
2
(l
2
)
a
1
(l
1
)

a
2
(l
2
)=0
=
V
2
(l
2
) Z
o
I
2
(l
2
)
V
1
(l
1
) +Z
o
I
1
(l
1
)
a
2
(l
2
) = 0 implying that V
2
(l
2
) = Z
o
I
2
(l
2
). Also, it is known that:
V
1
(l
1
) = Z
IN
1
I
1
(l
1
)
Hence, we have
S
21
=
2 V
2
(l
2
)
V
1
(l
1
)
_
1 +
Z
o
Z
IN
1
_
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 157
V
2
(l
2
) can be related to V
1
(l
1
) by the voltage divider expression:
V
2
(l
2
) =
Z
o
Z
2
Z
o
Z
2
+Z
1
(Z
2
+Z
o
)
V
1
(l
1
)
therefore, we have
S
21
=
2 Z
o
Z
2
Z
o
Z
2
+ (Z
2
+Z
o
) (Z
1
+Z
o
)
Figure 7.3 b) shows the circuit for the calculation of S
22
and S
12
. S
22
is calculated as
S
22
=
Z
IN
2
Z
o
Z
IN
2
+Z
o
=
Z
1
Z
2
Z
o
(Z
1
+Z
o
)
Z
o
Z
2
+ (Z
2
+Z
o
) (Z
1
+Z
o
)
with:
Z
IN
2
=
(Z
o
+Z
1
) Z
2
Z
o
+Z
1
+Z
2
S
12
is given by
S
12
=
b
1
(l
1
)
a
2
(l2)

a
1
(l1)=0
=
V
1
(l
1
) Z
o
I
1
(l
1
)
V
2
(l
2
) +Z
o
I
2
(l
2
)
(7.4)
Since a
1
(l
1
) = 0 V
1
(l
1
) = Z
o
I
1
(l
1
), and since V
2
(l
2
) = Z
IN2
I
2
(l
2
) the last eqn can
be written as
S
12
=
2 V
1
(l
1
)
V
2
(l
2
)
_
1 +
Z
o
Z
IN
2
_ (7.5)
V
1
(l
1
) can be related to V
2
(l
2
) using the impedance voltage divider formula:
V
1
(l
1
) = V
2
(l
2
)
Z
o
Z
o
+Z
1
Using the result of the last eqn calculate S
12
as follows:
S
12
=
2 Z
o
Z
2
Z
o
Z
2
+ (Z
2
+Z
o
) (Z
1
+Z
o
)
circuit b): Figure 7.4 a) shows the circuit for the calculation of S
11
and S
21
. S
11
is calculated
as
S
11
=
Z
IN
1
Z
o
Z
IN
1
+Z
o
=
Z
1
Z
2
Z
o
(Z
2
+Z
o
)
Z
1
Z
o
+ (Z
o
+Z
1
) (Z
o
+Z
2
)
with:
Z
IN
1
=
Z
1
(Z
2
+Z
o
)
Z
1
+Z
2
+Z
o
S
21
is calculated as
S
21
=
2 V
2
(l
2
)
V
1
(l
1
)
_
1 +
Z
o
Z
IN
1
_
=
2 Z
1
Z
o
Z
1
Z
o
+ (Z
o
+Z
1
) (Z
o
+Z
2
)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 158
a)
Z
1
Z
2
Z
o
+

Z
o
Z
o
V
S
1

+
V
1
(l
1
)

+
Z
o
V
2
(l
2
)
I
1
(l
1
)
Z
o
I
2
(l
2
)
Z
1
Z
2
Z
o
+

V
S
2
Z
o
Z
o
b)

+
V
1
(l
1
)
Z
o
V
2
(l
2
)
Z
o
I
1
(l
1
)
I
2
(l
2
)
Z
IN
2
Z
IN
1
Figure 7.4: a) Calculation of S
11
and S
21
. b) Calculation of S
12
and S
22
.
Figure 7.4 b) shows the circuit for the calculation of S
22
and S
12
.
S
22
=
Z
IN
2
Z
o
Z
IN
2
+Z
o
=
Z
1
Z
2
+Z
o
(Z
2
Z
o
)
Z
o
Z
1
+ (Z
2
+Z
o
) (Z
1
+Z
o
)
with:
Z
IN
2
=
Z
2
(Z
1
+Z
o
) +Z
1
Z
o
Z
1
+Z
o
S
12
is given by
S
12
=
2 V
1
(l
1
)
V
2
(l
2
)
_
1 +
Z
o
Z
IN
2
_
=
2 Z
1
Z
o
Z
1
Z
o
+ (Z
o
+Z
1
) (Z
o
+Z
2
)
with
V
1
(l
1
)
V
2
(l
2
)
=
Z
1
Z
o
Z
2
(Z
1
+Z
o
) +Z
1
Z
o
circuit c): Figure 7.5 a) shows the circuit for the calculation of S
11
and S
21
. For this circuit
we can write:
V
2
(l
2
) = A
fi
I
1
(l
1
) (R
o
[[ Z
o
)
and
V
1
(l
1
) = I
1
(l
1
) R
i
+A
rv
V
2
(l
2
)
= I
1
(l
1
)[R
i
+A
rv
A
fi
(R
o
[[ Z
o
)]
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 159
+

A
rv
V
o
A
fi
I
i
A
rv
V
o
A
fi
I
i
R
o
Z
o
+

Z
o
R
o
b)
a)
Z
o
I
i
= I
1
(l
1
)
R
i
R
i

+
I
i
= I
1
(l
1
)
V
1
(l
1
)
V
S
1
I
2
(l
2
)
+

V
o
= V
2
(l
2
)
+

V
1
(l
1
)
+

V
o
= V
2
(l
2
)
Z
o
Z
o
Z
o
Z
o
Z
o
Z
o
V
S
2
+

Figure 7.5: a) Calculation of S


11
and S
21
. b) Calculation of S
12
and S
22
.
Now, S
11
can be calculated as:
S
11
=
b
1
(l
1
)
a
1
(l
1
)

a
2
(l
2
)=0
=
V
1
(l
1
) Z
o
I
1
(l
1
)
V
1
(l
1
) +Z
o
I
1
(l
1
)
=
R
i
+A
rv
A
fi
(R
o
[[ Z
o
) Z
o
R
i
+A
rv
A
fi
(R
o
[[ Z
o
) +Z
o
=
(R
i
Z
o
) (R
o
+Z
o
) +A
rv
A
fi
R
o
Z
o
(R
i
+Z
o
) (R
o
+Z
o
) +A
rv
A
fi
R
o
Z
o
S
21
can be calculated as:
S
21
=
b
2
(l
2
)
a
1
(l
1
)

a
2
(l
2
)=0
=
2 V
2
(l
2
)
V
1
(l
1
) +Z
o
I
1
(l
1
)
=
2 A
fi
R
o
Z
o
(R
i
+Z
o
) (R
o
+Z
o
) +A
rv
A
fi
R
o
Z
o
Figure 7.5 b) shows the circuit for the calculation of S
22
and S
12
.
We can write the following eqns:
V
1
(l
1
) =
Z
o
Z
o
+R
i
A
rv
V
2
(l
2
) (7.6)
V
1
(l
1
) = I
1
(l
1
) R
i
+A
rv
V
2
(l
2
) (7.7)
I
2
(l
2
) =
V
2
(l
2
)
R
o
A
fi
I
1
(l
1
) (7.8)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 160
From eqns 7.6 and 7.7 we have
I
1
(l
1
) = V
2
(l
2
)
A
rv
Z
o
+R
i
(7.9)
and now we can write eqn 7.8 as follows.
I
2
(l
2
) =
V
2
(l
2
)
R
o
+A
fi
V
2
(l
2
)
A
rv
Z
o
+R
i
S
22
can be calculated as:
S
22
=
b
2
(l
2
)
a
2
(l
2
)

a
1
(l
1
)=0
=
V
2
(l
2
) Z
o
I
2
(l
2
)
V
2
(l
2
) +Z
o
I
2
(l
2
)
=
(R
i
+Z
o
) (R
o
Z
o
) A
rv
A
fi
R
o
Z
o
(R
i
+Z
o
) (R
o
+Z
o
) +A
rv
A
fi
R
o
Z
o
S
12
can be calculated as:
S
12
=
b
1
(l
1
)
a
2
(l
2
)

a
1
(l
1
)=0
=
2 V
1
(l
1
)
V
2
(l
2
) +Z
o
I
2
(l
2
)
=
2 A
rv
R
o
Z
o
(R
i
+Z
o
) (R
o
+Z
o
) +A
rv
A
fi
R
o
Z
o
circuit d): Figure 7.6 a) shows the circuit for the calculation of S
11
and S
21
. S
11
can be
I
1
(l
1
)
Z
3
Z
2
Z
1
Z
3
Z
2
Z
1
Z
o
a)
b)
V
S
1
Z
o

+
V
1
(l
1
)

+
V
1
(l
1
)

+
V
2
(l
2
)
V
2
(l
2
)
Z
o
Z
o
Z
o

+
Z
o
V
S
2
Z
o
Z
o
+

I
2
(l
2
)
Z
o
Z
o
I
1
(l
1
)
I
2
(l
2
)
Z
IN
1
Z
IN
2
Figure 7.6: a) Calculation of S
11
and S
21
. b) Calculation of S
12
and S
22
.
calculated from the following eqn:
S
11
=
Z
IN
1
Z
o
Z
IN
1
+Z
o
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 161
with:
Z
IN
1
= [ (Z
3
[[ Z
o
) +Z
2
] [[ Z
1
= Z
1
Z
o
(Z
3
+Z
2
) +Z
3
Z
2
Z
3
(Z
1
+Z
2
) +Z
o
(Z
1
+Z
2
+Z
3
)
S
21
can be calculated from the following eqn
S
21
=
2 V
2
(l
2
)
V
1
(l
1
)
_
1 +
Z
o
Z
IN
1
_
with
V
2
(l
2
)
V
1
(l
1
)
=
Z
3
Z
o
Z
3
Z
o
+Z
2
(Z
3
+Z
o
)
Figure 7.6 b) shows the circuit for the calculation of S
22
and S
12
. S
22
can be calculated from
the following eqn:
S
22
=
Z
IN
2
Z
o
Z
IN
2
+Z
o
with:
Z
IN
2
= [ (Z
1
[[ Z
o
) +Z
2
] [[ Z
3
= Z
3
Z
o
(Z
1
+Z
2
) +Z
1
Z
2
Z
1
(Z
3
+Z
2
) +Z
o
(Z
3
+Z
2
+Z
1
)
and S
12
can be calculated from the following eqn
S
12
=
2 V
1
(l
1
)
V
2
(l
2
)
_
1 +
Z
o
Z
IN
2
_
with
V
1
(l
1
)
V
2
(l
2
)
=
Z
1
Z
o
Z
1
Z
o
+Z
2
(Z
1
+Z
o
)
circuit e): Figure 7.7 a) shows the circuit for the calculation of S
11
and S
21
. S
11
can be
calculated from the following eqn:
S
11
=
Z
IN
1
Z
o
Z
IN
1
+Z
o
with:
Z
IN
1
= Z
1
+ [Z
3
[[ (Z
2
+Z
o
)]
= Z
1
+
Z
3
(Z
2
+Z
o
)
Z
3
+Z
2
+Z
o
S
21
can be calculated from the following eqn
S
21
=
2 V
2
(l
2
)
V
1
(l
1
)
_
1 +
Z
o
Z
IN
1
_
with
V
2
(l
2
)
V
1
(l
1
)
=
V
2
(l
2
)
V

V
1
(l
1
)
=
Z
o
Z
o
+Z
2

Z
3
[[ (Z
2
+Z
o
)
Z
1
+ [Z
3
[[ (Z
2
+Z
o
)]
=
Z
o
Z
o
+Z
2

Z
3
(Z
2
+Z
o
)
Z
3
(Z
2
+Z
o
) +Z
1
(Z
3
+Z
2
+Z
o
)
=
Z
3
Z
o
Z
3
(Z
2
+Z
o
) +Z
1
(Z
3
+Z
2
+Z
o
)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 162
Z
2
Z
3
Z
1
Z
1
a)
b)
Z
o
+

Z
o

V
S
2
+
Z
o
Z
o
Z
o
Z
o
V
S
1
I
1
(l
1
)

+
V
1
(l
1
)

+
V
1
(l
1
)
I
1
(l
1
)
V
2
(l
2
)
Z
o
Z
o

V
2
(l
2
)
+
I
2
(l
2
)
Z
o
I
2
(l
2
)
Z
IN
2
Z
IN
1
Z
3
+
+
Z
2
V

Figure 7.7: a) Calculation of S


11
and S
21
. b) Calculation of S
12
and S
22
.
Figure 7.7 b) shows the circuit for the calculation of S
22
and S
12
. S
22
can be calculated from
the following eqn:
S
22
=
Z
IN
2
Z
o
Z
IN
2
+Z
o
with:
Z
IN
2
= Z
2
+ [Z
3
[[ (Z
1
+Z
o
)]
= Z
2
+
Z
3
(Z
1
+Z
o
)
Z
3
+Z
1
+Z
o
and S
12
can be calculated from the following eqn
S
12
=
2 V
1
(l
1
)
V
2
(l
2
)
_
1 +
Z
o
Z
IN
2
_
with
V
1
(l
1
)
V
2
(l
2
)
=
V
1
(l
1
)
V

V
2
(l
2
)
=
Z
o
Z
o
+Z
1

Z
3
[[ (Z
1
+Z
o
)
Z
2
+ [Z
3
[[ (Z
1
+Z
o
)]
=
Z
3
Z
o
Z
3
(Z
1
+Z
o
) +Z
2
(Z
3
+Z
1
+Z
o
)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 163
Solution of problem 7.14
Figure 7.8 a) shows the circuit for the calculation of S
11
and S
21
. S
11
can be calculated from the
Z
o
Z
o
+

Z
o
Z
o
I
2
(l
2
)
I
1
(l
1
)
v
gs
v
o
C
gd
+

g
m
v
gs
a)
Z
IN
1
+

Z
o
V
1
(l
1
)
r
o
+

v
gs
v
o
C
gs
C
gd
+

g
m
v
gs
r
o
||Z
o
i
s
v
s
Z
IN
1
b)
V
S
1
+

V
2
(l
2
)
C
gs
Figure 7.8: a) Calculation of S
11
and S
21
. b) Calculation of Z
IN
1
= v
s
/i
s
and of A
v
1
= v
o
/v
s
.
following expression
S
11
=
Z
IN
1
Z
o
Z
IN
1
+Z
o
(7.10)
where Z
IN
1
can be calculated from the circuit of gure 7.8 b). For this circuit we can write the
following set of eqns
_
_
_
i
s
= v
s
j C
gs
+ (v
s
v
o
) j C
gd
(v
s
v
o
) j C
gd
= g
m
v
s
+v
o
/(r
o
[[Z
o
)
(7.11)
Solving to obtain v
s
/i
s
we get
Z
IN
1
=
r
o
+Z
o
+j C
gd
r
o
Z
o
j [(C
gd
+C
gs
) (r
o
+Z
o
) +C
gd
g
m
r
o
Z
o
]
2
C
gd
C
gs
r
o
Z
o
(7.12)
From which S
11
can be found.
S
21
can be calculated from the following expression
S
21
=
2 A
v
1
1 +
Z
o
Z
IN
1
where A
v
1
is given by
A
v
1
=
V
2
(l
2
)
V
1
(l
1
)
A
v
1
can be obtained from the circuit of gure 7.8 b) as follows:
A
v
1
=
v
o
v
s
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 164
Solving again the set of eqns, given by 7.11, to obtain v
o
/v
s
we get:
A
v
1
=
r
o
Z
o
(j C
gd
g
m
)
j C
gd
r
o
Z
o
+r
o
+Z
o
(7.13)
Figure 7.9 a) shows the circuit for the calculation of S
12
and S
22
. S
22
can be calculated from the
+

v
s
i
s
Z
o

+
Z
o

V
2
(l
2
)
+
I
2
(l
2
)
Z
IN
2
Z
o
I
1
(l
1
)
v
gs
v
o
C
gd
+

g
m
v
gs
r
o V
S
2
Z
o
Z
o
v
gs
C
gd
+

r
o
g
m
v
gs
Z
o
Z
IN
2
a)
b)
C
gs

+
C
gs
V
1
(l
1
)
Z
o
v
i
Figure 7.9: a) Calculation of S
22
and S
12
. b) Calculation of Z
IN
2
= v
s
/i
s
and of A
v
2
= v
i
/v
s
.
following expression
S
22
=
Z
IN
2
Z
o
Z
IN
2
+Z
o
(7.14)
where Z
IN
2
can be calculated from the circuit of gure 7.9 b). For this circuit we can write the
following set of eqns
_
_
_
i
s
= v
s
/r
o
+g
m
v
i
+ (v
s
v
i
) j C
gd
(v
s
v
i
) j C
gd
= v
i
j C
gs
+v
i
/Z
o
(7.15)
Solving to obtain v
s
/i
s
we get
Z
IN
2
=
r
o
[j (C
gd
+C
gs
) Z
o
+ 1]
1 +j (C
gd
+C
gs
) Z
o
+j C
gd
r
o
(g
m
Z
o
+ 1)
2
C
gd
C
gs
r
o
Z
o
(7.16)
S
12
can be calculated from the eqn below:
S
12
=
2 A
v
2
1 +
Z
o
Z
IN
2
(7.17)
=
2 Z
1
Z
o
Z
1
Z
o
+ (Z
o
+Z
1
) (Z
o
+Z
2
)
with
A
v
2
=
V
1
(l
1
)
V
2
(l
2
)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 165
A
v
2
can be calculated by solving the set of eqns 7.15 (see also gure 7.9 b)) to obtain v
i
/v
s
A
v
2
=
j C
gd
Z
o
1 +j (C
gd
+C
gs
) Z
o
(7.18)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 166
Solution of problem 7.15
The transconductance can be calculated as follows:
g
m
=
_
k
n
W
L
2 I
D
= 6.3 mA/V (7.19)
The drain-source resistance r
o
can be determined as follows:
r
o
=
V
A
I
D
= 12 k (7.20)
We use eqns 7.10-7.18 to plot the S-parameters shown in gure 7.10.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 167
10
8
10
7
10
6
10
9
10
10
10
8
10
7
10
6
10
9
10
10
10
8
10
7
10
6
10
9
10
10
10
8
10
7
10
6
10
9
10
10
10
8
10
7
10
6
10
9
10
10
10
8
10
7
10
6
10
9
10
10
10
8
10
7
10
6
10
9
10
10
10
8
10
7
10
6
10
9
10
10
|S
21
| (dB)
|S
12
| (dB)
|S
22
| (dB)
|S
11
| (dB)
1
1
3
2
0.5
30
25
20
15
10
35
10
8
6
4
2
2
0
0
0
(S
21
)/
(S
12
)/
(S
22
)/
(S
11
)/
0
0.5
1
1
0.5
0
0
0.5
0.5
0.5
0
1
0.5
f (Hz)
f (Hz)
f (Hz)
f (Hz) f (Hz)
f (Hz)
f (Hz)
f (Hz)
Figure 7.10: S-parameters (magnitude and phase) plotted versus frequency. a) S
11
. b) S
22
. c) S
12
.
d) S
21
.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 168
Solution of problem 7.16
The chain parameters can be dened by the set of eqns:
_
_
_
V
1
= A
11
V
2
A
12
I
2
I
1
= A
21
V
2
A
22
I
2
(7.21)
and the S-parameters can be dened by the set of eqns below:
_
_
_
b
1
= S
11
a
1
+S
12
a
2
b
2
= S
21
a
1
+S
22
a
2
(7.22)
that is
_
_
_
(V
1
Z
o
I
1
) = S
11
(V
1
+Z
o
I
1
) +S
12
(V
2
+Z
o
I
2
)
(V
2
Z
o
I
2
) = S
21
(V
1
+Z
o
I
1
) +S
22
(V
2
+Z
o
I
2
)
(7.23)
This set of eqns can be rewritten as
_
_
_
V
1
(1 S
11
) = Z
o
(1 +S
11
) I
1
+V
2
S
12
+I
2
Z
o
S
12
V
2
(1 +S
22
) = V
1
S
21
+I
1
Z
o
S
21
+Z
o
(1 +S
22
) I
2
(7.24)
Solving the second eqn of 7.24 in order to obtain I
1
we get:
I
1
= V
2
1 S
22
Z
o
S
21
V
1
1
Z
o
I
2
1 +S
22
S
21
Substituting I
1
in the rst eqn of 7.24 and solving to obtain V
1
we get:
V
1
=
(1 S
22
)(1 +S
11
) +S
12
S
21
2S
21
V
2
Z
o
(1 +S
22
)(1 +S
11
) S
12
S
21
2S
21
I
2
(7.25)
Substituting V
1
, given by the last eqn, in the second eqn of 7.24 and solving in order to obtain I
1
we
get:
I
1
=
(1 S
22
)(1 S
11
) S
12
S
21
2Z
o
S
21
V
2

(1 +S
22
)(1 S
11
) +S
12
S
21
2S
21
I
2
(7.26)
Comparing eqns 7.25 and 7.26 with eqn 7.21 we conclude that:
A
11
=
(1 S
22
)(1 +S
11
) +S
12
S
21
2S
21
A
12
= Z
o
(1 +S
22
)(1 +S
11
) S
12
S
21
2S
21
A
21
=
(1 S
22
)(1 S
11
) S
12
S
21
2Z
o
S
21
A
22
=
(1 +S
22
)(1 S
11
) +S
12
S
21
2S
21
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 169
Solution of problem 7.17
We normalise the impedances to Z
o
= 50 . Hence we have:
z
1
= 0.2 j 0.6
z
2
= 1.5 +j 0.4
z
3
= 1.2 j 0.8
z
4
= 0.1 j 1.4
z
5
= j 1
z
6
= j 3.6
We represent these normalised impedances on the Smith chart of gure 7.11 and we nd the corre-
0 0.5 1 2 4 8
20
8
6
5
4
3
2
1
0.5
0.5
1
2
3
4
5
6
8
20
z
4
z
6
z
5
y
1
y
5
y
6
z
2
y
3
z
3
y
2
z
1
y
4
Figure 7.11: Representation of the normalised impedances.
sponding normalised admittances:
y
1
= 0.5 +j 1.5
y
2
= 0.62 j 0.16
y
3
= 0.58 +j 0.38
y
4
= 0.05 +j 0.71
y
5
= j 1
y
6
= j 0.3
The admittances are obtained multiplying each y
k
by Y
o
= 1/Z
o
(20 mS);
Y
1
= 10 +j 30 mS
Y
2
= 12.4 j 3.2 mS
Y
3
= 11.6 +j 7.6 mS
Y
4
= 1 +j 14.2 mS
Y
5
= j 20 mS
Y
6
= j 6 mS
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 170
Solution of problem 7.18
We normalise the admittances to Y
o
= 1/50 = 20 mS;
y
1
= j 0.2
y
2
= 0.08 j 3
y
3
= 0.2 +j 2
We represent these normalised admittances on the Smith chart of gure 7.12. From the chart, we
0 0.5 1 2 4 8
20
8
6
5
4
3
2
1
0.5
0.5
1
2
3
4
5
6
8
20
y
1
z
1
y
2
z
2
z
3
y
3
Figure 7.12: Representation of the normalised admittances.
nd the corresponding normalised impedances:
z
1
= j 5
z
2
= 0.009 +j 0.333
z
3
= 0.05 j 0.5
The impedances are obtained multiplying each z
k
by Z
o
= 1/Y
o
= 50;
Z
1
= j 250
Z
2
= 0.45 +j 16.7
Z
3
= 2.5 j 25
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 171
Solution of problem 7.19
Figure 7.13 a) shows the calculation, using the Smith chart, of the L-section which transforms an
impedance of 50 into an impedance Z
L
= 25 j 15 . Z
o
= 50 . Figure 7.13 b) shows the
L-section obtained.
0 0.5 1 2 4 8
20
8
6
5
4
3
2
1
0.5
0.5
1
2
3
4
5
6
8
20
Z
a
j 40
j 50
50
Z
L
z
a
y
a
z
L
b)
a)
Figure 7.13: a) Calculation of the L-section using the Smith chart. b) L-section.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 172
Solution of problem 7.20
Figure 7.14 a) shows S
11
and S
22
in the Smith chart (polar coordinates) while gure 7.14 b) shows
S
12
and S
21
also in polar coordinates. f
a
= (2 RC)
1
/10 and f
b
= 10 (2 RC)
1
.
0 0.5 1 2 4 8
20
8
6
5
4
3
2
1
0.5
0.5
1
2
3
4
5
6
8
20
0 1 1
1
1
f
a
f
b
S
12
= S
21
Real
Imag
b)
S
11
S
22
f
b
f
a
f
a
a)
Figure 7.14: a) S
11
and S
22
. b) S
12
and S
12
.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 173
Solution of problem 7.21
Figure 7.15 a) shows the calculation, using the Smith chart, of the L-section which transforms an
impedance of Z
s
= 60 +j 20 into an impedance Z
L
= 40 +j 30 . Z
o
= 40 . Figure 7.13 b)
shows the L-section obtained.
0 0.5 1 2 4 8
20
8
6
5
4
3
2
1
0.5
0.5
1
2
3
4
5
6
8
20
b)
Z
L
Z
s
j 62
j 58
Z
a
a)
y
s
z
a
z
s
z
L
y
a
Figure 7.15: a) Calculation of the L-section using the Smith chart. b) L-section.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
7. RF circuit analysis techniques 174
Solution of problem 7.22
Figure 7.16 shows the calculation of the matching circuit using transmission lines. Z
o
= 45 .
l
1
= 0.279 , l
2
= 0.105 .
0 0.5 1 2 4 8
20
8
6
5
4
3
2
1
0.5
0.5
1
2
3
4
5
6
8
20
l
1
l
2
z
s
y
a
z
a
j 1.29
j 1.29
a)
b)
y = 1
0.4 + j 0.6
l
1
l
2
45
45 y
a
= 1 + j1.29
y = j1.29
z
s
Figure 7.16: a) Calculation of the matching circuit using the Smith chart. b) The circuit.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
Chapter 8
Noise in electronic circuits
Solution of problem 8.1
1. P[X > 3] can be calculated as follows:
P[X > 3] =
_

3
1

2
e

(x)
2
2
2
dx
Using the variable transformation indicated below:
=
x

we can write P[X > 3] as


P[X > 3] =
_

3

2
e

2
2
2
d
= Q
_
3

_
= 0.046
2. P[X > 3] can be calculated as follows:
P[X > 3] =
_

3
1

2
e

(x)
2
2
2
dx
= 1
_
3

2
e

(x)
2
2
2
dx
Using the variable transformation y = x we can write the last eqn as
P[X > 3] = 1
_

3
1

2
e

(y+)
2
2
2
dy
and now by using the variable transformation
=
y

we can write P[X > 3] as


P[X > 3] = 1
_

3+

2
e

2
2
2
d
= 1 Q
_
3 +

_
= 0.85
8. Noise in electronic circuits 176
3. P[2 < X < 3] can be calculated as follows:
P[2 < X < 3] =
_
3
2
1

2
e

(x)
2
2
2
dx
= 1
_

3
1

2
e

(x)
2
2
2
dx
_
2

2
e

(x)
2
2
2
dx
= 1 Q
_
3

_
Q
_
2 +

_
= 0.68
4. P[X < 2] can be calculated as follows:
PX < 2] =
_
2

2
e

(x)
2
2
2
dx
= Q
_
2 +

_
= 0.28
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 177
Solution of problem 8.2
1. The mean can be calculated as follows:
=
1
5
_
3
2
xdx
=
1
5
x
2
2

3
2
=
1
2
2. The variance can be calculated as follows:

2
=
1
5
_
3
2
_
x
1
2
_
2
dx
=
1
5
_
x
1
2
_
3
3

3
2
= 2.08
The third moment can be calculated as follows:
E[X
3
] =
1
5
_
3
2
x
3
dx
=
1
5
x
4
4

3
2
= 3.25
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 178
Solution of problem 8.3
The characteristic function can be determined as
C(2 ) =
_

k=0

k
k!
(x k) e
j 2 x
dx
= e

k=0

k
k!
e
j 2 k
The mean can be determined as
E[X] =
1
j 2
d
d
C(2 )

=0
= e

k=0

k
k!
k
. .
e

= = 0.8
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 179
Solution of problem 8.4
The PDF of the random variable resulting from the sum of the three uniform PDFs can be expressed
by;
P
Y
(y) =
_

_
(y + 3A)
2
16A
3
3A y < A

(y
2
3A
2
)
8A
3
A y A
(y 3A)
2
16A
3
A < y 3A
0 elsewhere
(8.1)
with A = 3. Hence, P[Y > 4] can be written as
P[Y > 4] =
_
9
4
(y 3A)
2
16A
3
dy
= 96.5 10
3
and P[Y > 8.9] can be written as
P[Y > 8.9] =
_
9
8.9
(y 3A)
2
16A
3
dy
= 77.16 10
8
We use now the central limit theorem to estimate these probabilities. The variance of each uniform
random variable is
2
=
6
2
12
= 3 while the mean is zero. P[Y > 4] can be estimated as follows:
P[Y > 4] = Q
_
4

3
_
= 91.2 10
3
and P[Y > 8.9] can be estimated according to
P[Y > 8.9] = Q
_
8.9

3
_
= 1.5 10
3
The central limit theorem (CLT) provides a good estimation for P[Y > 4] since the error is about
5.4%. However, for P[Y > 8.9] the CLT provides a poor estimation with a very large error.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 180
Solution of problem 8.5
The mean can be calculated as follows:
E[a(t)] =
_

e
3 x t
p
X
(x) dx
=
1
3
_
2
1
e
3 x t
dx
=
1
9 t
_
e
6 t
e
3 t
_
=
1
9 t
e

3 t
2
cosh
_
9 t
2
_
The autocorrelation function can be calculated as follows:
E[a(t
1
) a
(
t
2
] =
_

e
3 x (t
1
+t
2
)
p
X
(x) dx
=
1
3
_
2
1
e
3 x (t
1
+t
2
)
dx
=
1
9 (t
1
+t
2
)
_
e
6 (t
1
+t
2
)
e
3 (t
1
+t
2
)
_
=
1
9 (t
1
+t
2
)
e

3 (t
1
+t
2
)
2
cosh
_
9 (t
1
+t
2
)
2
_
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 181
Solution of problem 8.6
The power spectral density S
vv
(f) can be obtained calculating the Fourier transform of R
v
(), that
is
S
vv
(f) =
_

R
v
() e
j 2 f
d (8.2)
R
v
() is a triangular function. Hence, by consulting the Fourier transform table provided in ap-
pendix A we obtain:
S
vv
(f) =
2
Asinc
2
(f A)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 182
Solution of problem 8.7
The equivalent noise bandwidth, B
N
, can be calculated as
B
N
1
=
1
2
_

[H()[
2
d (8.3)
[H
1
()[
2
can be written as
[H
1
()[
2
=
k
1

2
p
1
+
k
2

2
p
2
with
p
1
= (1 2
2
+ 2 j
_
1
2
)
2
n
= (
_
1
2
+j )
2

2
n
p
2
= (1 2
2
2 j
_
1
2
)
2
n
= (
_
1
2
j )
2

2
n
k
1
=
j
2
n
4
_
1
2
k
2
=
j
2
n
4
_
1
2
It is known that
_
k
1

2
p
1
d =
K
1

p
1
tanh
1
_

p
1
_
It is also known that
lim
z
tanh
1
(z) =
_
_
_
j
2
if Imag [z] > 0
j
2
if Imag [z] < 0
(8.4)
Using the results above we can solve eqn 8.3 to obtain:
B
N
=

n
4
[H
2
()[
2
can be written as
[H
2
()[
2
=
k
1

2
p
1
+
k
2

2
p
2
with
p
1
= (1 2
2
+ 2 j
_
1
2
)
2
n
= (
_
1
2
+j )
2

2
n
p
2
= (1 2
2
2 j
_
1
2
)
2
n
= (
_
1
2
j )
2

2
n
k
1
= 4
2
n

2
p
1
p
1
p
2
k
2
= 4
2
n

2
p
2
p
2
p
1
Using the results above we can solve eqn 8.3 to obtain:
B
N
2
=
n

Introduction to linear circuit analysis and modelling Moura and Darwazeh


8. Noise in electronic circuits 183
The equivalent noise bandwidth for H
1
() +H
2
() is
B
N
3
= B
N
1
+B
N
2
=
n
_
+
1
4
_
Figure 8.1 shows the equivalent noise bandwidths determined above, normalised to
n
, versus
.

B
N
3
B
N
1
B
N
2
0.2
0.5
1.5
2.0
0.4 0.6 0.8 1.0
B
N
/
n
1.0
0
0
Figure 8.1: Equivalent noise bandwidths normalised to
n
versus .
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 184
Solution of problem 8.8
We assume that the amplier of gure 8.2 has an input impedance Z
in
and a current gain A
i
= i
o
/i
i
.
Contribution of u
n
to the output current: From gure 8.2 b) we can write:
i
i
=
u
n
Z
in
+Z
s
and
i
o
= A
i
i
i
= A
i
u
n
Z
in
+Z
s
Contribution of i
n
to the output current: From gure 8.2 c) we can write:
i
i
=
i
n
Z
s
Z
in
+Z
s
and
i
o
= A
i
i
i
= A
i
i
n
Z
s
Z
in
+Z
s
Contribution of i
ns
to the output current: From gure 8.2 d) we can write:
i
i
=
i
ns
Z
s
Z
in
+Z
s
and
i
o
= A
i
i
i
= A
i
i
ns
Z
s
Z
in
+Z
s
Since the total current gain, A
i
s
is
A
i
s
=
i
o
i
s
= A
i
Z
s
Z
in
+Z
s
we can obtain the equivalent input noise current as follows:
i
n
eq
=
A
i
u
n
Z
in
+Z
s
+A
i
i
n
Z
s
Z
in
+Z
s
+A
i
i
ns
Z
s
Z
in
+Z
s
A
i
s
=
u
n
Z
s
+i
n
+i
ns
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 185
Z
s
i
n
i
i
i
o
+
u
n
Z
s
i
i
i
i
Z
s
i
ns
+

u
n
+ i
s
v
i
a)
b)
c)
d)
i
o
i
o
i
i
i
n
i
o
Z
in
Z
s
i
ns
Figure 8.2: a) Noisy amplier. a) Equivalent circuit for the calculation of the contribution of u
n
to
the output current. b) Equivalent circuit for the calculation of the contribution of i
n
to the output
current. c) Equivalent circuit for the calculation of the contribution of i
ns
to the output current.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 186
Solution of problem 8.9
We assume that the amplier, shown here in gure 8.3, has an input impedance Z
in
and a voltage
gain A
v
= v
o
/v
i
.
Contribution of u
n
to the output voltage: From gure 8.3 b) we can write:
v
i
= u
n
Z
in
Z
in
+Z
s
and
v
o
= A
v
v
i
= A
v
u
n
Z
in
Z
in
+Z
s
Contribution of i
n
to the output voltage: From gure 8.3 c) we can write:
v
i
= i
n
Z
in
Z
s
Z
in
+Z
s
and
v
o
= A
v
v
i
= A
v
i
n
Z
in
Z
s
Z
in
+Z
s
Contribution of u
ns
to the output voltage: From gure 8.3 d) we can write:
v
i
= u
ns
Z
in
Z
in
+Z
s
and
v
o
= A
v
v
i
= A
v
u
ns
Z
in
Z
in
+Z
s
Since the total voltage gain, A
v
s
is
A
v
s
=
v
o
v
s
= A
v
Z
in
Z
in
+Z
s
we can obtain the equivalent input noise voltage as follows:
u
n
eq
=
A
v
u
n
Z
in
Z
in
+Z
s
+A
v
i
n
Z
in
Z
s
Z
in
+Z
s
+u
ns
Z
in
Z
in
+Z
s
A
v
s
= u
n
+i
n
Z
s
+u
ns
The PSD can now be obtained calculating

i
n
eq
i
n
eq

_
, that is:

u
n
eq
u
n
eq

_
=

(u
n
+i
n
Z
s
+u
ns
) (u
n
+i
n
Z
s
+u
ns
)

_
Since u
ns
is not correlated with u
n
and i
n
we can write:
u
ns
u
n

) = u
n
u
ns

) = 0
u
ns
i
n

) = i
n
u
ns

) = 0
In addition we have:
(i
n
Z
s
) u
n

) +u
n
(i
n
Z
s
)

) = 2 Real [u
ns
i
n

) Z

s
]
Finally, we can write:

u
n
eq
u
n
eq

_
= u
n
u
n

) +u
ns
u
ns

) +i
n
i
n

) [Z
s
[
2
+ 2 Real [u
ns
i
n

) Z

s
]
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 187
v
s
Z
s
u
n
u
ns
i
n
+ +
+

v
o
Z
in
Z
s
u
n
+
v
o
Z
in
+

V
i
Z
s
+
v
o
Z
in
u
ns
+

V
i
a)
b)
c)
d)
Z
s
i
n v
o
Z
in V
i
+

Figure 8.3: a) Noisy amplier. a) Equivalent circuit for the calculation of the contribution of u
n
to
the output voltage. b) Equivalent circuit for the calculation of the contribution of i
n
to the output
voltage. c) Equivalent circuit for the calculation of the contribution of u
ns
to the output voltage.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 188
Solution of problem 8.10
Figure 8.4 a) shows the non-inverting voltage amplier including the various the noise sources.
Contribution of u
R
2
to the output voltage: Figure 8.4 b) shows the equivalent circuit. Since
there is no voltage difference across R
1
there is no current owing through R
1
. Since the
op-amp does not draw any current there is no current owing through R
2
. Hence,we can write
v
o
= u
R
2
(8.5)
Contribution of u
n
to the output voltage: From gure 8.4 c) we can write:
v
o
=
R
2
+R
1
R
1
u
n
(8.6)
Contribution of i
n
to the output voltage: From gure 8.4 d) we can write:
v
o
= R
2
i
n
(8.7)
Contribution of u
R
1
to the output voltage: From gure 8.4 e) we can write:
v
o
=
R
2
R
1
u
R
1
(8.8)
The equivalent input noise voltage source can be obtained dividing the sum of the contributions
calculated above by the voltage gain 1 +R
2
/R
1
, that is:
u
eq
=
u
R
2
+
R
2
+R
1
R
1
u
n
R
2
i
n

R
2
R
1
u
R
1
1 +
R
2
R
1
(8.9)
that is
u
eq
= u
R
2
R
1
R
2
+R
1
+u
n

R
2
R
1
R
2
+R
1
i
n

R
1
R
2
+R
1
u
R
1
(8.10)
Since all the noise sources are uncorrelated we have:
u
eq
u
eq

) =
R
2
1
(R
2
+R
1
)
2
u
R
2
u
R
2

) +u
n
u
n

)
+
(R
2
R
1
)
2
(R
2
+R
1
)
2
i
n
i
n

) +
R
2
1
(R
2
+R
1
)
2
u
R
1
u
R
1
) (8.11)
For this amplier we have:
u
R
1
u
R
1

) = 2 /T R
1
= 8.0 10
18
V
2
/Hz
u
R
2
u
R
2

) = 2 /T R
2
= 7.2 10
17
V
2
/Hz
The PSD of the equivalent input noise voltage is:
u
eq
u
eq

) = 4.4 10
18
V
2
/Hz
Figure 8.5 a) shows the inverting voltage amplier including the noise sources. The contributions of
each noise source to the output voltage are the same as those calculated above, that is:
v
o
= u
R
2
+
R
2
+R
1
R
1
u
n
R
2
i
n

R
2
R
1
u
R
1
(8.12)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 189
0 V
+

R
1
R
1
+

u
R1

+
v
o
e)
c)
b)
d)
v
o
a)
R
1
v
o
v
o
+

0 V
v
o
+
u
n
v

R
2
R
1
u
n

+
R
2
R
2
R
1
i
n
R
2

+
i
n

+
+
R
2
u
R2
+
+
u
R1
u
R2
Figure 8.4: a) Non-inverting amplier. b) Contribution of u
R
2
to the output voltage. c) Contribution
of u
n
to the output voltage. d) Contribution of i
n
to the output voltage. e) Contribution of u
R
1
to
the output voltage.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 190
0 V
+

R
1
b)
R
2
u
R2
+
+
+
R
1
+

u
R1

+
v
o
e)
c)
d)
v
o
v
o
+

0 V
v
o
+
v

R
2
R
1
u
n

+
R
2
R
1
i
n
R
2
a)
+

R
1
R
2
u
R2
i
n
+
u
n
u
R1
v
o
Figure 8.5: a) Inverting amplier. b) Contribution of u
R
2
to the output voltage. c) Contribution of
u
n
to the output voltage. d) Contribution of i
n
to the output voltage. e) Contribution of u
R
1
to the
output voltage.
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 191
The equivalent input noise voltage source can be obtained dividing the sum of the contributions
calculated above by the voltage gain R
2
/R
1
, that is:
u
eq
=
u
R
2
+
R
2
+R
1
R
1
u
n
R
2
i
n

R
2
R
1
u
R
1

R
2
R
1
(8.13)
that is
u
eq
= u
R
2
R
1
R
2
u
n
R
2
+R
1
R
2
+R
1
i
n
+u
R
1
(8.14)
Since all the noise sources are uncorrelated we have:
u
eq
u
eq

) = u
R
2
u
R
2

)
R
2
1
R
2
2
+u
n
u
n

)
(R
2
+R
1
)
2
R
2
2
+ i
n
i
n

) R
2
1
+u
R
1
u
R
1

)
= 1.3 10
17
V
2
/Hz
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 192
Solution of problem 8.11
The noise factor can be expressed as
F = 1 +
i
n
i

n
) + 2 Real[u
n
i

n
) Y
s
()] +u
n
u

n
) [Y
s
()[
2
2 /T Real[Y
s
()]
that is;
F = 1 +
g
n
G
s
+
R
n
(G
2
s
+W
2
s
)
G
s
+ 2
Real [u
n
i

n
)]
2 /T
2
Imag [u
n
i

n
)] W
s
2 /T G
s
(8.15)
with:
2 /T g
n
= i
n
i

n
)
2 /T R
n
= u
n
u

n
)
Y
s
() = G
s
+j W
s
The optimum value for W
s
can be obtained by differentiating eqn 8.15 and setting the differential to
zero, that is
d F
W
s
= 0
W
s
opt
=
Imag [u
n
i

n
)]
2 /T R
n
(8.16)
The optimum value for G
s
can be obtained by differentiating eqn 8.15 and setting the differential
to zero, that is
d F
G
s
= 0
G
s
opt
=

g
n
+R
n
W
2
s
2
Imag[u
n
i

n
]
2 KT
W
s
R
n
(8.17)
Using the result in eqn 8.16 we obtain:
G
s
opt
=

g
n
R
n
W
2
s
opt
R
n
g
n
= R
n
(G
2
s
opt
+W
2
s
opt
)
g
n
= R
n
[Y
s
opt
[
2
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 193
Solution of problem 8.12
It is known that
i
n
i

n
) = 2 /T g
n
u
n
u

n
) = 2 /T R
n
and u
n
i

n
) = i
n
i

n
)

. The quantity u
n
i

n
) satises the following eqn:
F
min
= 1 +
2 /T g
n
2 /T G
s
opt
+
2 /T R
n
[Y
s
opt
[
2
2 /T G
s
opt
+
2 G
s
opt
Real [u
n
i

n
)] 2 W
s
opt
Imag [u
n
i

n
)]
2 /T G
s
opt
= 1 +
4 /T g
n
2 /T G
s
opt
+
2 G
s
opt
Real [u
n
i

n
)] 2 W
s
opt
Imag [u
n
i

n
)]
2 /T G
s
opt
(8.18)
From problem 8.11 it is known that:
Imag [u
n
i

n
)] = 2 /T R
n
W
s
opt
(8.19)
Now eqn. 8.18 can be written as follows:
F
min
= 1 +
4 /T g
n
2 /T G
s
opt
+
2 G
s
opt
Real [u
n
i

n
)] 4 /T W
2
s
opt
R
n
2 /T G
s
opt
(8.20)
It is also known from problem 8.11, that
W
2
s
opt
R
n
= g
n
R
n
G
2
s
opt
Using this result in eqn 8.20 we can write:
F
min
= 1 +
4 /T g
n
2 /T G
s
opt
+
2 G
s
opt
Real [u
n
i

n
)] 4 /T (g
n
R
n
G
2
s
opt
)
2 /T G
s
opt
Solving this eqn to obtain Real [u
n
i

n
)] we get;
Real [u
n
i

n
)] = 2 /T
_
F
min
1
2
R
n
G
s
opt
_
(8.21)
Using the result of eqn 8.19 we can now write
Real [u
n
i

n
)] +j Imag [u
n
i

n
)] = 2 /T
_
F
min
1
2
R
n
(G
s
opt
j W
s
opt
)
_
that is:
u
n
i

n
) = 2 /T
_
F
min
1
2
R
n
Y

s
opt
_
and
u
n
i

n
) = i
n
u

n
)

= 2 /T
_
F
min
1
2
R
n
Y
s
opt
_
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 194
Solution of problem 8.13
DC analysis: For this circuit we can write:
_

_
I
D
=
1
2
K
n
W
L
(V
GS
V
Th
)
2
V
D
= V
GS
V
D
= V
CC
R
D
I
D
(8.22)
Solving we obtain
I
D
= 1.1 mA and V
GS
= 4.4 V
AC and noise analysis:
g
m
=
2 I
D
V
GS
V
Th
= 0.76 mS
r
o
=
V
A
I
D
= 45.4
Figure 8.6 shows the AC equivalent circuit including the various noise sources. The FET intrinsic
noise sources are characterised by PSDs given by:
i
nd
i
nd

) = 2 /T
2
3
g
m
i
nf
i
nf

) = 2 /T
2
3
g
m
f
c
f
i
ng
i
ng

) = q I
G
These sources are uncorrelated.

+
+

i
nd
a)
C
i
i
ng
v
gs
C
gd
g
m
v
gs
r
o
C
gs
+
R
f
S
D G
u
R
L
u
R
f
i
nf
R
L
= R
D
Figure 8.6: Amplier AC equivalent circuit
The load impedance, R
L
, represented in gure 8.6 is effectively equal to the drain impedance;
R
L
= R
D
= 10 k. The noise voltage sources of R
f
and R
L
are characterised by PSDs given by:
i
R
L
i
R
L

) = 2 /T R
L
u
R
f
i
R
f

) = 2 /T R
f
Figure 8.7 shows the amplier as the interconnection of elementary two-ports circuits. Y
gd
can be
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 195
S
D G
+

+
C
gs
+

i
ng
v
gs
r
o i
nd
i
nf
C
i
g
m
v
gs
R
f
C
gd
R
L
u
Rf
u
RL
VCCS
R
L
C
i
Y
gd
Figure 8.7: The amplier as an interconnection of two-ports
characterised by an admittance representation as follows (see also appendix C):
_
Y
Y
gd

=
_
_
Y
gd
Y
gd
Y
gd
Y
gd
_
_
(8.23)
where Y
gd
corresponds to the admittance of the parallel connection of C
gd
with R
f
:
Y
gd
=
1
R
f
+j C
gd
(8.24)
_
C
Y
Y
gd
_
= 2 /T
_
_
R
1
f
R
1
f
R
1
f
R
1
f
_
_
(8.25)
The admittance representation for VCCS is given by:
[Y
VCCS
] =
_
_
j C
gs
0
g
m
r
1
o
_
_
(8.26)
and
[C
Y
VCCS
] =
_

_
q I
G
0
0 2 /T
2
3
g
m
_
1 +

c
_
_

_ (8.27)
where
c
= 2 f
c
.
The two-port circuit describing the parallel connection of VCCS with Y
gd
is designated by FET
and can be characterised by an admittance representation given by:
[Y
FET
] =
_
Y
C
gd

+ [Y
VCCS
] (8.28)
[C
Y
FET
] = [C
Y
Y
gd
] + [C
Y
VCCS
] (8.29)
that is
[Y
FET
] =
_
_
j C
gs
+Y
gd
Y
gd
g
m
Y
gd
r
1
o
+Y
gd
_
_
(8.30)
[C
Y
FET
] =
_

_
q I
G
+ 2 /T R
1
f
2 /T R
1
f
2 /T R
1
f
2 /T
_
2
3
g
m
_
1 +

c

_
+R
1
f
_
_

_ (8.31)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 196
The two-port C
i
is connected in chain with FET and with R
L
. C
i
can be described by a chain
representation as follows:
[A
C
i
] =
_
_
1 (j C
i
)
1
0 1
_
_
(8.32)
We consider this capacitor as an ideal element such that
_
C
A
C
i
_
= [0] with [0] representing the null
matrix.
The chain representation for R
L
is given by :
[A
R
L
] =
_
_
1 0
R
1
L
1
_
_
(8.33)
_
C
A
R
L
_
= 2 /T
_
_
0 0
0 R
1
L
_
_
(8.34)
It is convenient to represent the two-port FET using a chain representation which can be obtained
as follows:
[A
FET
] =
_

_
r
1
o
+Y
gd
Y
gd
g
m
1
Y
gd
g
m
(j C
gs
+Y
gd
)(r
1
o
+Y
gd
)
Y
gd
g
m
Y
gd
j C
gs
+Y
gd
Y
gd
g
m
_

_ (8.35)
and
[C
A
FET
] = [T
(YA)
FET
] [C
Y
FET
] [T
(YA)
FET
]
+
(8.36)
with
[T
(YA)
FET
] =
_

_
0
1
Y
gd
g
m
1
j C
gs
+Y
gd
Y
gd
g
m
_

_ (8.37)
The amplier can now be characterised according to a chain representation as follows:
[A
AMP
] = [A
C
i
] [A
FET
] [A
R
L
]
[C
A
aux
] = [A
FET
]
_
C
A
R
L
_
[A
FET
]
+
+ [C
A
FET
]
[C
A
AMP
] = [A
C
i
] [C
A
aux
] [A
C
i
]
+
(8.38)
The equivalent input noise sources PSDs can now be obtained as follows:
u
eq
u
eq

) = C
A
AMP
11
i
eq
i
eq

) = C
A
AMP
22
u
eq
i
eq

) = C
A
AMP
12
Figure 8.8 shows the rms values of these sources versus the frequency. The noise factor can be
calculated as indicated below:
F = 1 +
[Y
s
] [C
A
AMP
] [Y
s
]

2 /T Real [Y
s
]
where Y
s
is the source output admittance and is equal to (2 k)
1
= 0.5 mS.
[Y
s
] = [Y
s
1]
and
[Y
s
]

=
_
Y

s
1
_
(8.39)
Introduction to linear circuit analysis and modelling Moura and Darwazeh
8. Noise in electronic circuits 197
10
10
10
8
10
6
10
4
10
2
10
0
10
10
10
8
10
6
10
4
10
2
10
0
10
0
10
2
10
4
10
6
10
8
10
10
10
10
10
8
10
6
10
4
10
2
10
0
u
eq
u
eq

1
2 i
eq
i
eq

1
2
u
eq
i
eq

/
10
10
10
9
10
11
10
8
10
7
10
6
10
10
10
11
|u
eq
i
eq

|
1
2
10
9
0
0.5
0.25
10
13
10
12
10
11
(V/

Hz) (A/

Hz)
(

VA/

Hz)
f (Hz)
f (Hz)
(Hz)
f
f
(Hz)
Figure 8.8: a) u
eq
u
eq

)
1
2
. b) i
eq
i
eq

)
1
2
. c) u
eq
i
eq

)
1
2
. d) i
eq
i
eq

).
Figure 8.9 shows the noise gure (in dB) versus the frequency. It is interesting to note that the
noise gure is a strong function of frequency and features minimum values in the frequency range
1 kHz to 2 MHz. This range of frequencies would be the operating range recommended for the
amplier.
10
10
10
8
10
6
10
4
10
2
10
0
Noise Figure (dB)
0
2
4
6
8
10
12
14
16
18
f (Hz)
Figure 8.9: Noise gure.
Introduction to linear circuit analysis and modelling Moura and Darwazeh

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