1

Tutorial 8

Timers
Basic Theory
Atmega 16 has following timers, Timer 0, 8 bit Timer 1, 16 bit consisting of two 8 bit parts, A and B Timer 2, 8 bit

Now there are two clocks, 1. System Clock (fs): This is the clock frequency at which Atmega is running. By default it is 1 MHz which can be changed by setting fuse bits. 2. Timer Clock (ft): This is the clock frequency at which timer module is running. Each timer module has different clocks. Now ft can be in ratios of fs. That is, ft = fs, fs/8, fs/64 ... For example, if we keep fs = 8 MHz then available options for ft are: 8 MHz, 1 MHz, 125 KHz ... (look in the image) There are total 4 settings for Timers, 1. Clock Source: Source for timer clock, keep it as system clock. You can also provide external clock. Read datasheet more information about external clock source. 2. Clock value: This is value of ft. Drop down for available options of ft. Chose whichever is required 3. Mode: There are many modes of timers. We will be discussing following 2 modes, a. Fast PWM top = FFh b. CTC top=OCRx (x=0, 1A, 2) 4. Output: Depending upon the mode we have chosen there options for output pulse. We will look in detail later. Basically each Timer has a counter unit with size 8 bit for Timer 0, 2 and 16 bit for Timer 1. I will be talking about Timer 0 and same will follow for other Timers. Each counter has a register which increments by one on every rising edge of timer clock. After counting to its full capacity, 255 for 8 bit, it again starts from 0. By using this register we can have different modes. Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers. are for

Robotics Club,IIT-Kanpur

Tutorial 8 TOP: The counter reaches the TOP when it becomes equal to the highest value in the count sequence. The TOP value can be assigned to be the fixed value 0xFF (MAX) or the value stored in the OCR0 Register. The assignment is dependent on the mode of operation.

Fast PWM Mode

PWM = Pulse Width Modulation. This mode is used to generate pulse with Fixed Frequency (F) Variable Duty Cycle (D)

F = Ft / 256

D = OCR0 / 255

(non inverted)

D = (255-OCR0) / 255

(inverted) By changing OCR0 value we can change the

duty cycle of the output pulse.

As OCR0 is an 8bit register it can vary from 0 o 255.

0 OCR0 255
Pins for Output pulse, Timer 0 Timer 1A Timer 1B Timer 2 : : : : OC0, OC1A, OC1B, OC2, pin 4 pin 19 pin 18 pin 21

Robotics Club,IIT-Kanpur Figure 1: Fast PWM mode Timing Diagram

Tutorial 8

CTC Mode
CTC = Clear Timer on Compare Match. This mode is to generate pulse with, Fixed Duty Cycle (D = 0.5) Variable Frequency (F)

F = (+)
D = 0.5 By changing value of we can change the of output pulse frequency. As OCR0 is an 8bit register it can from 0 to 255. OCR0 value vary

0 OCR0 255

Figure 2: CTC Mode timing diagram

Robotics Club,IIT-Kanpur