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2011 International Conference on Electrical Engineering and Informatics

17-19 July 2011, Bandung, Indonesia



A Modular Multilevel Inverter Using Single
DC Voltage Source for Static Var Compensators
Firman Sasongko
1
, Hadyan Nur Buwana
2
, Riko Iswara
3
, and Pekik Argo Dahono
4

School of Electrical Engineering and Informatics, Institute of Technology Bandung
Jl. Ganesha 10, Bandung 40132, Indonesia
1
firman@konversi.ee.itb.ac.id
2
hadyan-nur.buwana@total.com
3
r_iswara@yahoo.com
4
pekik@konversi.ee.itb.ac.id

Abstract Multilevel inverter has emerged as a new solution of
power converter for high power applications. Many efforts have
been done to obtain the best performance of multilevel inverter
to provide the need of power converter for high-power medium-
voltage applications. Multilevel inverter using modular-cascaded
topology with single dc voltage source is presented in this
manuscript. Inverter topology, features and control method will
be discussed. Simulation results for static var compensator
application are included to verify the effectiveness of the
proposed method.

Keywords Multilevel inverter, modular cascade inverter, static
var compensator.
I. INTRODUCTION
Reactive power compensation has become an indispensable
requirement to provide a better power system performance [1],
[2]. Var compensator system has three major roles: improving
the transient stability, damping the power oscillation, and
supporting the grid voltage to prevent voltage instability. In
recent years, static var compensators are preferable to their
traditional counterpart of using rotating synchronous
condenser and mechanically switched capacitors or inductors
[3], [4]. Static var compensator provides faster time response
to absorb or generate the reactive power. The advances of
power electronic devices, analytical tools, and micro-
computer technologies has create the more sophisticated
power converter to be used for static var compensator and
other high-power applications.
Multilevel system is especially important in high-power
applications such as Flexible AC Transmission System
(FACTS). At present, most of FACTS controllers that have
been installed worldwide are using conventional two-level
inverter modules that are interconnected by using a special
design multipulse transformer [5], [6]. In order to reduce the
switching losses, the inverter switching devices are switched
at the fundamental frequency. The transformer is configured
in such a way so that certain low-frequency harmonics are
eliminated. The output voltage is controlled by adjusting the
dc voltage of the inverter with the consequence of slow
control response. Thus, a multilevel inverter may become an
alternative solution to achieve a simple structure converter
with a fast control response for high-power applications.
The concept of multilevel converters has been introduced
since 1975. Since then, various multilevel converter
topologies were proposed [7], [8]. These converters are
suitable for high-power medium-voltage applications. The
main advantage of multilevel converter is that high output
voltage can be obtained without series connection of
switching devices. Moreover, better output waveforms can be
obtained without the need of high switching frequency
operation with the associated high switching losses.
In this paper, a new modular multilevel inverter topology
based on cascaded H-bridge cells is proposed. Neither
complicated transformer nor separate dc sources are required.
A single dc source is used for the whole single-phase H-bridge
cells. High output voltage is accomplished by the use of
identical single-phase transformer connected in series at the ac
side. Each cell output voltage can be controlled using phase
difference between each leg. The output voltage harmonics
are minimized by controlling the phase differences of H-
bridge cells. By using fundamental switching frequency, all
H-bridge cells have identical device rating and utilization
factor. The use of identical power cells leads to a modular
structure, which is an effective means for cost reduction. The
proposed inverter topology and also control scheme for static
var compensator are presented. Simulated results show the
effectiveness of the proposed multilevel inverter for static var
compensator application.
II. PROPOSED TOPOLOGY
Multilevel inverter can be considered as a series connection
of several ac voltage sources as shown in Fig. 1. In most
applications, the resultant of the voltage must be adjustable in
magnitude and low in harmonic contents. In high-power
applications, PWM switching operation is avoided because of
switching losses problem. Thus, the inverter switching devices
must be operated at fundamental frequency. To comply with
these constraints, the following methods can be chosen:
i) Controlling the dc voltage and using a special
connection transformer to reduce the harmonics.

ii) Controlling the devices gating signals to produce a
staircase waveform which control the output voltage
and reduce harmonic contents.
The first method is simple but the response is slow because
of large time constant of dc circuit. Moreover, a special
transformer connection is necessary. The second method is
more promising because of faster control response by using
controlled switching of inverter legs. Separate dc sources are
necessary if no galvanic isolation provided in the ac side.
Using many large dc electrolytic capacitors is prone to failure.
Therefore, using single dc capacitors with galvanic isolated
system is preferable here.
Several choices are available to use transformer as a
galvanic means. A special connected transformer can be used
to reduce the harmonics, which however, different
transformers have to be used if the number of levels is
changed. Thus, modularity of the system cannot be achieved.

V
1
V
2
V
3
V
4
V
5
V
out
V
out
V
1
V
2
V
3
V
4
V
5
V
1
V
5
V
2
V
3
V
4

Fig. 1. Series connection and phasor diagram of several voltage sources.
The preferred system is the one without custom-made
transformer. An ordinary transformer can be used to reduce
the harmonic contents by controlling the gating signals of the
inverters. Reference [8] proposes the gating pattern by
controlling switching angle for each level which produced a
staircase waveform. However, utilization factor of each level
is different and so does the losses of each level and cooling
system requirements.
A. Circuit Arrangement
Fig. 2 shows the topology of the proposed modular
multilevel inverter discussed in this paper. All single-phase H-
bridge inverter and transformer are identical, therefore, can be
considered as one module for each level. A single large dc
capacitor is connected in parallel on dc side. IGCTs or IGBTs
can be used as the switching devices. In practice, a small LCL
filter is usually connected on the ac side to reduce high-order
harmonics. As the output voltage levels increase, the filter
may be omitted.
The proposed method produces a staircase waveform by
controlling the phase angle differences among inverter levels.
In general, for N H-bridge cells, the optimum phase angle
difference is 60
o
/N which associated with the order of
harmonic contents of
= 6N _ 1 (1)
B. Output Voltage Control
Inverter cell output voltage of the proposed multilevel
inverter is determined by phase difference of each leg. Each
single-phase H-bridge inverter is operated under quasi square-
wave mode as shown in Fig. 3, ensuring the same utilization
factors of each level. The effective output voltage is controlled
by adjusting the angle. The effective fundamental voltage of
each cell can be defined as
I
1N rms
=
22I
dc
n
cos [
[
2
,
(2)
For N H-bridge cells, the general expression of phase
output voltage can be obtained as
:
an
= _(1)
h+3
2
4I
dc
n
cos _
[
2
] cos _t
N
n=1
~
h

n
SN
(n 1)__
(3)
where h is odd harmonic number only. For N = 5, using
transformer ratio of 1 : r, the phase-to-phase effective
fundamental output voltage is
I
5 rms
= 7.4Sr I
dc
cos [
[
2
, (4)
It can be seen from (2) and (4) that the output voltage varies
linearly to cosines of 2. This feature has the advantage to
generate a simple switching control scheme.


Fig. 2. Modular cascaded multilevel inverter and its waveform.


Fig. 3. Signal waveform of each inverter leg in each cell.
C. Comparative Evaluation
In order to clarify the performance of the proposed modular
multilevel inverter system, a conceptual design of static var
compensator with 10 MVAR rating is used. It is assumed that
the static var compensator is designed to operate on medium-
voltage of distribution system (20 kV). The proposed
multilevel inverter design is then compared to the ones using
quad-series [6] and cascaded [8] inverter systems. Using the
most advanced power switching devices with rating up to
6kV/6kA, the dc source voltage can be as high as 3.1 kV.
Table I shows performance comparison among the three types
of static var compensator.
III. CONTROL METHOD
A static var compensator can be considered as voltage
source converter which connected in parallel to the power grid
through series inductance as shown in Fig. 4. The line
resistance is usually very small and can be neglected. The
objective of multilevel inverter control system is to ensure dc
voltage and reactive power flow at a desired command. When
the inverter voltage v
i
is higher than grid voltage v
g
, inverter
current will lead the voltage by 90
o
(reactive power injection).
On the contrary if the inverter voltage v
i
is smaller than grid
voltage v
g
, then inverter current will lag the voltage by 90
o
(reactive power absorption). Thus, controlling the inverter
voltage magnitude means controlling the reactive power flow.
Although theoretically var compensator does not exchange
active power to the grid, the inverter internal losses will cause
the capacitor voltage to deviate from its nominal value. By
adjusting the phase angle between inverter and grid voltages,
the active current will flow in/out to keep the dc voltage
constant.
The circuit equation for three-phase system as in Fig. 4 can
be written as
_
:
ga
:
gb
:
gc
_ _
:
Ia
:
Ib
:
Ic
_ = I
C
J
Jt
_
i
Ia
i
Ib
i
Ic
_ (5)
In dq synchronous reference frame, this equation can be
written as follows:
_
I
C
J
Jt
I
C
I
C
I
C
J
Jt
_ _
i
Id
i
Iq
_ = _
:
gd
:
Id
:
gq
:
Iq
_ (6)
where is system frequency; the subscript d and q are d-
axis and q-axis voltage/current component respectively.
Because the grid voltage vector :
g
is always aligned with d-
axis voltage component v
gd
, the q-axis component of grid
voltage v
gq
is always zero. The instantaneous active and
reactive power in dq synchronous reference frame can be
expressed as
p = :
gd
i
Id
+:
gq
i
Iq
= :
gd
i
Id

q = :
gd
i
Iq
:
gq
i
Id
= :
gd
i
Iq

(7)
TABLE I
COMPARISON SUMMARY
Aspects
Inverter Topology
Quad-series Cascade Proposed
Voltage level 11 21 21
Capacitor 1 15 1
DC voltage 3100 V 3100 V 3100 V
Transformer
Complex
configuration
-
15
single phase

S

P
= 1:2

S
Y
P
= S:2
1:1
Converter
construction
Identical but not
modular
Identical
and modular
Identical
and modular
Utilization
factor
equal unequal equal
Power switch 24 60 60
Control
strategies
angle
angle and
MI
and
angle
DC
unbalance
problem
No Yes No
Response
time
Medium Fast Fast
THD 8.7% 6.6 7.2% 3.6 7.6%
Fig. 4. Static var compensator model and its operation modes.


From (7), the active and reactive power control can directly
be determined by active and reactive current provided a
constant grid voltage. Therefore, controlling the reactive
current i
iq
alone is sufficient to control reactive power to the
grid. Moreover, to keep a constant dc voltage by controlling
active power flow, only the active current i
id
need to be
controlled. Thus, a fast current controller is desirable in this
method to achieve the system with fast dynamic time response.
A. Static Var Compensator with Proposed Multilevel Inverter
The complete control system and block diagram of the
proposed static var compensator is shown in Fig. 5. There are
two reference values in this system, which are the dc voltage
reference I
dc

and q-axis current reference i


Iq

which
proportional to reactive power q. The control system will then
produce * and * commands, which will control the active
and reactive power respectively. The *and * angle can be
obtained from d- and q-axis voltage references as
[

= 2cos
-1
`

_(I
Id

)
2
+(I
Iq

)
2
KrI
dc
/


(8)
o

= tan
-1
_
I
Iq

I
Id

_ (9)
where K is a topology characteristic constant and r is the
transformer ratio. The K value will be unique for each cell
numbers as in (3) with h = 1. For N = 5, K is equal to 7.45,
while for N = 3, K is equal to 4.49.
The inverter output voltage must be synchronized to the
power grid voltage. For this purpose, a phase locked loop
(PLL) circuit is used to obtain the grid voltage angle . This
angle will be used for all dq transformation process.
The dc voltage reference I
dc

is compared to the actual dc


capacitor voltage I
dc
which then will be processed by a PI
controller to generate the d-axis current reference i
Id

. The
actual d- and q-axis currents, which obtained from inverter
currents using dq transformation, are then compared to the
reference values and the PI current controllers will
compensate the errors. The output of the current controllers is
the desired d-axis and q-axis inverter output voltages. By
using a look up table, the required and angle can be
determined.
B. Decoupled Current Control
The plant block diagram as shown in Fig. 5 implies that the
d- and q-axis currents cannot be controlled independently. To
solve the coupling problem, a feed-forward technique as
shown in current controller block diagram of Fig. 5 is used.
The actual output currents I
id
and I
iq
are multiplied by the line
reactance L
C
to produce additional signals to cancel out the
coupling effects. By using this method, the d-axis currents can
be controlled independently as shown in Fig. 6. The control
method for q-axis current has the same approach. The inverter
is assumed to have a unity gain, so the inverter output voltage
V
id
is equal to the voltage reference V
id
*.
From Fig. 6, the transfer function of d-axis current can be
determined as
I
Id
(s)
I
Id

(s)
=
K
C
L
C
1
C
+
K
C
L
C
s
s
2
+
K
C
L
C
s +
K
C
L
C
1
C
(10)
The damping ratio
C
and undamped natural frequency
nC

can be obtained as follows:

C
=
1
2
, _
K
C
I
C
I
C
(11)

nC
= _
K
C
I
C
I
C
(12)
By using critically damped control response, the damping
ratio is
C
= 1 and the current control gain K
C
and time
constant T
C
can be determined as
K
C
= 4uuuI
C
V/A with I
C
= 1 ms (13)

Fig. 5. Proposed static var compensator system and its control block diagram.

Fig. 6. Decoupled current control block diagram.
C. DC Capacitor Voltage Control
Single dc capacitor is used in the proposed system. A
simple control system is required to maintain dc voltage level.
By avoiding the resonance condition between dc capacitor and
line reactor, reduction of the dc voltage fluctuation can be
achieved. A simple right-hand rule can be used to determine
the required capacitance for single capacitor circuit with
nominal reactive power of Q
VAR
[8] as follows:
C =
2
VAR
(I
dc max
2
I
dc mIn
2
)
(14)
The dc capacitor voltage may deviate from its nominal
value because of overall losses in the inverter. The regulation
factor of dc voltage is defined as
e =
I
dc max
I
dc mIn
2I
dc
(15)
This factor may range from 5-20% practically. Using the
regulation factor of 10% in the 10 MVAR of static var
compensator system connected to 20 kV of distribution
system, the required capacitance C is 8.28 mF for 3.1 kV
nominal dc voltage.
If the total system losses can be expressed as D, then the
inverter active power flow can be defined as
p I
g
i
Id
+ (16)
The instantaneous dc capacitor voltage can be written as
:
dc
= I
dc
+ :
dc

(17)
:
dc
=
1
C
_
p
I
dc
Jt (18)
where V
dc
is the average dc voltage and v
dc
is the dc voltage
ripple. From Fig. 5, (16) and (18), the block diagram for dc
voltage control can be depicted as in Fig. 7 assuming an ideal
current control with unity gain.
Fig. 7. DC capacitor voltage control block diagram.

From Fig. 7, the transfer function can be obtained as
I
dc
(s)
(s)
=
sI
dc
s
2
CI
dc
I
dc
+ sK
dc
I
dc
I
gd
+K
dc
I
gd
(19)
The damping ratio
dc
and undamped natural frequency
ndc

are given by

dc
=
1
2
, _
K
dc
I
dc
I
gd
CI
dc

(20)

ndc
= _
K
dc
I
gd
CI
dc
I
dc

(21)
By using critically damped control response, the damping
ratio is
dc
=1, leading to control system parameters as follows:
K
dc
=
8uuCI
dc
I
gd
Av with I
dc
= S ms (22)
IV. SIMULATION RESULTS
To verify the proposed multilevel inverter topology as
static var compensator, the simulation using 7-level inverter
was carried out. The system configuration and system
parameters are shown in Fig. 5 and Table II. The system is
connected to low-voltage distribution system of 380 V and
controlling a 5 kvar of reactive power flow. The utility voltage
is assumed to be balanced three-phase system with constant
magnitude and frequency.
The simulation results of the proposed static var
compensator can be seen from Figs. 89. The system has the
capability to inject/absorb 5 kvar of reactive power. Fig. 8
shows the phase voltage and current of the proposed
multilevel inverter when the reactive power is change from 2
kvar leading to 5 kvar leading and finally to 5 kvar lagging.
The inverter voltage reacts instantaneously whenever the
reactive power reference is changed suddenly. Although the
reactive power reference changes from injecting to absorbing
mode, the inverter voltage can adapt the reactive power
demand with fast time response.
TABLE II
SIMULATION PARAMETERS
System Voltage V
G
380 V 50 Hz
Var Rating Q
VAR
5 kvar
DC Voltage V
dc
97.7V
Interface Inductance L
C
12% (11 mH)
Source Impedance L
S
2% (1.8 mH)
Cell Number N 3
DC Capacitor C 8.337 mF
Regulation Factor 5%
Transformer Turn Ratio r 1:1


q
v
ia
i
ia
q
v
dc
Fig.
step
T
V a
is c
regu
volt
T
stra
mod
exp
will
has
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syst
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Fig. 8. Simulat
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and s
neith
Thus
featu
appli
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
essed and run
form will pro
er and capaci
em parameter
rter voltage a
er and dc capa
Fig
his paper has
rter. Inverter
em for static
il. The simu
ilevel invert
ct/absorb reac
osed control s
sted as desi
ntained at a co
n general, the p
ularity, equal
simple control
her unbalance
s, the proposed
ures with whi
ications.
L. Gyugyi, P
compensators,
J. Dixon, L. M
compensation te
93, no. 12, pp. 2
E. Larsen, et.al
electric utility ap
2064, Oct. 1992
A. E. Hammad,
and future var
IEEE Trans. Pow
C. Schauder, et
voltage control o
10, pp. 1486-149
H. Fujita, S. T
advanced static
inverters, IEEE
1996.
J. Rodriguez, J.
of topologies, co
49, pp. 724-738
F. Z. Peng, et a
dc sources for s
32, pp. 1130-113
n in DS1104
vide the inpu
itor voltage re
rs continuous
and current, p
acitor voltage.
g. 10. Experimen
VI. CONC
s proposed a
topology, sw
var compen
ulation resul
ter has a
ctive power t
system schem
ired. Moreov
nstant level un
proposed topo
l utilization f
l procedure. A
problem nor c
d modular mu
ich very appli
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