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n
SN
(n 1)__
(3)
where h is odd harmonic number only. For N = 5, using
transformer ratio of 1 : r, the phase-to-phase effective
fundamental output voltage is
I
5 rms
= 7.4Sr I
dc
cos [
[
2
, (4)
It can be seen from (2) and (4) that the output voltage varies
linearly to cosines of 2. This feature has the advantage to
generate a simple switching control scheme.
Fig. 2. Modular cascaded multilevel inverter and its waveform.
Fig. 3. Signal waveform of each inverter leg in each cell.
C. Comparative Evaluation
In order to clarify the performance of the proposed modular
multilevel inverter system, a conceptual design of static var
compensator with 10 MVAR rating is used. It is assumed that
the static var compensator is designed to operate on medium-
voltage of distribution system (20 kV). The proposed
multilevel inverter design is then compared to the ones using
quad-series [6] and cascaded [8] inverter systems. Using the
most advanced power switching devices with rating up to
6kV/6kA, the dc source voltage can be as high as 3.1 kV.
Table I shows performance comparison among the three types
of static var compensator.
III. CONTROL METHOD
A static var compensator can be considered as voltage
source converter which connected in parallel to the power grid
through series inductance as shown in Fig. 4. The line
resistance is usually very small and can be neglected. The
objective of multilevel inverter control system is to ensure dc
voltage and reactive power flow at a desired command. When
the inverter voltage v
i
is higher than grid voltage v
g
, inverter
current will lead the voltage by 90
o
(reactive power injection).
On the contrary if the inverter voltage v
i
is smaller than grid
voltage v
g
, then inverter current will lag the voltage by 90
o
(reactive power absorption). Thus, controlling the inverter
voltage magnitude means controlling the reactive power flow.
Although theoretically var compensator does not exchange
active power to the grid, the inverter internal losses will cause
the capacitor voltage to deviate from its nominal value. By
adjusting the phase angle between inverter and grid voltages,
the active current will flow in/out to keep the dc voltage
constant.
The circuit equation for three-phase system as in Fig. 4 can
be written as
_
:
ga
:
gb
:
gc
_ _
:
Ia
:
Ib
:
Ic
_ = I
C
J
Jt
_
i
Ia
i
Ib
i
Ic
_ (5)
In dq synchronous reference frame, this equation can be
written as follows:
_
I
C
J
Jt
I
C
I
C
I
C
J
Jt
_ _
i
Id
i
Iq
_ = _
:
gd
:
Id
:
gq
:
Iq
_ (6)
where is system frequency; the subscript d and q are d-
axis and q-axis voltage/current component respectively.
Because the grid voltage vector :
g
is always aligned with d-
axis voltage component v
gd
, the q-axis component of grid
voltage v
gq
is always zero. The instantaneous active and
reactive power in dq synchronous reference frame can be
expressed as
p = :
gd
i
Id
+:
gq
i
Iq
= :
gd
i
Id
q = :
gd
i
Iq
:
gq
i
Id
= :
gd
i
Iq
(7)
TABLE I
COMPARISON SUMMARY
Aspects
Inverter Topology
Quad-series Cascade Proposed
Voltage level 11 21 21
Capacitor 1 15 1
DC voltage 3100 V 3100 V 3100 V
Transformer
Complex
configuration
-
15
single phase
S
P
= 1:2
S
Y
P
= S:2
1:1
Converter
construction
Identical but not
modular
Identical
and modular
Identical
and modular
Utilization
factor
equal unequal equal
Power switch 24 60 60
Control
strategies
angle
angle and
MI
and
angle
DC
unbalance
problem
No Yes No
Response
time
Medium Fast Fast
THD 8.7% 6.6 7.2% 3.6 7.6%
Fig. 4. Static var compensator model and its operation modes.
From (7), the active and reactive power control can directly
be determined by active and reactive current provided a
constant grid voltage. Therefore, controlling the reactive
current i
iq
alone is sufficient to control reactive power to the
grid. Moreover, to keep a constant dc voltage by controlling
active power flow, only the active current i
id
need to be
controlled. Thus, a fast current controller is desirable in this
method to achieve the system with fast dynamic time response.
A. Static Var Compensator with Proposed Multilevel Inverter
The complete control system and block diagram of the
proposed static var compensator is shown in Fig. 5. There are
two reference values in this system, which are the dc voltage
reference I
dc
which
proportional to reactive power q. The control system will then
produce * and * commands, which will control the active
and reactive power respectively. The *and * angle can be
obtained from d- and q-axis voltage references as
[
= 2cos
-1
`
_(I
Id
)
2
+(I
Iq
)
2
KrI
dc
/
(8)
o
= tan
-1
_
I
Iq
I
Id
_ (9)
where K is a topology characteristic constant and r is the
transformer ratio. The K value will be unique for each cell
numbers as in (3) with h = 1. For N = 5, K is equal to 7.45,
while for N = 3, K is equal to 4.49.
The inverter output voltage must be synchronized to the
power grid voltage. For this purpose, a phase locked loop
(PLL) circuit is used to obtain the grid voltage angle . This
angle will be used for all dq transformation process.
The dc voltage reference I
dc
. The
actual d- and q-axis currents, which obtained from inverter
currents using dq transformation, are then compared to the
reference values and the PI current controllers will
compensate the errors. The output of the current controllers is
the desired d-axis and q-axis inverter output voltages. By
using a look up table, the required and angle can be
determined.
B. Decoupled Current Control
The plant block diagram as shown in Fig. 5 implies that the
d- and q-axis currents cannot be controlled independently. To
solve the coupling problem, a feed-forward technique as
shown in current controller block diagram of Fig. 5 is used.
The actual output currents I
id
and I
iq
are multiplied by the line
reactance L
C
to produce additional signals to cancel out the
coupling effects. By using this method, the d-axis currents can
be controlled independently as shown in Fig. 6. The control
method for q-axis current has the same approach. The inverter
is assumed to have a unity gain, so the inverter output voltage
V
id
is equal to the voltage reference V
id
*.
From Fig. 6, the transfer function of d-axis current can be
determined as
I
Id
(s)
I
Id
(s)
=
K
C
L
C
1
C
+
K
C
L
C
s
s
2
+
K
C
L
C
s +
K
C
L
C
1
C
(10)
The damping ratio
C
and undamped natural frequency
nC
can be obtained as follows:
C
=
1
2
, _
K
C
I
C
I
C
(11)
nC
= _
K
C
I
C
I
C
(12)
By using critically damped control response, the damping
ratio is
C
= 1 and the current control gain K
C
and time
constant T
C
can be determined as
K
C
= 4uuuI
C
V/A with I
C
= 1 ms (13)
Fig. 5. Proposed static var compensator system and its control block diagram.
Fig. 6. Decoupled current control block diagram.
C. DC Capacitor Voltage Control
Single dc capacitor is used in the proposed system. A
simple control system is required to maintain dc voltage level.
By avoiding the resonance condition between dc capacitor and
line reactor, reduction of the dc voltage fluctuation can be
achieved. A simple right-hand rule can be used to determine
the required capacitance for single capacitor circuit with
nominal reactive power of Q
VAR
[8] as follows:
C =
2
VAR
(I
dc max
2
I
dc mIn
2
)
(14)
The dc capacitor voltage may deviate from its nominal
value because of overall losses in the inverter. The regulation
factor of dc voltage is defined as
e =
I
dc max
I
dc mIn
2I
dc
(15)
This factor may range from 5-20% practically. Using the
regulation factor of 10% in the 10 MVAR of static var
compensator system connected to 20 kV of distribution
system, the required capacitance C is 8.28 mF for 3.1 kV
nominal dc voltage.
If the total system losses can be expressed as D, then the
inverter active power flow can be defined as
p I
g
i
Id
+ (16)
The instantaneous dc capacitor voltage can be written as
:
dc
= I
dc
+ :
dc
(17)
:
dc
=
1
C
_
p
I
dc
Jt (18)
where V
dc
is the average dc voltage and v
dc
is the dc voltage
ripple. From Fig. 5, (16) and (18), the block diagram for dc
voltage control can be depicted as in Fig. 7 assuming an ideal
current control with unity gain.
Fig. 7. DC capacitor voltage control block diagram.
From Fig. 7, the transfer function can be obtained as
I
dc
(s)
(s)
=
sI
dc
s
2
CI
dc
I
dc
+ sK
dc
I
dc
I
gd
+K
dc
I
gd
(19)
The damping ratio
dc
and undamped natural frequency
ndc
are given by
dc
=
1
2
, _
K
dc
I
dc
I
gd
CI
dc
(20)
ndc
= _
K
dc
I
gd
CI
dc
I
dc
(21)
By using critically damped control response, the damping
ratio is
dc
=1, leading to control system parameters as follows:
K
dc
=
8uuCI
dc
I
gd
Av with I
dc
= S ms (22)
IV. SIMULATION RESULTS
To verify the proposed multilevel inverter topology as
static var compensator, the simulation using 7-level inverter
was carried out. The system configuration and system
parameters are shown in Fig. 5 and Table II. The system is
connected to low-voltage distribution system of 380 V and
controlling a 5 kvar of reactive power flow. The utility voltage
is assumed to be balanced three-phase system with constant
magnitude and frequency.
The simulation results of the proposed static var
compensator can be seen from Figs. 89. The system has the
capability to inject/absorb 5 kvar of reactive power. Fig. 8
shows the phase voltage and current of the proposed
multilevel inverter when the reactive power is change from 2
kvar leading to 5 kvar leading and finally to 5 kvar lagging.
The inverter voltage reacts instantaneously whenever the
reactive power reference is changed suddenly. Although the
reactive power reference changes from injecting to absorbing
mode, the inverter voltage can adapt the reactive power
demand with fast time response.
TABLE II
SIMULATION PARAMETERS
System Voltage V
G
380 V 50 Hz
Var Rating Q
VAR
5 kvar
DC Voltage V
dc
97.7V
Interface Inductance L
C
12% (11 mH)
Source Impedance L
S
2% (1.8 mH)
Cell Number N 3
DC Capacitor C 8.337 mF
Regulation Factor 5%
Transformer Turn Ratio r 1:1
q
v
ia
i
ia
q
v
dc
Fig.
step
T
V a
is c
regu
volt
T
stra
mod
exp
will
has
TM
syst
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Use
Sim
prev
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a
a
Fig. 8. Simulat
q
c
9. Simulated res
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and only a sm
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ulation factor
tage.
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V. EXPERIME
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er is being
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and s
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Thus
featu
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[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
essed and run
form will pro
er and capaci
em parameter
rter voltage a
er and dc capa
Fig
his paper has
rter. Inverter
em for static
il. The simu
ilevel invert
ct/absorb reac
osed control s
sted as desi
ntained at a co
n general, the p
ularity, equal
simple control
her unbalance
s, the proposed
ures with whi
ications.
L. Gyugyi, P
compensators,
J. Dixon, L. M
compensation te
93, no. 12, pp. 2
E. Larsen, et.al
electric utility ap
2064, Oct. 1992
A. E. Hammad,
and future var
IEEE Trans. Pow
C. Schauder, et
voltage control o
10, pp. 1486-149
H. Fujita, S. T
advanced static
inverters, IEEE
1996.
J. Rodriguez, J.
of topologies, co
49, pp. 724-738
F. Z. Peng, et a
dc sources for s
32, pp. 1130-113
n in DS1104
vide the inpu
itor voltage re
rs continuous
and current, p
acitor voltage.
g. 10. Experimen
VI. CONC
s proposed a
topology, sw
var compen
ulation resul
ter has a
ctive power t
system schem
ired. Moreov
nstant level un
proposed topo
l utilization f
l procedure. A
problem nor c
d modular mu
ich very appli
REFERE
Power electroni
in Proc. IEEE, v
Moran, J. Rodrigu
echnologies: state
2144-2164, Dec. 2
., Benefits of G
pplications, IEE
2.
Comparing the
compensating t
wer Del., vol. 11
al., Developmen
of transmission sy
96, July 1995.
ominaga, and H
c var compensat
E Trans. Ind. App
S. Lai, and F. Z.
ontrols, and appli
, Aug. 2002.
al., A multilevel
static var generat
38, Sept. /Oct. 19
4 via PCI car
ut references
eferences, an
sly, e.g. the
phase angle,
.
ntal control system
CLUSION
modular cas
witching patt
sator have b
ts show tha
fast dynam
to/from the s
me, the control
ver, the dc
nder dynamic
ology has the
factors among
As a single dc
complex contr
ultilevel invert
icable to low
ENCES
ics in electric
ol. 76, no. 4, pp.
uez and R. Dom
e-of-the-art review
2005.
GTO-based comp
EE Trans. Power D
voltage control
techniques in tr
, pp. 475-484, Jan
nt of a 100 Mva
ystems, IEEE Tr
H. Akagi, Analy
tor using quad-
plicat., vol. 32, pp
. Peng, Multilev
ications, IEEE T
l voltage-source
tion, IEEE Tran
996.
rd slot. The G
such as reac
d also shows
system volt
injected reac
m.
scaded multil
tern and con
een presented
at the propo
mic response
system. With
l response can
voltage can
c condition.
advantages o
g inverter blo
capacitor is u
rollers are exi
ter provides s
w-cost high-po
utilities: static
483-494, Apr. 19
mke, Reactive p
w, in Proc. IEEE
pensation system
Del., vol. 7, pp. 2
capabilities of pr
ansmission syste
n. 1996.
ar static condense
Trans. Power Del.
ysis and design o
-series voltage-so
p. 970-978, July/
vel inverters: A su
Trans. Ind. Electr
inverter with sep
ns. Ind. Applicat.
GUI
ctive
s the
tage,
ctive
level
ntrol
d in
osed
to
the
n be
be
of its
ocks
used,
isted.
ome
ower
var
988.
power
E, vol.
ms for
2056-
resent
ems,
er for
, vol.
of an
ource
/Aug.
urvey
r., vol.
parate
, vol.