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Quadratur
component
Inphase
component
Q(t)
I(t)
I
t
Q
I
16-QAM
16 Quadratur Amplitude Modulation
1 modulation symbol = 2 bits
1 modulation symbol = 4 bits
High Speed Downlink Packet Access (HSDPA) November 2006 10
Technology Overview
Key Features of HSDPA (II)
Hybrid automatic-repeat-request (HARQ)
Improving robustness against link adaptation errors
UE rapidly requests retransmissions of erroneously receveived data
UE can combine information from the original transmission with that of
later retransmissions (Soft Combining)
Fast scheduling in the Node B instead of RNC
Moving scheduling and processing of retransmissions closer to air
interface
New MAC-hs (Medium Access Control high speed) protocol entity in
the Node B
Short transmission time interval of 2ms
Accelerating packet scheduling for transmission
High Speed Downlink Packet Access (HSDPA) November 2006 11
HSDPA: Capacity aspects
|
|
|
|
|
|
|
.
|
\
|
+ =
N
S
T B C 1 log2
Capacity aspects:
How does HSDPA increase the capacity per user?
1.) Possibility of code combination
2.) Introduction of 16-QAM modulation scheme
3.) Permission of link adaption -> dynamic channel coding
High Speed Downlink Packet Access (HSDPA) November 2006 12
Technology Overview
Impact on Radio Access Network Architecture
Core Network
Radio Network Controller (RNC)
Node B:
Scheduling, Adaptive
modulation/coding, HARQ
Node B:
Scheduling, Adaptive
modulation/coding, HARQ
UTRAN
UE
High Speed Downlink Packet Access (HSDPA) November 2006 13
Technology Overview
Principle
Node B:
H
S
-
D
P
C
C
H
:
C
h
a
n
n
e
l
Q
u
a
l
i
t
y
(
C
Q
I
)
P
a
c
k
e
t
A
C
K
/
N
A
C
K
HS-(P)DSCH User Data
HS-SCCH Scheduling Information
Generation of
Scheduling Information
for the User Data
based on User Feedback
H
S
-
D
P
C
C
H
C
h
a
n
n
e
l
Q
u
a
l
i
t
y
(
C
Q
I
)
P
a
c
k
e
t
A
C
K
/
N
A
C
K
UE1
UE2
High Speed
Shared Control
Channel
High Speed Dedicated
Physical Control Channel
High Speed
(Physical) Downlink
Shared Channel
High Speed Downlink Packet Access (HSDPA) November 2006 14
Technology Overview
Channel Structure
The HS-DSCH is associated with one downlink Dedicated Physical Channel (DPCH), and one or several
High Speed Shared Control Channels (HS-SCCH).
The number of HS-SCCHs in a HS-SCCH set as seen from the UE can range from a minimum of 1 to a
maximum of 4 HS-SCCHs.
Downlink DPCH (R99)
Node B UE
HS-DPCCH
Shared Control Channel (HS-SCCH) #1
HS-DSCH
Uplink DPCH (R99)
ACK/NACK
Quality indication
Data
Shared Control Channel (HS-SCCH) #2
Shared Control Channel (HS-SCCH) #3
Shared Control Channel (HS-SCCH) #4
Transport Format /
Resource Indicator
HARQ Information
High Speed Downlink Packet Access (HSDPA) November 2006 15
New Physical and Transport Channels
HS-(P)DSCH
High Speed (Physical) Downlink Shared Channel
High Speed Downlink Packet Access (HSDPA) November 2006 16
HSDPA: subframe structure
Radio Frame
10 ms
38400 chips
at a chip rate of 3.84 MChips/s
....
666,6 As
2560 chips
at chip rate of 3.84 MChips/s
....
Slot #0
Slot #14
HSDPA subframe = 3 slots
2 ms total time
HSDPA subframe versus Rel-99 frame structure
High Speed Downlink Packet Access (HSDPA) November 2006 17
New Physical and Transport Channels
Structure of Downlink HS-PDSCH
Spreading Factor 16
Assignment of multiple channelization codes to one UE possible
Slot #0 Slot#1 Slot #2
Tslot =2560 chips
320 bits for QPSK, 640 bits for 16QAM
1 subframe of 3 slots: 2 ms
HS-DSCH transport channel
with user data
HS-DSCH:
transport channel
HS-PDSCH:
physical channel
High Speed Downlink Packet Access (HSDPA) November 2006 18
New Physical and Transport Channels
HS-PDSCH Code Allocation
SF=
1
SF=
2
SF=
4
SF=
8
SF=
16
SF=
32
SF=
64
SF=
128
SF=
256
2,0
2,1
4,0
8,0
16,0
32,0
64,0
128,0
256,1
256,3
256,4
256,5
256,6
256,7
256,8
256,9
256,10
256,11
256,12
256,13
256,14
256,15
16,15
16,1
16,2
16,3
16,4
16,5
16,6
16,7
16,8
16,9
16,10
16,11
16,12
16,13
16,14
8,1
8,2
8,3
8,4
8,5
8,6
8,7
4,1
4,2
4,3 256,249
256,250
256,251
256,252
256,253
256,254
256,255
256,248
1,0
32,1
32,31
64,1
64,2
64,3
64,62
64,63
128,126
128,127
256,2
128,125
128,124
128,1
128,2
128,3
128,4
128,5
128,6
128,7
32,30
:
:
256,0
All possible HS-PDSCH codes
Possible HS-SCCH codes (example)
CPICH
P-CCPCH
blocked
High Speed Downlink Packet Access (HSDPA) November 2006 19
New Physical and Transport Channels
HS-DSCH Coding Chain
CRC attachment to
each transport block
Code block segmentation
Channel Coding
Physical Layer Hybrid-ARQ
functionality
Bit Scrambling
PhCH#1 PhCH#P
Physical channel mapping
HS-DSCH Interleaving
Physical channel
segmentation
Constellation Re-
arrangement for
16QAM
Data arrives to the coding unit in form of a maximum of
one transport block once every transmission time interval.
Turbo Coding Rate 1/3
High Speed Downlink Packet Access (HSDPA) November 2006 20
New Physical and Transport Channels
Constellation Rearrangement
b=0 b=1
b=2
b=3
High Speed Downlink Packet Access (HSDPA) November 2006 21
New Physical and Transport Channels
HS-DSCH Coding Chain: Example
Example: Coding rate for Fixed reference Channel H-Set 1 (QPSK)
acc. to 3GPP TS 25.101:
Equivalent to nom. average information bit rate
of 534 kbps (=3202 bits / 3 (Inter TTI) / 2ms)
CRC length = 24 bits for HS-DSCH
Code Rate = 0,67
(= 3202 information bits / 4800 binary channel bits per TTI)
5 HS-PDSCHs
Rate matching to number of Soft
Channel Bits available for this
HARQ process (9600 bits)
Inf. Bit Payload
CRC Addition
Turbo-Encoding
(R=1/3)
3202
Code Block
Segmentation
1st Rate Matching
9600
Tail Bits
12 9678
3226
CRC 24 3202
Redundancy Version
Selection
4800
Physical Channel
Segmentation
960
High Speed Downlink Packet Access (HSDPA) November 2006 22
New Physical and Transport Channels
HS-SCCH
High Speed Shared Control Channel (Downlink)
High Speed Downlink Packet Access (HSDPA) November 2006 23
New Physical and Transport Channels
HS-SCCH Usage
HS-DSCH
I would like to receive data
but I dont know where my
HS-DSCH resources are and
how they look like.
?
HS-SCCH
Read the 1st HS-SCCH slot
for HS-DSCH channelization
codes and modulation
scheme.
Then, the 2nd and 3rd HS-SCCH
slot will tell you about
Transport block size information,
Hybrid-ARQ process information,
Redundancy/constellation version,
New data indicator.
High Speed Downlink Packet Access (HSDPA) November 2006 24
New Physical and Transport Channels
Structure of Shared Control Channel (HS-SCCH)
The HS-SCCH is a fixed rate (60 kbps, SF=128) downlink physical channel
used to carry downlink signalling related to HS-DSCH transmission
Slot #0 Slot#1 Slot #2
Tslot = 2560 chips
Data = 40 bits
1 subframe
= 2 ms
High Speed Downlink Packet Access (HSDPA) November 2006 25
New Physical and Transport Channels
Timing Relation between HS-SCCH and HS-PDSCH
Start of HS-SCCH subframe #0 is aligned with start of P-CCPCH frames.
The HS-PDSCH starts
t
HS-PDSCH
= 2Tslot = 5120 chips
after the start of the HS-SCCH.
H HS S- -S SC CC CH H
H HS S- -P PD DS SC CH H
3T
slot
= 7680 chips
3T
slot
7680 chips
HS-DSCHsub-frame
E
HS-PDSCH
(2*T
slot
= 5120 chips)
High Speed Downlink Packet Access (HSDPA) November 2006 26
New Physical and Transport Channels
HS-SCCH Contents
Channelization Code Set information (7 bits)
Modulation scheme information (1 bit)
Transport block size information (6 bits)
Hybrid-ARQ process information (3 bits)
Redundancy and constellation version (3 bits)
New data indicator (1 bit)
UE identity (16 bits) = H-RNTI
High Speed Downlink Packet Access (HSDPA) November 2006 27
New Physical and Transport Channels
HS-SCCH: Signalling of HS-PDSCH Code Allocation
C
l
u
s
t
e
r
c
o
d
e
I
n
d
i
c
a
t
o
r
(
3
b
i
t
s
)
Tree offset indicator (4 bits)
0 (1/15)
1 (2/14)
2 (3/13)
3 (4/12)
4 (5/11)
5 (6/10)
6 (7/9)
7 (8/8)
0 10 11 12 13 14 15 1 2 3 4 5 6 7 8 9
P
O
Decoding notation
Number of
multi-codes
Offset from
left/right in code
tree (SF=16)
1
1
2
1
3
1
4
1
5
1
6
1
7
1
1
2
2
2
3
2
4
2
5
2
6
2
7
2
1
3
2
3
3
3
4
3
5
3
6
3
7
3
1
4
2
4
3
4
4
4
5
4
6
4
7
4
1
5
2
5
3
5
4
5
5
5
6
5
7
5
1
6
2
6
3
6
4
6
5
6
6
6
7
6
1
7
2
7
3
7
4
7
5
7
6
7
7
7
1
8
2
8
3
8
4
8
5
8
6
8
7
8
7
9
8
8
1
9
2
9
3
9
4
9
5
9
6
9
6
10
9
7
8
7
1
10
2
10
3
10
4
10
5
10
5
11
10
6
9
6
8
6
1
11
2
11
3
11
4
11
4
12
11
5
10
5
9
5
8
5
1
12
2
12
3
12
3
13
12
4
11
4
10
4
9
4
8
4
1
13
2
13
2
14
13
3
12
3
11
3
10
3
9
3
8
3
1
14
1
15
14
2
13
2
12
2
11
2
10
2
9
2
8
2
15
1
14
1
13
1
12
1
11
1
10
1
9
1
8
1
Redundant area
SF=16
Code 0 is
reserved for
common
channels
Code offset
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
P=5
O=7
code group indicator:
x
ccs,1
, x
ccs,2
, x
ccs,3
= min(P-1,15-P)
code offset indicator:
x
ccs,4
, x
ccs,5
, x
ccs,6
, x
ccs,7
= |O-1-P/8 *15|
A cluster of codes
can be allocated to a UE:
C
ch,16,O
C
ch,16, O+P-1
Signalled on HS-SCCH ->
High Speed Downlink Packet Access (HSDPA) November 2006 28
New Physical and Transport Channels
HS-SCCH: Signalling of Transport Block Size
.. .. .. .. .. ..
6554 173 1430 88 161 3
6438 172 1405 87 149 2
6324 171 1380 86 137 1
TB Size Index TB Size Index TB Size Index
The Transport Block Size used on HS-DSCH is not signalled explicitly on HS-SCCH
Instead, a Transport Block Size Index ki is signalled which indicates the transport block size:
4
79 4 3
63 3 2
40 2 1
1 1 QPSK 0
Number of
channelization
codes
Modulation
scheme
Combination i
i
k
, 0
Table according to 3GPP TS 25.321, extract from QPSK section
First step:
Modulation scheme and number of
channelization codes as signalled
on HS-SCCH determine value k0,i
Second step:
Index kt = ki + k0,i determines
HS-DSCH transport block size
Table according to 3GPP TS 25.321, 254 entries in total
kt = ki + k0,i
High Speed Downlink Packet Access (HSDPA) November 2006 29
New Physical and Transport Channels
HS-SCCH: Signalling of Transport Block Size
Transportation Block Size
Minimum
137 bits
Maximum
25558 bits
Possible transportation block
Sizes complying with
the modulation scheme and number of
HS-PDSCHs
Begin depends on
Parameters: Modulation
scheme and number of HS-
PDSCHs
High Speed Downlink Packet Access (HSDPA) November 2006 30
New Physical and Transport Channels
HS-DPCCH
High Speed Dedicated Physical Control Channel (Uplink)
High Speed Downlink Packet Access (HSDPA) November 2006 31
New Physical and Transport Channels
HS-DPCCH Usage ACK/NACK
HS-DSCH
All the HS-DSCH data I
receive is incorrect!
Send me a NACK, maybe
I can do something for
you and send the same
packet again.
Maybe I will even send you a
new redundancy version.
This could increase the
probability that you can
decode the data.
HS-DPCCH:
NACK
High Speed Downlink Packet Access (HSDPA) November 2006 32
New Physical and Transport Channels
HS-DPCCH Usage CQI
HS-DSCH
I have to deliver regular
reports about the channel
quality I experience but I
have to do a lot of
calculations for this.
These reports really help me
in deciding who gets the
next data packet and how I
have to format it.
HS-DPCCH:
CQI (Channel Quality Indication)
High Speed Downlink Packet Access (HSDPA) November 2006 33
New Physical and Transport Channels
Structure of Uplink HS-DPCCH
Subframe #0 Subframe #i
Subframe #4
HARQ-ACK CQI= Channel Quality Information
One radio frame T
f
= 10 ms
One HS-DPCCH subframe (2 ms)
2T
slot
= 5120 chips
T
slot
= 2560 chips
The spreading factor of the HS-DPCCH is 256 (10 bits per uplink slot)
The HS-DPCCH can only exist together with an UL DPCCH (Ded. Phys. Control Channel).
The DPDCH (Dedicated Physical Data Channel), the DPCCH and the HS-DPCCH are I/Q
code multiplexed.
High Speed Downlink Packet Access (HSDPA) November 2006 34
New Physical and Transport Channels
Spreading for Uplink DPCCH, DPDCHs and HS-DPCCH
I
E
j
c
d,1 |
d
S
dpch,n
I+jQ
DPDCH
1
Q
c
d,3 |
d
DPDCH
3
c
d,5 |
d
DPDCH
5
c
d,2 |
d
DPDCH
2
c
d,4 |
d
c
c |
c
DPCCH
E
S
c
hs
HS-DPCCH
DPDCH
4
c
hs
HS-DPCCH
|
hs
|
hs
c
d,6 |
d
DPDCH
6
Scrambling
HS-DPCCH
maximum number of
DPDCH is even
maximum number of
DPDCH is odd
High Speed Downlink Packet Access (HSDPA) November 2006 35
5/15 0
6/15 1
8/15 2
9/15 3
12/15 4
15/15 5
19/15 6
24/15 7
30/15 8
Signalling values for
A
ACK
, A
NACK
and A
CQI
New Physical and Transport Channels
Gain Factors for UL HS-DPCCH
Power offset A
HS-DPCCH
for each HS-DPCCH slot
A
HS-DPCCH
= A
ACK
for slots carrying ACK
A
HS-DPCCH
= A
NACK
for slots carrying NACK
A
HS-DPCCH
= A
CQI
for slots carrying CQI
Gain factor |
hs
defined as
Signalled by higher layers
(values 08)
|
.
|
\
|
A
=
20
10
DPCCH HS
c hs
| |
Quantized amplitude
ratios for
|
.
|
\
| A
20
10
DPCCH HS
High Speed Downlink Packet Access (HSDPA) November 2006 36
New Physical and Transport Channels
Timing Relations for UL HS-DPCCH
m = (TTX_diff /256 ) + 101
TTX_diff is the difference in chips (TTX_diff =0, 256, ....., 38144) between the transmit timing of the
start of the related HS-PDSCH and the transmit timing of the start of the related downlink DPCH frame
m therefore takes one of a set of five possible values according to the 5 possible transmission timings
of HS-DSCH sub-frame relative to the DPCH frame boundary.
Uplink
DPCH
H HS S- -P PD DS SC CH H
a at t U UE E
U Up pl li in nk k
H HS S- -D DP PC CC CH H
Slot #0 Slot #1 Slot #2 Slot #3 Slot #4 Slot #5 Slot #6 Slot #7 Slot #8 Slot #9 Slot #10 Slot #11 Slot #12
E
UEP
M19200 chips = 7,5 slots
m*256 chips
Tslot = 2560 chips
3 * Tslot = 7680 chips
High Speed Downlink Packet Access (HSDPA) November 2006 37
New Physical and Transport Channels
Round Trip Timing
HS-SCCH Retransmit
HS-PDSCH Retransmit
A/N CQI
18 slots = 12 ms
3 slots 2 slots
2 slots
Minimum retransmission delay = 12 ms
2* Tprop + 15.5 slots
A
A = Processing times in L1 and MAC-hs
High Speed Downlink Packet Access (HSDPA) November 2006 38
New Physical and Transport Channels
More Timing Relations
k:th
S-CCPCH
AICH access
slots
Secondary
SCH
Primary
SCH
t
S-CCPCH,k
10 ms
t
PICH
#0 #1 #2 #3 #14 #13 #12 #11 #10 #9 #8 #7 #6 #5 #4
Radio framewith(SFN modulo 2) = 0 Radio framewith(SFN modulo 2) = 1
t
DPCH,n
P-CCPCH
Any CPICH
PICH for k:th
S-CCPCH
n:th DPCH
10 ms
Subframe
#0
HS-SCCH
Subframes
Subframe
#1
Subframe
#2
Subframe
#3
Subframe
#4
Why this timing?
High Speed Downlink Packet Access (HSDPA) November 2006 39
Timing T
DPCH
of each DPCH usage
t
+1
-1
T 2T
x
1
(t) = d
1
(t ) * c
1
(t)
t
+1
-1
T 2T
x(t) = x
1
(t) + x
2
(t)
t
+1
-1
T 2T
+2
-2
x
2
(t) = d
2
(t ) * c
2
(t)
Sum
0 -> +1
1 -> -1
Spreaded signals are added in a multi-user scenario,
e.g. downlink signal from node B.
This will engender an impact on the amplitude of
the sum signal.
Problem:
If the input signal from each user DPCH will
have the same content, like it is in the period
of e.g. the Pilot bits -> The Crest Factor will
rise!
Solution:
Node B will set a timing T
DPCH
for each
Downlink DPCH individually to randomize the signal behaviour
High Speed Downlink Packet Access (HSDPA) November 2006 40
High Speed Downlink Packet Access
DL DPCH Timing Offset
P-CCPCH
DL-DPCH
HS-SCCH
HS-PDSCH
UE timing
2slots
T_dpch_offset
1 Radio Frame = 10 ms
Propagation Delay
DL-DPCH
T_txdiff
HS-PDSCH
UL-DPCH
HS-DPCCH
T_dl_ul_offset = 1024 chips
T_UlDpch-HsDpcch = (T_txdiff + 101)*256 chips
Propagation Delay
7.5 slots
DPCH offset 21
alignment of
UL DPCH and
HS-DPCCH
High Speed Downlink Packet Access (HSDPA) November 2006 41
High Speed Downlink Packet Access
DL DPCH Timing Offset
P-CCPCH
DL-DPCH
HS-SCCH
HS-PDSCH
UE timing
2slots
T_dpch_offset
1 Radio Frame = 10 ms
Propagation Delay
DL-DPCH
T_txdiff
HS-PDSCH
UL-DPCH
HS-DPCCH
T_dl_ul_offset = 1024 chips
T_UlDpch-HsDpcch = (T_txdiff + 101)*256 chips
Propagation Delay
7.5 slots
DPCH offset 22
10% overlap of
UL DPCH and
HS-DPCCH
High Speed Downlink Packet Access (HSDPA) November 2006 42
High Speed Downlink Packet Access
DL DPCH Timing Offset
P-CCPCH
DL-DPCH
HS-SCCH
HS-PDSCH
UE timing
2slots
T_dpch_offset
1 Radio Frame = 10 ms
Propagation Delay
DL-DPCH
T_txdiff
HS-PDSCH
UL-DPCH
HS-DPCCH
T_dl_ul_offset = 1024 chips
T_UlDpch-HsDpcch = (T_txdiff + 101)*256 chips
Propagation Delay
7.5 slots
DPCH offset 26
50% overlap of
UL DPCH and
HS-DPCCH
High Speed Downlink Packet Access (HSDPA) November 2006 43
High Speed Downlink Packet Access
DL DPCH Timing Offset
DL DPCH timing offset results in a propable
non slot alignment between HS-DPCCH and the DPCH
slot
1 slot = 2560 chips = 10 symbols
50% overlap
slot
alignment
Remark
1 10
2 9
3 8
4 7
5 6
6 5
7 4
8 3
9 2
0 1
1 0
realtive timing difference DPCH vs. HS-DPCCH
(symbols)
T_dpch_offset
(symbols)
High Speed Downlink Packet Access (HSDPA) November 2006 44
Data Rates
10 or 14 Mbps?
High Speed Downlink Packet Access (HSDPA) November 2006 45
Data Rates
How are 14.4 Mbps derived?
1 slot HS-PDSCH (equivalent to 10 ms / 15 = 666.7 us) using 16 QAM contains 640 bits
Maximum 15 HS-PDSCH codes can be allocated to a UE
15 HS-PDSCHs therefore result in a gross bit rate of
15* 640 bits / 666.7 us = 14.4 Mbps
This does not include any channel
coding and is therefore a rather
theoretical value
Slot #0 Slot#1 Slot #2
Tslot = 2560 chips
320 bits for QPSK, 640 bits for 16QAM
1 subframe of 3 slots: 2 ms
High Speed Downlink Packet Access (HSDPA) November 2006 46
Data Rates
User Equipment Classes
28800 3630 1 5 Category 12*
14400 3630 2 5 Category 11*
172800 27952 1 15 Category 10
172800 20251 1 15 Category 9
134400 14411 1 10 Category 8
115200 14411 1 10 Category 7
67200 7298 1 5 Category 6
57600 7298 1 5 Category 5
38400 7298 2 5 Category 4
28800 7298 2 5 Category 3
28800 7298 3 5 Category 2
19200 7298 3 5 Category 1
Total number
of soft channel
bits
Maximum number of
bits of an HS-DSCH
transport block
received within
an HS-DSCH TTI
Minimum
inter-TTI
interval
Maximum
number of HS-
DSCH codes
received
HS-DSCH category
1.2 Mbps class
3.6 Mbps class
7 Mbps class
10 Mbps class
*QPSK only
3
G
P
P
T
S
2
5
.
3
0
6
High Speed Downlink Packet Access (HSDPA) November 2006 47
Adaptive Modulation and Coding
Motivation
Principle
Channel Quality Reporting
High Speed Downlink Packet Access (HSDPA) November 2006 48
Adaptive Modulation and Coding
Principle
HS-DSCH data rate is adjusted by
modifying
modulation scheme
effective code rate
number of HS-PDSCH codes
Decision based on channel quality reports
from UE
HS-DSCH,
e.g. 16QAM,
code rate 3/4
HS-DSCH,
e.g. QPSK,
code rate 1/2
High Speed Downlink Packet Access (HSDPA) November 2006 49
Adaptive Modulation and Coding
Channel Quality Reporting
HS-DSCH modulation /
coding adapted acc. to
proposed CQI
HS-DPCCH:
proposed CQI
(every 2ms160ms)
-2 16-QAM 5 7168 24
-1 16-QAM 5 7168 23
0 16-QAM 5 7168 22
0 16-QAM 5 6554 21
0 16-QAM 5 5887 20
0 16-QAM 5 5287 19
0 16-QAM 5 4664 18
0 16-QAM 5 4189 17
0 16-QAM 5 3565 16
0 QPSK 5 3319 15
0 QPSK 4 2583 14
0 QPSK 4 2279 13
0 QPSK 3 1742 12
0 9600
XR
V
NIR Reference
power
adjustment A
Modulati
on
Number
of
HS-
PDSCH
Transport
Block Size
CQI
value
UE proposes CQI value so that
HS-DSCH transport block error
probability would not exceed 0.1
Table according to 3GPP TS 25.214
High Speed Downlink Packet Access (HSDPA) November 2006 50
Adaptive Modulation and Coding
Channel Quality Reporting
-2 16-QAM 5 7168 24
-1 16-QAM 5 7168 23
0 16-QAM 5 7168 22
0 16-QAM 5 6554 21
0 16-QAM 5 5887 20
0 16-QAM 5 5287 19
0 16-QAM 5 4664 18
0 16-QAM 5 4189 17
0 16-QAM 5 3565 16
0 QPSK 5 3319 15
0 QPSK 4 2583 14
0 QPSK 4 2279 13
0 QPSK 3 1742 12
0 9600
XR
V
NIR Reference
power
adjustment A
Modulati
on
Number
of
HS-
PDSCH
Transport
Block Size
CQI
value
3GPP TS 25.214 contains 5
different tables for:
Categories 1-6
Categories 7-8
Category 9
Category 10
Categories 11,12
Each table contains definitions for
CQI values 030
High Speed Downlink Packet Access (HSDPA) November 2006 51
Adaptive modulation and coding (AMC)
Tests 1&2 2codesx4TS
0
200
400
600
800
1000
1200
-2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SIR(dB)
T
h
r
o
u
g
h
p
u
t
(
b
i
t
s
/
s
u
b
-
f
r
a
m
e
)
QPSK 240 QPSK 253
QPSK 267 QPSK 282
QPSK 298 QPSK 315
QPSK 332 QPSK 351
QPSK 370 QPSK 391
QPSK 413 QPSK 436
QPSK 461 QPSK 487
QPSK 514 QPSK 543
QPSK 573 QPSK 605
QPSK 639 QPSK 675
16-QAM675 16-QAM712
16-QAM752 16-QAM794
16-QAM839 16-QAM886
16-QAM936 16-QAM988
16-QAM1043 16-QAM1102
16-QAM1163
High Speed Downlink Packet Access (HSDPA) November 2006 52
CQI encoding with (20,5) code
SIR
T
h
r
o
u
g
h
p
u
t
high
low
high low
4CQI
n
4CQI
n-1
4CQI
n-2
4CQI
n+2
4CQI
n+1
Prevailing conditions of SIR
Optimum
throughput if the UE
reports CQI
n
SIR changes, CQI reporting must follow!
If misunderstanding
of CQI leeds to
usage of CQI close
to optimum, impact
is not too serious
If misunderstanding
of CQI leeds to
usage of CQI remote
to optimum, impact
is serious-> data rate
slumps down
CQI is using (20,5) code to reduce mean BER, like e.g. Gray encoding
High Speed Downlink Packet Access (HSDPA) November 2006 53
New Physical and Transport Channels
Channel Coding for CQI
Channel Coding for CQI is using a (20,5) code
Code words of the (20,5) code are a linear combination
of the 5 basis sequences denoted Mi,n
Channel quality information bits are converted to binary
representation: a0, a1, a2, a3, a4
Output bits b
i
are then given by:
i = 019
1 0 0 0 0 19
1 0 0 0 0 18
1 0 0 0 0 17
1 0 0 0 0 16
1 0 0 0 0 15
1 1 1 1 1 14
1 1 1 1 0 13
1 1 1 0 1 12
1 1 1 0 0 11
1 1 0 1 1 10
1 1 0 1 0 9
1 1 0 0 1 8
1 1 0 0 0 7
1 0 1 1 1 6
1 0 1 1 0 5
1 0 1 0 1 4
1 0 1 0 0 3
1 0 0 1 1 2
1 0 0 1 0 1
1 0 0 0 1 0
M
i,4
M
i,3
M
i,2
M
i,1
M
i,0
i
2 mod ) (
,
4
0
M a b
n i
n
n i
=
=
High Speed Downlink Packet Access (HSDPA) November 2006 54
Adaptive Modulation and Coding
Channel Quality Reporting
-2 16-QAM 5 7168 24
-1 16-QAM 5 7168 23
0 16-QAM 5 7168 22
0 16-QAM 5 6554 21
0 16-QAM 5 5887 20
0 16-QAM 5 5287 19
0 16-QAM 5 4664 18
0 16-QAM 5 4189 17
0 16-QAM 5 3565 16
0 QPSK 5 3319 15
0 QPSK 4 2583 14
0 QPSK 4 2279 13
0 QPSK 3 1742 12
0 9600
XR
V
NIR Reference
power
adjustment A
Modulati
on
Number
of
HS-
PDSCH
Transport
Block Size
CQI
value
Example: UE proposes CQI value 19.
CQI value 19 corresponds to
Transport Block Size 5287 bits
5 HS-PDSCHs
16QAM Modulation
UE assumes:
HS-DSCH power [dB]:
I signalled by higher layers
Virtual IR buffer NIR
Redundancy version X
RV
A + I + =
CPICH HSPDSCH
P P
High Speed Downlink Packet Access (HSDPA) November 2006 55
Hybrid ARQ
Protocol Definition
Motivation
Principle
HS-DSCH Coding Chain
Physical Layer HARQ Functionality
Redundancy Version Coding
HARQ Processes
High Speed Downlink Packet Access (HSDPA) November 2006 56
Hybrid ARQ
Protocol Definition
ARQ / Automatic Repeat Request:
Receiver detects errors and requests retransmissions of erroneous packets
HARQ / Hybrid-ARQ:
Coding is applied to transmission packets
Receiver does not delete received symbols when decoding fails
but combines the new transmission with the old one in the buffer
Two ways of operating:
Identical retransmission (Chase Combining)
Non-identical retransmission (Incremental Redundancy)
Data
NACK
Data
ACK
High Speed Downlink Packet Access (HSDPA) November 2006 57
Hybrid ARQ
Chase Combining
Turbo Encoder output (36 bits)
Rate Matching to 16 bits (Puncturing)
Chase Combining at receiver
Systematic Bits
Parity 1
Parity 2
Systematic Bits
Parity 1
Parity 2
Systematic Bits
Parity 1
Parity 2
Original Transmission Retransmission
High Speed Downlink Packet Access (HSDPA) November 2006 58
Hybrid ARQ
Incremental Redundancy
Turbo Encoder output (36 bits)
Rate Matching to 16 bits (Puncturing)
Incremental Redundancy Combining at receiver
Systematic Bits
Parity 1
Parity 2
Systematic Bits
Parity 1
Parity 2
Systematic Bits
Parity 1
Parity 2
Original Transmission Retransmission
High Speed Downlink Packet Access (HSDPA) November 2006 59
Hybrid ARQ
Motivation
Limitations of Adaptive Modulation and Coding:
- accuracy of CQI reporting
- effect of delay
HARQ can be understood as an implicit link adaptation technique:
- Does not rely on explicit C/I or similar measurements
- Link layer acknowledgements are used for re-transmission decisions
- Autonomously adapts to the instantaneous channel conditions
- Insensitive to measurement error and delay
AMC provides the coarse data rate selection.
H-ARQ provides for fine data rate adjustment based
on channel conditions.
Combination of
AMC and HARQ
High Speed Downlink Packet Access (HSDPA) November 2006 60
Hybrid ARQ
HS-DSCH Coding Chain
CRC attachment to
each transport block
Code block segmentation
Channel Coding
Physical Layer Hybrid-ARQ
functionality
Bit Scrambling
PhCH#1 PhCH#P
Physical channel mapping
HS-DSCH Interleaving
Physical channel
segmentation
Constellation Re-
arrangement for
16QAM
Data arrives to the coding unit in form of a maximum of
one transport block once every transmission time interval.
Redundancy Version
determined by
parameters r and s
Constellation
determined by
parameter b
Signalled to UE
on HS-SCCH
Signalled to UE
on HS-SCCH
Turbo Coding Rate 1/3
High Speed Downlink Packet Access (HSDPA) November 2006 61
Hybrid ARQ
Physical Layer HARQ Functionality (I)
RM P1_1
RM P2_1
RM S
RM P1_2
RM P2_2
N
sys
N
p1
N
p2
N
t,sys
N
t,p1
N
t,p2
First Rate
Matching
Virtual
IR Buffer
Second Rate
Matching
Systematic bits
Parity 1 bits
Parity 2 bits
RV Parameters
s and r
From
turbo
coder
matches the number of bits to the
number of soft channel bits available in
the virtual IR buffer (puncturing)
T
o
P
h
y
s
i
c
a
l
C
h
a
n
n
e
l
S
e
g
m
e
n
t
a
t
i
o
n
IR buffer size can
be configured
matches the number of bits to the number of
physical channel bits in the HS-PDSCH set;
generates different redundancy versions
which mainly influences HARQ performance
Turbo Coder outputs Systematic bits
and two streams of parity bits
Systematic bits are identical to the input
bits to the turbo coder
High Speed Downlink Packet Access (HSDPA) November 2006 62
Hybrid ARQ
Physical Layer HARQ Functionality (II)
RM P1_1
RM P2_1
RM S
RM P1_2
RM P2_2
N
sys
N
p1
N
p2
N
t,sys
N
t,p1
N
t,p2
First Rate
Matching
Virtual
IR Buffer
Second Rate
Matching
Systematic bits
Parity 1 bits
Parity 2 bits
F
r
o
m
t
u
r
b
o
c
o
d
e
r
3
*
7
2
0
b
i
t
s
=
2
1
6
0
b
i
t
s
a
r
e
a
r
r
i
v
i
n
g
T
o
P
h
y
s
i
c
a
l
C
h
a
n
n
e
l
S
e
g
m
e
n
t
a
t
i
o
n
,
9
6
0
b
i
t
s
a
v
a
i
l
a
b
l
e
o
n
H
S
-
P
D
S
C
H
Example assumptions:
1 HS-PDSCH code with QPSK available (960 bits)
720 bits input to turbo coder -> (720 * 3) bits output of turbo coder
Virtual IR buffer size = 1920 bits
Virtual IR
buffer size
= 1920 bits
720 bits
720 bits
720 bits
2160 bits have to be matched to
1920 bits by puncturing (-11%)
1920 bits have to be matched to
960 bits by puncturing (-50%),
High Speed Downlink Packet Access (HSDPA) November 2006 63
Hybrid ARQ
Signalling of Redundancy Version (QPSK) on HS-SCCH
Redundancy Version Coding Sequences are signalled on HS-SCCH, example:
-{0,2,5,6}: one initial transmission + 3 retransmissions with different r and s parameters
3 0 7
3 1 6
2 0 5
2 1 4
1 0 3
1 1 2
0 0 1
0 1 0
r s X
rv
(value)
Initial transmission
1st retransmission
2nd retransmission
3rd retransmission
s=1: systematic bits are prioritized
s=0: non systematic bits are prioritized
r (range 0 to 3 for QPSK) influences:
input parameter of puncturing or
(together with s) of repetition
algorithm defined in TS 25.212
selection of parity bits
High Speed Downlink Packet Access (HSDPA) November 2006 64
Hybrid ARQ
Signalling of Redundancy Version (16QAM) on HS-SCCH
0 1 1 7
3 0 1 6
2 0 1 5
1 0 1 4
1 1 0 3
1 1 1 2
0 0 0 1
0 0 1 0
b r s X
rv
(value)
Redundancy Version Coding Sequences are signalled on HS-SCCH, example:
-{6,4,0,5}: Chase combining (no change in s and r parameters, i.e. same redundancy
version) with 4 possible constellations
Initial transm.
3rd retransm.
1st retransm.
2nd retransm.
Definition of
parameter s as
for QPSK
r (range 0 to 1 for 16QAM) influences input
parameter of puncturing or (together with s) of
repetition algorithm defined in TS25.212 and thus
selection of parity bits
b (range 0 to 3) describes
constellation rearrangement
to average reliability of bits
High Speed Downlink Packet Access (HSDPA) November 2006 65
HARQ principle: Multitasking
t
BS, Tx
UE, Tx
Data Data
Nt
Demodulate, decode, descramble,
despread, check CRC, etc.
ACK/NACK
Minimum processing time for UE
receiver
Data Data
UE, Tx
Demodulate, decode, descramble,
despread, check CRC, etc.
Remark, for being able to receive an Inter-TTI of 1 it is required to
handle 6 parallel HARQ processes
ACK/NACK
High Speed Downlink Packet Access (HSDPA) November 2006 66
Hybrid ARQ
HARQ Processes
asynchronous DL - synchronous UL
Number of H-ARQ processes = 1..8 per UE
High Speed Downlink Packet Access (HSDPA) November 2006 67
MAC-hs Protocol Entity
Overall Protocol Architecture
Functions and Architecture UTRAN and UE Side
MAC-d Flows and Priority Queue Handling
MAC-hs Protocol Data Unit
MAC-hs Reset
High Speed Downlink Packet Access (HSDPA) November 2006 68
MAC-hs Protocol Entity
Protocol Architecture with New MAC-hs Protocol
L2
L1
HS-
DSCH
FP
RLC
L2
L1
HS-
DSCH
FP
Iub/ Iur
PHY
MAC
PHY
RLC
Uu
MAC-
hs
MAC-d
New protocol entity in Node B
One entity for each cell supporting HSDPA
UE
Node B
RNC
MAC = Medium Access Control
RLC= Radio Link Control
FP = Frame Protocol
High Speed Downlink Packet Access (HSDPA) November 2006 69
MAC-hs Protocol Entity
UE Side MAC Architecture
MAC-d
FACH RACH
DCCH DTCH DTCH
DSCH
DCH DCH
MAC Control
USCH
( TDD only )
CPCH
( FDD only )
CTCH BCCH CCCH SHCCH
( TDD only )
PCCH
PCH FACH
MAC-c/sh
USCH
( TDD only )
DSCH
MAC-hs
HS-DSCH
Associated Uplink
Signalling
Associated Downlink
Signalling
High Speed Downlink Packet Access (HSDPA) November 2006 70
MAC-hs Protocol Entity
UE Side MAC-hs Architecture
MAC-hs
MAC Control
Associated Uplink Signalling
To MAC-d
Associated Downlink Signalling
HS-DSCH
HARQ
Reordering Reordering
Re-ordering queue distribution
Disassembly
Disassembly
High Speed Downlink Packet Access (HSDPA) November 2006 71
NBAP: HS-DSCH Information to Modify (Extract)
9.2.1.52B M >>>RLC Mode