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Memory in Microcontrollers
Instructor: Phm Xun Trung

Contents

The general structure and organization of memory in microcontrollers: medium-end PICs Basic memory concepts, including word, address, and memory size The description of the two methods to organize memory in microcontrollers: linear memory and paged memory

Basic Concepts

Memory: the place stores the program being executed and the data or variables used by that program. A word is the logic unit of information stored in a cell. An 8-bit word is called a byte The address identifies a specific cell in the whole memory

Basic Concepts

Memory

Word

Address

Basic Concepts

Memory Unit

CPU

Processor

In a microprocessor system or a microcontroller, a single processor block is in charge of all input, output, calculations and control.

Addresses in a memory

Addresses in a memory of N cells, with each cell being 8 bits long. D = 0, 1, 2, , (N 1). The number of bits (n) needed to identify the address of a cell depends on the memory size (N): N = 2^n.

Addresses in a memory

Logic Organization of Memory

There are two main methods of organizing memory in microcontrollers:as a single block (linear organization) or by sets of blocks called pages. the address of a specific cell is a combination of two elements: page number (pgnum) and its displacement (disp)

Logic Organization of Memory

The logic address (Logaddr):

Logic Organization of Memory

Linear organization

The cell addresses are consecutive binary numbers. Each cell is identified by its linear address (D), made up by a unique binary number.

Linear organization

Linear organization

a page-organized memory

Pages are consecutive and do not overlap. Each page can be identified with a consecutive number called a page number. Inside a page, cells are identified by their position, called displacement, relative to the beginning of the page

Paged memory

Relationship between linear address and paged address

D = pgnum pgsz + disp. e.g: D = 2 100h + A5h = 2A5h.

Relationship between linear address and paged address

Memory in Medium-End PIC Microcontrollers

PICmicro x14 Architecture:Harvard Architecture

Separate memory spacesfor instructions and data

Increases throughput Different program and data bus widths are possible

Architecture - continued
Program counter: The program counter stores the current program position. After each instruction the program counter is incremented automatically so that it points to the location of the next instruction or data in memory. Stack: The stack is used to save program counter contents when subroutines are called. The PIC16F has an 8-level stack. Reset vector: On power-up or reset, the PIC16F will go to program memory and begin executing instructions sequentially. Interrupt vector: In the PIC16F, this points to 0x04, so that if an interrupt occurs, the first instruction to be executed will be at this location. Interrupts are configured in the interrupt control register. Status register: The status register is a very important register which contains all the arithmetic status of the ALU and Reset status. The contents of the status register are updated after certain instructions which modify the W (working) register.

CPU Registers

Special registers

Working register STATUS register FSR (File Select Register) INDF register Program counter (13 bits) PCLATH (Program Counter Latch) (5 bits) PCL (8 bits) Eight-level stack

Program Memory

Program memory is organized in pages. Used for storing compiled code Each location is 14 bits long Every instruction is coded as a 14 bit word Addresses H000 and H004 are treated in a special way 2k words each page. PC can address up to 8K addresses

PIC Program Memory

The PIC16F877 8192 (8k) 14bit instructions

Takes a max of 8 addresses, the ninth address will write over the first. When the controller is reset, program execution starts from here If interrupted, program execution continues from here

PIC Program Memory

PIC Program Memory

Two Special addresses

Reset Vector Address (0000h)

When the CPU starts up from its reset state, its PC is automatically clearedto zero. 0004h is automatically loaded into the program counter when an interruptoccurs

Interrupt Vector Address (0004h)

Reset

What happens on RESET? Two possible causes for RESET

Power applied to 16F877A MCLR (master clear) asserted active low Reset vector stored at 0x000 Program counter jumps to actual program start

PC automatically cleared to 0x000

Program may start at 0x005 or higher address

Addressing Program Memory

Program Memory (Instruction Memory)

Program counter(PC)

Register within CPU Holds the address of the next instruction to be fetched from memory Goes through step by step counting sequence - causes the computer to read successive instruction stored in memory PC is modified with new address when there is a jump or transfer or subroutine call instruction example

PC cont.
CPU Program memory Data memory A B Status register IX SP PC Stack

Control, data, address bus

ALU

Control unit

PC

Program counter(PC)

Program counter (PC) and other components in a program memory address: page number (2 bits) and displacement (11 bits). The page number is loaded from bits PCLATH<4:3>. The 8 least significant bits in the PC make up the register PCL. PCLATH and PCL are special function registers located in the microcontrollers data memory.

PC cont.

The page number is loaded in bits 4 and 3 in PCLATH (PCLATH <4:3>). Program counter (PC) and other components in a program memory address: page number (2 bits) and displacement (11 bits).

PC cont.

PC cont.

Executing an instruction whose destination is the PCL. The 8 least significant bits of the PC are loaded with the result of the instructions. the 5 most significant bits of the PC are loaded with the 5 least significant bits of the PCLATH register

PC cont.

Executing a goto or call instruction. the 11 least significant bits of the PC come from the instruction. the 2 most significant bits are loaded from bits 4 and 3 in PCLATH

PC cont.

PC

PCL

PCLATH

Stack

The stack is a data storage structure using a last in, first out (LIFO) approach: the last data entering the stack is the first data leaving the stack. The stack has a base and a top. The depth of the stack is the size of the stack in a given moment.

Stack

Stack

The stack has some specific characteristics:

The stack is separated from the data memory and program memory. The stack can only store addresses. The size of the stack is limited,8-level deep x 13-bit wide hardware stack The stack space is not part of either program or data space andthe stackpointer is not readable or writable. The PC is PUSHed onto the stack when a CALL instruction isexecuted, or an interrupt causes a branch. The stack is POPed in the event of a RETURN, RETLW or aRETFIE instruction execution. However, NO PUSH or POP instructions ! PCLATH is not affected by a PUSH or POP operation.

The stack operates as a circular buffer: after the stack has been PUSHed eight times, the ninth pushoverwrites the value that was stored from the first push.

Stack

The stack is used to store instruction addresses and in particular to remember the address to return to the main program from a subroutine.

Stack

Reading and Writing the Program Memory

Textbook Microcontrollers: Fundamentals and Applications with PIC(page 47 50)

Register File Memory

Programming model for medium-end PIC microcontrollers with three types of registers: Work (W) register, special function registers (SFRs), and general purpose registers (GPRs).

Register File Memory

The most important registers have
addresses

in all the four banks

The data memory is devided into 4 memory banks

W register

In PIC microcontrollers the register associated with the ALU is called the W register. The W register carries out tasks similar to the ACC When carrying out arithmetic or logic operations, one of the operands must be in the W register. The resulting value will be placed either in the W register or in any other register in the data memory. Data transfer occurs between the W register and any other register in the data memory

W register

Relationship between the ALU, working (W) register, and data memory

Relationship between the ALU, working (W) register, and data memory

Register File Memory

RAM Data Memory

Similar to program memory, data memory is also divided in different pages. These pages are called banks. Each bank can have up to 128 memory cells or registers

RAM Data Memory

Addressing Data Memory

The address of a memory cell needs 9 bits. Bits 8 and 9 indicate the bank number and bits 6 to 0 indicate the address within that bank (displacement). The two bits that identify the bank come from the STATUS special function register. The displacement can be located either in the instruction (direct addressing) or in the special function register FSR (indirect addressing).

Addressing Data Memory

Register File Addressing Cont.

Status register:

After an ALU operation following can occur -carry/borrow for addition/subtraction -overflow -result zero, negative or positive Register which contains flags to indicate these status of any processor operation Programmer can use these status condition for program control example

Flags
Carry flag 00110101 01000011 001111000

Carry 0

10000010 10100011 100100101

Carry 1

Status register

Register File Addressing Cont.

When using direct addressing, the bank is selected with RP1 and RP0 that are bits 6 and 5 in the special function register STATUS. The instruction handles the 7-bit displacement that can range from 00h to 7Fh. When using indirect addressing, the 8 least significant bits for the address come from the file select register (FSR). The ninth bit is IRP (Indirect Register Pointer bit), which is bit 7 in the STATUS register

Register File Addressing Cont.

Bank Select bits choose bank (2 bits)

Register File Addressing Cont.

Register File Addressing

Direct Addressing

Uses 7 bits of 14 bit instruction to identify a register file address 8th and 9th bit comes from RP0 and RP1 bits of STATUS register. Exp: Z equ D2 btfss STATUS, Z

Indirect Addressing

Full 8 bit register address is written the special function register FSR INDF is used to get the content of the address pointed by FSR Exp : A sample program to clear RAM locations H20 H2F .

EEPROM Data Memory

Textbook Microcontrollers: Fundamentals and Applications with PIC(page 58 - 60)

Processing on PIC

Program execution sequence.

Reset Sequence

Subroutines