Latin American Applied Research

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A MODIFIED HARMONIC ELIMINATION METHOD WITH A WIDE RANGE OF MODULATION INDICES FOR MULTI-LEVEL INVERTER WITH UNEQUAL DC-SOURCES
M.G. HOSSEINI AGHDAM, S.H. FATHI and G.B. GHAREHPETIAN
Electrical Engineering Department, Amirkabir University of Technology Hafez Avenue, No. 424, Tehran 15914, Iran. h.aghdam@aut.ec.ir AbstractThis paper presents a novel modulation technique applied in multi-level inverters with unequal DC sources suitable for wide range of modulation indices. This method considers all the possible switching schemes assuming that the power devices in the different converter modulus can turn ON/OFF up to twice per period. Also, a unified approach using Homotopy algorithm is presented to solve the harmonic elimination equations for all various switching schemes. A three-phase seven-level Y-connected cascaded inverter is modeled in this paper. Experimental results indicate that the proposed technique is effective and efficient for harmonic elimination in multi-level inverter with unequal DC sources and the theoretical results are well validated. Keywords Harmonic elimination, multi-level inverter, unequal DC sources, Homotopy algorithm. I. INTRODUCTION In recent years, many high-power and medium-voltage drive applications have been installed (Hammond, 1997; Buschmann and Steinke, 1997). Due to their ability to synthesize waveforms with a better harmonic spectrum and attain higher voltages, multi-level inverters have received increasing attention in the past few years (Lai and Peng, 1996; Menzies et al., 1994; Schibli et al., 1998; Peng, 2001). The well-known multi-level topologies are cascaded H-bridge multi-level inverter, diode-clamped multilevel inverter, and flying capacitor multi-level inverter (Hosseini Aghdam et al., 2007a; 2007b; Holmes and Lipo, 2003). The Multi-level inverter using cascadedinverters with separated DC sources, hereafter called a cascaded multi-level inverter, appears to be superior to other multi-level structures. This topology presents a structure that is not only simple and modular but also requires the least number of components. This modular structure makes it easily extensible for higher number of desired output voltage levels without undue increase in circuit complexity. In addition, extra clamping diodes or voltage balancing capacitors are not necessary. Also, soft-switching technique can be applied in this structure to avoid bulky and lossy resistor-capacitor-diode snubbers (Hosseini Aghdam et al., 2007a; 2007b). It is generally accepted that the performance of an inverter, with any switching strategies, can be related to the harmonic contents of its output voltage. Researchers have always studied many novel techniques to reduce 65 harmonics in such waveforms (Holmes and Lipo, 2003; Mohan et al., 2003; Patel and Hoft, 1973; Patel and Hoft, 1974; Buja and Indri, 1977). There are many techniques applied to multi-level inverter topologies (Hosseini Aghdam et al., 2007a; 2007b; Sirisukprasert et al., 2002; Akbari and Gharehpetian, 2005; Chiasson et al., 2004a; 2004b; Guan et al., 2005). In multi-level technology, there are several well-known modulation topologies like (Hosseini Aghdam et al., 2007a; 2007b; Holmes and Lipo, 2003); General Harmonic Elimination technique, Space Vector PWM (SVPWM) and Carrier-Based PWM (CBPWM) technique. This paper focuses on the general harmonic elimination method with unequal DC sources. This work presents a novel modulation technique applied in multilevel inverters suitable for the wide range of modulation indices. This method considers all possible switching schemes assuming that the power devices in the different converter modulus can switch ON/OFF up to two times per fundamental cycle. That feature can overcome the switching losses problem, as well as EMI problem (Hosseini Aghdam et al., 2007a; 2007b). This technique results in a low total harmonic distortion (THD) output waveform without any need of filter circuits. To solve the harmonic elimination equations, a general method using Homotopy algorithm (Hosseini Aghdam et al., 2007a; 2007b; Guan et al., 2005; Allgower and Georg, 1990; Kuno and Seader, 1988; Wolf and Sanders, 1996; Lee and Chiang, 2001) is presented to define the switching instants of the power devices for all various switching schemes. This method solves the harmonic elimination equations with a much simpler formulation compared to methods like NewtonRaphson (NR) (Sirisukprasert et al., 2002; Akbari and Gharehpetian, 2005) and Resultant theory (Chiasson et al., 2004a; 2004b). This algorithm can be used for any number of voltage levels without complex analytical calculations. II. CASCADED MULTI-LEVEL INVERTER CONFIGURATION The cascaded multi-level inverter uses cascaded inverters with Separate DC Sources (SDCSs). This topology synthesizes a desired voltage waveform from independent sources of DC voltages, which may be obtained from batteries, fuel cells, or solar cells. This configuration recently became very popular in AC power supply

M. G. HOSSEINI AGHDAM, S. H. FATHI, G. B. GHAREHPETIAN and Adjustable Speed Drive (ASD) applications. This inverter can avoid extra clamping diodes or voltage clamping capacitors. A single-phase configuration of such an inverter with unequal DC sources is shown in Fig. 1. Each SDCS is associated with a single-phase fullbridge inverter. The AC voltage terminals of inverters are connected in series. By different combinations of four switches, S1-S4, each inverter level can generate three different voltage outputs, i.e., +ViVdc, -ViVdc, and zero. The synthesized total AC voltage output waveform is the sum of the individual inverter voltage outputs. In this multi-level inverter topology, the number of output phase voltage levels is defined by m=2S+1, where S is the number of DC sources. An example of the phase voltage waveform for a nine-level cascaded inverter with four separated DC sources and four full-bridges is shown in Fig. 2. The phase voltage Van is the sum of each full-bridge output voltages and is equal to v1+v2+v3+v4. The Fourier series of the output voltage waveform of the cascaded multi-level inverter with unequal DC sources is written as follows: 4Vdc S Vout (t ) = [Vk * cos(nk )] sin(nt ) (1) n n =1, 3, 5, ... k =1

switching angles and the THD versus modulation index (M) in a seven-level inverter with unequal DC sources (V1Vdc=63 V, V2Vdc=51 V, and V3Vdc=60.60 V). As it can be seen in Fig. 3, the modulation index is only available in the ranges from 0.36 to 0.37 and from 0.45 to 1.01. For the ranges from 0 to 0.36 and from 0.37 to 0.45 and for indices higher than 1.01, there is no solution. As discussed above, the modulation scheme of Fig. 2 provides a specific modulation index range. This paper, therefore, propose new schemes, which can generate voltage waveforms with minimum THD defined for a wide range of modulation indices. The first half cycle of the proposed schemes is illustrated in Fig. 4 using as example a seven-level cascaded inverter. In the proposed schemes, the power devices can switch ON and OFF up to twice per cycle of the fundamental wave.

where VkVdc is the value of kth DC source, n is the odd harmonic order and k is the switching angle corresponding to the kth DC source, which must satisfy 0 1 < 2 < ... < 90 . The THD is calculated in this work as follows:
1 S n (Vk * cos(n k )) n =3, 5,... k =1
2

THD =

(Vk * cos(n k ))
k =1

(2)

To minimize the total harmonic distortion (THD) and to achieve the desired fundamental frequency component, up to S-1 harmonics can be removed from the voltage waveform. In general, the most significant low frequency harmonic components will be chosen to be canceled out. According to (1), to keep the number of eliminated harmonics constant, all switching angles must be less than 90o. However, if the switching angles do not satisfy the condition, this scheme no longer exists. It is noted that the minimum ON-time and OFFtime (minimum pulse) limit is not required in the synthesized total waveform for cascaded multi-level inverters. Narrow pulses can be produced in the synthesized total output waveform by turning ON the switch from one bridge and turning OFF the switch from another bridge. Defining the modulation index M=Vf / (S.Vdc), where Vf is the amplitude of the fundamental frequency component, it has been shown in Menzies et al. (1994) that the modulation technique shown in Fig. 2 provides a certain range of modulation indices, which is the disadvantage of this technique. For example, Fig. 3 shows the

Fig. 1. Single-phase configuration of multi-level cascaded inverter.

Fig. 2. Waveform of nine-level output phase voltage with unequal DC sources.

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Latin American Applied Research These schemes are assumed to have quarter-wave symmetry. In the scheme showed in Fig 4(a), the power devices turn ON-OFF once per period, while in the other schemes depicted in Fig. 4 some power switches turn ON-OFF twice per period. The total number of switching per quarter cycle in the output waveform is four. In each of switching schemes, whenever 4 ( 3 in scheme of Fig. 4(a)) is greater than 90o, this waveform is no longer exists. The nonlinear equations that characterize the harmonic content for each of these schemes can be solved to find all solutions that eliminate the lowest order harmonics while the required fundamental can be achieved.

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III. MATHEMATICAL MODEL OF SWITCHING SCHEMES The mathematical model of the switching schemes is presented assuming a three-phase seven-level steppedwaveform with non-equal DC sources. In this case, S is equal to 3. Also, the number of switching is considered to be four per quarter cycle. All switching schemes are shown in Fig. 4(a) to 4(f). It is noted that Fig. 4(a) is special case of Fig. 4(c) with 4 =90o. Using Fourier series, the odd harmonics of the schemes shown in Fig. 4(b) to 4(f) can be determined as follows:

(a)

(b)

Fig. 3. (a) Switching angles versus M, (b) THD versus M.

Fig. 4. The first half cycle of the proposed schemes for a three unequal DC sources.

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hn =

4Vdc [U1 cos(n1 ) U 2 cos(n 2 ) n U 3 cos(n 3 ) U 4 cos(n 4 )]

(3)

where U1 to U4 are the coefficients of cosine terms which are given in Table I. According to (3), 1 through 4, must satisfy the condition, 0<1<2<3<4<90o. Considering the symmetry of the waveform, there are no even harmonics. Considering Eq. (3) and Fig. 4(b) to 4(f), the rising edge provides positive polarity for the corresponding cosine term, whereas the falling edge gives the cosine term a negative polarity. Therefore, the positive and negative signs are for the rising and falling edges, respectively. It must be noted that only the polarity and coefficients must be determined for different schemes. Table II gives the sign of cosine terms of Eq. (3) for different schemes.
Table I. Coefficient of cosine terms of equation (2). Second Fourth Third coefFirst coefScheme coefficient coefficient ficient (U3) ficient (U1) (U2) (U4) Fig. 4(b) V1 V2 V2+ V3-V1 V3 Fig. 4(c) V1 V2 V3 V3 V2 V1+ V2- V3 V3 Fig. 4(d) V1 V1 V2 V3 Fig. 4(e) V1 V2 V2 V3 Fig. 4(f) V1 Table II. Sign of cosine terms of equation (2). First Second Third Fourth Scheme term term term term Fig. 4(b) + + Fig. 4(c) + + + Fig. 4(d) + + Fig. 4(e) + + + Fig. 4(f) + + +

Gharehpetian, 2005). Another approach is to use mathematical Resultant theory (Chiasson et al., 2004a; 2004b). This methodology is based on the mathematical theory of resultants of polynomials which is a systematic procedure to find the roots of systems of polynomial equations. However these methods have a number of problems. One of them is finding a set of proper initial values for the numerical iteration which leads to a valid solution. Normally the iterative methods convert the transcendental equations into an equivalent set of polynomial equations. These equations are polynomials of high orders (e.g., 22nd order or higher) and are very difficult and time consuming to be solved. Also, for any change in the number of voltage levels or input DC voltages, new polynomials are required (Hosseini Aghdam et al., 2007a; 2007b and Guan et al., 2005). This paper suggests the application of novel Homotopy algorithms. These methods have the advantage over local Newton-type methods of having potentially large or global regions of convergence. Homotopy (continuation) methods are numerical techniques for solving systems of nonlinear algebraic equations (F(x) =0, F: Cn Cn) based on higher-dimensional function embedding and solution tracing (Allgower and Georg, 1990; Kuno and Seader, 1988; Wolf and Sanders, 1996; Lee and Chiang, 2001). Application areas to which continuation methods have been applied include electrical circuits, and problems arising in chemical engineering, mechanical engineering and physics.
IV. SOLVING EQUATIONS A. Development of Homotopy Algorithm Model Equations (4) and (5) can be shown in the following vector form: T 3M T F( ) = [ f ( ), f (5 ), f (7 ), f (11 )] = , 0, 0 , 0 (6) 4
T

To minimize the THD of output waveform and to achieve desired fundamental frequency component, the 5th and 7th harmonics, the lowest non-triplen harmonics, are chosen to be removed from the phase voltage. Thus, a set of nonlinear equations are written as follows: 3M U1 cos( 1 ) U2 cos( 2 ) U3 cos( 3 ) U4 cos( 4 ) = 4 U1 cos( 1 ) U2 cos( 2 ) U3 cos( 3 ) U4 cos( 4 ) = 0 (4) 5 5 5 5
U1 cos( 1 ) U2 cos( 2 ) U3 cos( 3 ) U4 cos( 4 ) = 0 7 7 7 7

where = [ 1 , 2 , 3 , 4 ] , and f ( ) = U 1 cos 1 + U 2 cos 2 + U 3 cos 3 + U 4 cos 4 . The constraint to the vector is: D: 0 < 1 < 2 < 3 < 4 < 90 .

(7)

where M=Vf / (S.Vdc) the modulation index, S = 3 and Vf = h1, the amplitude of the fundamental frequency component. The Eq. (4) is a system of three nonlinear equation with the four unknowns 1,2,3 and 4. The fourth equation can be determined based on the 11th harmonic elimination, as follows: U1 cos(11 1 ) U 2 cos(11 2 ) (5) U3 cos(11 3 ) U 4 cos(11 4 ) = 0 These equations are nonlinear as well as transcendental in nature. To obtain the solution for these nonlinear equations, different methods can be used. One approach is to use an iterative procedure such as Newton Raphson (NR) (Sirisukprasert et al., 2002; Akbari and

Above equations can be rewritten as follows: T 3M F( ) = f ( ) , f (5 ), f (7 ), f (11 ) = 0 (8) 4 Two steps are involved in the Homotopy algorithm: i) to introduce a Homotopy parameter t into the Eq. (8), and ii) to construct a set of mappings H. When t is a fixed value (such as t =1), H is the mirror F; when t is another value (such as t=0), H is the mirror G, where G is an Easily Solved Equation (ESE). Therefore, we can construct a Homotopy equation, based on which the original problem becomes to find a solution of Homotopy equation with a fixed t (such as t =1). The Homotopy equation is defined as (9) H ( , t ) = 0, t [0, 1], D where (10) H(,0)= G()=0, H(,1)=F()=0, D

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Latin American Applied Research In the above equation, the solution (0) of H(,0)= G()=0 is known and the equation H(,1)=F()=0 is the original problem equation. In other word, by constructing the mapping H: D [0, 1] R n +1 R n (11) to substitute for the single mirror F, the original problem changes into solving = (t ) of Homotopy Eq. (9). Whether : [0, 1] R n is continuous or not, it is determined by Homotopy parameter t, i.e., = (t ) is a curve in the n dimensions space Rn, and one terminal is fixed point (0) and the other is = (1) , which is the solution of original problem equations H(,1)=F()=0. B. Method of Solving Homotopy Mapping Function As the Homotopy equations satisfying equation (10) are not one but many, we can select the following equation H(,t)= tF()+ (1-t)G()=0 t [0, 1], D (12)

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Fig. 5. Switching angles versus M which give the lowest THD.

where G()=0 is an ESE and its solution (0) is known. With the different ESE G()=0, we can obtain different Homotopy mapping. In this paper, the ESE can be selected as G()=F()-F ( (0)) , from which the Homotopy equation can be derived: H ( , t ) = F ( ) + (t-1) F((0))=0 t [0, 1], D (13)
To solve (13), many methods can be employed, such as Numeric Extended Method, Arc-Length Method and Differential Equation Method. Considering the limited space, this paper only introduces Differential Equation Method. Consider as a function to the Homotopy parameter t, and derivate the Homotopy equation with respect to t, then we have: H(, t ) H(, t ) F( ) (t ) + = (t ) + F( (0)) = 0 (14) t and then (15) (t ) = [J ( (t ))] 1 F ( (0)), t [0, 1] where
H ( , t ) F( ) = . Equation (15) is an Ordinary Differential Equation (ODE) with a known initial value. The equation can be effectively solved by 4th order Runge-Kutta Method. Using the Homotopy algorithm, the switching angles for each modulation schemes versus the modulation index (M) have been calculated. For each value of M, solutions include more than one scheme depicted in Fig. 4. However, the set of switching angles and the scheme that provide the lowest THD have been chosen for each value of M and are shown in Fig. 5. To obtain an accurate result, the harmonic components up to 200th are used to compute the voltage THD. The voltage THD is a function of the modulation index (M) and is plotted in Fig. 6. Detailed information on the exact intervals of M for which each scheme gives the lowest THD with reference to Fig. 6 is given in Table III.
J ( (t )) =

Fig. 6. THD versus M for the switching schemes.

Table III. Detailed information on exact intervals of M. M Scheme M Scheme M Scheme M Scheme 0.05-0.14 b 0.36-0.42 b 0.84-0.89 c 1.15-1.15 c 0.15-0.20 d 0.43-0.44 d 0.90-1.01 a 0.21-0.28 b 0.45-0.54 f 1.02-1.02 c 0.29-0.35 e 0.55-0.83 a 1.02-1.03 a -

V. EXPERIMENTAL WORK A three-phase seven-level Y-connected cascaded inverter has been implemented. The switching devices are 100 V, 80 A (STP80NF10) power MOSFETs. This inverter with SDCSs (V1Vdc=63 V, V2Vdc=51 V, and V3Vdc=60.60 V) is illustrated in Fig. 7. Both the gatedriver boards and the power stages are shown in Fig. 8. As it can be seen in this figure, this inverter is connected to a three-phase induction motor with the following parameters:

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M. G. HOSSEINI AGHDAM, S. H. FATHI, G. B. GHAREHPETIAN

Fig. 7. Three-phase seven-level cascaded inverter.

(a)

Fig. 8. Gate-driver boards and power stages of seven-level cascaded inverter.

Rated power: 3 hp Rated voltage: 220 V (rms line-to-line) Rated frequency: 50 Hz Rated speed: 1435 rpm The switching angles for each modulation index (M) have been selected based on the results presented in Fig. 5.

A. Scheme a In the first set of experiments, the scheme a of Fig. 4 is considered. The modulation index (M) is set equal to 0.93. The resulting voltage is measured and shown in Fig. 9(a). The normalized fast Fourier transform (FFT) of the voltage is depicted in Fig. 9(a), too. It is obvious that the 5th and 7th harmonics are removed. Note that the 11th harmonic is not zero, but this is the only scheme in Fig. 4 that does not guarantee the 11th harmonic is zero. The phase current in the motor produced by the voltages of Fig. 9(a) and corresponding normalized FFT of the current waveform of phase a are shown in Fig. 9(b). Note that the harmonic content of the current is significantly reduced compared to the harmonic content of the voltage because of the filtering effect of the motor inductance. B. Scheme b The second set of experiments considers the scheme b of Fig. 4. The modulation index (M) is set equal to 0.21. The voltage applied to the motor is shown in Fig. 10(a) and corresponding normalized FFT is plotted in

(b)

Fig. 9. Scheme a, M= 0.93, (a) Voltage waveform and corresponding spectra, (b) Current waveform and corresponding spectra.

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39:65-74 (2009) Fig. 10(a), too. It is noted that the 5th, 7th and 11th harmonics are removed. Fig. 10(b) show the motor current resulting and the normalized FFT of the current waveform of phase a. Again the harmonic content of the current is significantly reduced compared to the harmonic content of the voltage. C. Scheme c The scheme c of Fig. 4 is the third set of experiments. The modulation index (M) is set equal to 0.84. The resulting voltage is measured and shown in Fig. 11(a). The normalized fast Fourier transform (FFT) of the voltage is shown in Fig. 11(a), too. The 5th, 7th and 11th harmonics are removed. The phase current in the motor produced by the voltages of Fig. 11(a) and the corresponding normalized FFT of the current waveform of phase a are shown in Fig. 11(b). D. Scheme d In the fourth set of experiments, the scheme d of Fig. 4 is considered. The modulation index (M) is set equal to 0.42. The voltage applied to the motor is shown in Fig. 12(a) and corresponding normalized FFT is plotted in Fig. 12(a), too. It is noted that the 5th, 7th and 11th harmonics are removed. Fig. 12(b) show the motor current and the normalized FFT of the current waveform of phase a. E. Scheme e In the fifth set of experiments, the scheme e of Fig. 4is considered. The modulation index (M) is set equal to 0.34. The resulting voltage is measured and shown in Fig. 13(a). The normalized fast Fourier transform (FFT) of the voltage is shown in Fig. 13(a), too. The 5th, 7th and 11th harmonics are removed. The phase current in the motor and the corresponding normalized FFT of the current waveform of phase a are shown in Fig. 13(b). F. Scheme f The scheme f of Fig. 4 is the sixth set of experiments. The modulation index (M) is set equal to 0.53. The voltage applied to the motor is shown in Fig. 14(a) and the corresponding normalized FFT is plotted in Fig. 14(a), too. It is noted that the 5th, 7th and 11th harmonics are removed. Fig. 14(b) shows the motor current and the normalized FFT of the current waveform of phase a. VI. CONCLUSION This paper presents a novel modulation technique for multi-level inverters with unequal DC sources suitable for the wide range of modulation indices. This method considers all the possible switching schemes assuming that the power devices in the different converter modulus can turn ON/OFF up to twice per period. Also, a unified approach using Homotopy algorithm is presented to solve the harmonic elimination equations for all switching schemes. The experiments based on a three-phase cascaded seven-level inverter are carried out to verify the proposed technique. REFERENCES Akbari, H. R. and G. B. Gharehpetian, A Modified Modulation Technique for Multilevel Converters With a Wide Range of Modulation Indexes and Minimized Harmonic Distortion at Low Indexes,

(a)

(b)

Fig. 10. Scheme b, M= 0.21, (a) Voltage waveform and corresponding spectra, (b) Current waveform and corresponding spectra.

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M. G. HOSSEINI AGHDAM, S. H. FATHI, G. B. GHAREHPETIAN

(a) (a)

(b)

Fig. 11. Scheme c, M= 0.84, (a) Voltage waveform and corresponding spectra, (b) The current waveform and corresponding spectra.

(b)

Fig. 12. Scheme d, M= 0.42, (a) Voltage waveform and corresponding spectra, (b) Current waveform and corresponding spectra.

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(a) (a)

(b) (b)

Fig. 13. Scheme e, M= 0.34, (a) Voltage waveform and corresponding spectra, (b) Current waveform and corresponding spectra.

Fig. 14. Scheme f, M= 0.53, (a) Voltage waveform and corresponding spectra, (b) Current waveform and corresponding spectra.

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M. G. HOSSEINI AGHDAM, S. H. FATHI, G. B. GHAREHPETIAN 9th Spanish Portuguese Congress on Electrical Engineering (9CHLIE), Marbella, Spain (2005). Allgower, E. and K. Georg, Numerical Continuation Methods: An Introduction, Springer- Verlag, New York (1990). Buja, G.S. and G.B. Indri, Optimal Pulse-WidthModulation for Feeding AC Motors, IEEE Transactions on Industry Applications, IA-13, 38-44 (1977). Buschmann, M. and J. Steinke, Robust and Reliable Medium Voltage PWM Inverter with Motor Friendly Output, Proc. of the European Power Electronics and Applications Conference (EPE'97), 3, 502507 (1997). Chiasson, J.N., L.M. Tolbert, K.J. McKenzie and Z. Du, A Complete Solution to the Harmonic Elimination Problem, IEEE Transactions on Power Electronics, 19, 491-499 (2004a). Chiasson, J.N., L.M. Tolbert, K.J. McKenzie and Z. Du, A Unified Approach to Solving the Harmonic Elimination Equations in Multilevel Converters, IEEE Transactions on Power Electronics, 19, 478490 (2004b). Guan, E., P. Song, M. Ye and B. Wu, Selective Harmonic Elimination Techniques for Multilevel Cascaded H-Bridge Inverters, 6th International Conference on Power Electronics and Drive Systems (IEEE PEDS), Malaysia, 1441-1446 (2005). Hammond, P.,A New Approach to Enhance Power Quality for Medium Voltage AC-drives, IEEE Transactions on Industry Applications, 33, 202208 (1997). Holmes, D.G. and T.A. Lipo, Pulse Width Modulation for Power Converters-Principle and Practice, IEEE Press/Wiley-Interscience, New York (2003). Hosseini Aghdam, M.G., S.H. Fathi and G.B. Gharehpetian, Elimination of Harmonics in a Multi-Level Inverter with Unequal DC Sources Using the Homotopy Algorithm, IEEE International Symposium on Industrial Electronics, 578-583 (2007a). Hosseini Aghdam, M.G., S.H. Fathi and G.B. Gharehpetian, A Complete Solution of Harmonics Elimination Problem in a Multi-Level Inverter with Unequal DC Sources, Journal of Electrical System (JES), 3, 259-271 (2007b). Kuno, M. and J.D. Seader, Computing all Real Solutions to Systems of Nonlinear Equations with Global Fixed-Point Homotopy, Ind. Eng. Chem., 27, 13201329 (1988). Lai, J.S. and F.Z. Peng, Multilevel Converters- a new breed of Power Converters, IEEE Transactions on Industry Applications, 32, 509517 (1996). Lee, J. and H.D. Chiang, Constructive Methods for Finding All or Multiple Points of Nonlinear Circuits and Systems, IEEE Transactions on Circuit and Systems, 48, 35-50 (2001). Menzies, R., P. Steimer and J. Steinke, Five-Level GTO Inverters for Large Induction Motor Drives, IEEE Transactions on Industry Applications, 30, 938944 (1994). Mohan, N., T. Undeland and W.P. Bobbins, Power Electronic-Converters, Applications and Design, 3th edition, John Wiley & Sons, New York (2003). Patel, H.S. and R.G. Hoft, Generalized Techniques of Harmonic Elimination, IEEE Transactions on Industry Applications, IA-9, 310-317 (1973). Patel, H.S. and R.G. Hoft, Generalized Techniques of Harmonic Elimination and Voltage Control in Thyristor Inverters. Part 2-Voltage Control Techniques, IEEE Transactions on Industry Applications, IA-10, 666-673 (1974). Peng, F., A Generalized Multilevel Inverter Topology with Self Voltage Balancing, IEEE Transactions on Industry Applications, 37, 611618 (2001). Schibli, N., T. Nguyen and A. Rufer, A Three-Phase Multilevel Converter for High-Power Induction Motors, IEEE Transactions on Power Electronics, 13, 978986 (1998). Sirisukprasert, S., J. Lai and T. Liu, Optimum Harmonic Reduction with a Wide Range of Modulation Indexes for Multilevel Converters, IEEE Transactions on Industrial Electronics, 49, 875-881 (2002). Wolf, D. and S. Sanders, Multiparameter Homotopy Methods for Finding DC Operating Points of Nonlinear Circuits, IEEE Transactions on Circuit and Systems, 43, 824-838 (1996).

Received: November 28, 2007. Accepted: June 4, 2008. Recommended by Subject Editor Jorge Solsona.

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