MOSFETs Basics

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MOSFETs Basics
MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) have been used in power electronics applications since thee early 80's due to their appreciable current carrying and off-state voltage blocking capability with low on-state voltage drop. They have managed to replace BJTs in many applications due to their simpler gate drive requirements and higher positive temperature coefficient which allows devices to be paralleled for higher current capabilities.

1. Introduction A number of different types of MOSFET are produced which have slightly different operating mechanisms and characteristics. Figure 1 graphically illustrates the differences between the four different types.

Figure 1: The steady state characteristics of different types of MOSFET N-channel enhancement type MOSFETS are the most popular for use in power switching circuits and applications. The drive voltage or voltage applied between gate and source to switch the MOSFET ON must exceed a threshold value V T 4V although values of 10 - 12V are actually needed to ensure the MOSFET is fully switched ON. Reducing the drive voltage to below V T will cause the MOSFET to turn OFF. Various manufacturers produce power MOSFETs under the names HEXFET (National), VMOS (Phillips), SIPMOS (Siemens) and all consist of various physical designs diffused into an epitaxial substrate in multiple parallel configurations. MOSFETs unfortunately although very fast switching cannot support large currents and voltages and develop larger drain-source voltages when ON compared to the V ce_sat of a BJT. Some typical ratings for single MOSFETs are: Table 1: Typical MOSFET ratings

ID 1A 2A 9A 13A 45 900V 500V 200V 500V 60V

VDSS

RDS typical (max) 7 (9) 3 (4) 0.25 (0.4) 0.3 (0.4) 0.024 (0.03)

VGS (for ID ) 10V (0.5A) 10V (1A) 10V (5A) 10V (7A) 10V (25A)

VT 1.5 - 3.5V 2 - 4V 2 - 4V 2 - 4V 2 - 4V

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Typical switching times are:

A parasitic diode within the MOSFET structure can have a reverse recovery time of trr 350nS and, as will be discussed later, often needs to be bypassed with a fast diode connected in parallel. Various module packages are available from supplies in the forms shown in figure 2.

Figure 2: Some MOSFET module matrix configurations with internal freewheel diodes.

2. Operating Principle of N-Channel Enhancement MOSFETs A simplified diagram of an N-channel enhancement MOSFET is shown in figure 3. Drain and source connections are made to higher conduction high doped regions. The metal gate is electrically isolated from the P-type substrate by a layer of non-conducting silicon oxide (SiO2). When a positive voltage is applied to the gate with respect to the source an electric field will be created pointing away from the base and across the P-region directly under the base. The electric field will cause positive charges in the P-region to move away from the base inducing or enhancing a N-region in its place. Conduction can then take place between the N+(drain) N(enhanced region) N+(source). Increasing or decreasing the gate voltage will cause the induced N channel to grow or decrease in size thus controlling conduction.

Figure 3: Simple model of an N-channel enhancement type MOSFET In practice, a fairly large current in the order of 1 - 2A can be required to charge the gate capacitance at turn ON to ensure that switching times are small. Due to gate leakage current, nano-amps are needed to maintain the gate voltage once the device is ON. A negative voltage is often applied at turn OFF to discharge the gate for speedy switch OFF. It is obvious that faster switching speeds can be obtained with well designed gate driver circuits. Unlike the Bipolar Junction Transistor (BJT) which has a negative temperature coefficient, the MOSFET has a positive temperature coefficient. This means that as the MOSFET heats up under high current conditions or a fast increasing current between drain and source, the impedance of the device increases thus limiting any further increase in current. Secondary breakdown is therefore not possible with a MOSFET.

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The drain-source-gate characteristics of an enhancement MOSFET shown in figure 4a illustrate why a large gate source voltage is needed to keep the drain source voltage drop to a minimum. As with a BJT, the transition between ON and OFF and across the ID - VDS region should be fast to avoid large switching losses. The Safe Operating Area (SOA) is shown in figure 4b where transitions into the high power regions of the upper right hand side of the graph are time limited. The MOSFET can be operated in the lower left hand region continuously.

Figure 4: (a) N-channel enhancement MOSFET characteristics and (b) Safe Operating Area (log-log scale)

3. Power MOSFET Internal Structure An approximation of the internal structure of an HEXFET, VMOS and SIPMOS are shown in Figure 5. As shown in Fig. 5, a power MOSFET has a vertical oriented four layer structure of alternating p-type and n-type doping. The n+pn-n+ structure is termed enhancement mode n-channel MOSFET. By applying a voltage, higher than a threshold level, which biases the gate positive w.r.t. the source, an n-type inversion layer or channel will be formed under the oxide layer thus connecting the source to the drain and allowing a current to flow. Hence, the MOSFET is a majority carrier device, since no minority carriers are injected into the body region. This results in no stored charge and hence much faster switching. That is why MOSFETs are fast devices. Once the device turns on, the relation between the current and the voltage is nearly linear which means that it looks like a resistance when it is on. This resistance is referred to as the on-state resistance.

Figure 5: HEXFET, VMOS and SIPMOS structures showing induced N channel The equivalent circuit of an enhancement MOSFET is shown in Figure 6a. Two parasitic capacitances

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between gate to source and gate to drain will cause switching delays if the gate driver cannot support large initial currents. A further parasitic capacitance and transistor exist between drain and source but due to the internal structure the transistor appears as a diode and capacitor connected between drain and source as shown in Figure 6b. Unfortunately the parasitic diode does NOT have the structure of a fast diode and must be neglected and a separate fast diode used in a high speed switching circuit.

Figure 6: Parasitic components in an N enhancement MOSFET The parasitic transistor can be clearly seen in Figure 6 as the N+ / P / N+ region between drain and source. If the distance the current travels from the enhanced region across the source N+ region is small, Rbe is negligible and the base collector junction of the parasitic transistor appears as a diode. The diode has the same characteristics as a general purpose diode ie. it is slow switching.

4. Important MOSFET Parameters 4.1 Maximum Drain-Source Voltage, VDS VDS is the maximum instantaneous operating voltage. 4.2 Continuous Drain Current, ID ID is the maximum current the MOSFET can carry sometimes specified at a particular junction temperature. 4.3 Maximum Pulsed Drain Current, IDM IDM is greater than ID and specified for a particular pulse width and duty cycle. 4.4 Maximum Gate-Source Voltage, VGS VGS is the maximum voltage that can be applied between gate and source without damaging the gate insulation. 4.5 Gate Threshold Voltage, VT , {VTH , VGS(th) } VT is the minimum gate voltage at which the transistor will turn ON.

5. Parallel Connected MOSFETs The parallel connection of MOSFETs allows higher load currents to be handled by sharing the current between the individual switches. Because MOSFETs have a positive temperature coefficient they can be paralled without the need for source resistors (BJTs need small emitter resistors that provide negative feedback). If one MOSFET starts to draw slightly more current than the others it heats up and its impedance increases which results in the current through it decreasing. Parallel MOSFETs should be mounted close together so that the gate drive impedances are the same and all transistors switch at the same time.

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Figure 8: Parallel connection of MOSFETs to increase current carrying capability

6. MOSFETs Switching Characteristics The test circuit for a MOSFET with inductive loading is shown in Fig. 9. The turn-on behavior of the MOSFET is shown in Fig. 10. As shown in this figure, the gate drive voltage changes in step function manner from 0 to VGG which is above the threshold voltage VGS(th). During the turn on delay time td(on) the gate-source voltage vgs rises from 0 to VGS(th) in fashion similar to an RC circuit. This is due to the resistance in the current path in addition to the equivalent input MOSFET capacitance (Cgs and Cgd). The rise time constant is given by t1 = RG ( Cgs + Cgd1 ). Beyond VGS(th), vgs keeps rising as before and Ids starts increasing. Once the MOSFET is carrying the full load current Io, the gate-source voltage becomes temporarily clamped at Vgs,Io. At this point, the gate current will flow through Cgd only. As a result, the drain-source voltage starts decreasing until it reaches the drop due to the on-state resistance. At this point, the gate-source voltage becomes unclamped and rises again to VGG with a time constant of t2 = RG ( Cgs + Cgd2 ). Note here that there are two values of Cgd due to the nonlinear nature of this capacitance.

Fig. 9: Test Circuit for Switching Characteristics of the MOSFET

Fig. 10: Turn-on Characteristics of the MOSFET The turn-off of the MOSFET involves the inverse sequence of events that occurred during turn-on. This is shown in Fig. 11. The turn-off process is initiated by applying a step gate voltage of -VGG.

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During turn-on and turn-off, the instantaneous power loss in the MOSFET occurs primarily during the crossover time tc indicated in figures. 10 and 11 where p(t) = vDS iD is high. Since the junction capacitance doesn't vary with temperature, the switching power losses in the MOSFET are independent of the junction temperature. In fact, the turn-off losses are somewhat lower than the turn-on losses since the rate of change of voltage during turn-off is controlled by the output capacitance of the MOSFET.

Fig. 1.4: Turn-off Characteristics of the MOSFET For the conduction losses, the instantaneous power on-state dissipation in the MOSFET is given by,

The on-state resistance have several components and it varies with the junction temperature. Thus, the conduction losses will also vary with the junction temperature. Notice here that the current computed for conduction losses is the rms current flowing in the MOSFET.

7. Gate Drive Circuits Unlike BJT drive circuits which require a base resistor to control the base current, a MOSFET drive circuit is designed to connect the gate directly to a voltage bus or supply with no intervening resistance other than the impedance of the drive circuit switch. In a lot of cases the MOSFET drive circuit needs to be level shifted or isolated so that the source terminal of the MOSFET can be floated as is required in a bridge circuit. CMOS logic circuits would initially appear to be ideal driver circuits because they operate at up to 15V. Unfortunately, both the output impedance and the limited current carrying capability (sink 4mA, source 4mA) of a CMOS chip means that it cannot be used when high switching speeds are required. Remember a large initial current is needed to charge the gate capacitance. The design of MOSFET gate driver circuits is moderately simple but the increasing availability of integrated circuit MOSFET drivers and the ease of using them has led to a growing trend away from self designed circuits. The majority of IC drivers can be controlled directly from TTL, CMOS and microprocessor logic circuits and self designed circuit would usually have the same input conditions. Additionally, if the driver circuit does not provide floating isolation it may be necessary to include floating power supplies.

For further reading: [1] "Power Electronics: Converters, Applications and Design", Mohan, Undeland and Robbins, Wiley,

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1989. Copyright G. Ledwich 1998.

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