Professional Documents
Culture Documents
INTRODUCTION
This application note discusses the use of the MPASM assembler's conditional assembly to automatically switch between program memory pages or to set the data memory banks. These macros, along with the long call technique (Application Note AN581), ease the development of software. Though the use of these macros can simplify program memory paging and data memory banking with minimal software overhead, the use of these macros without thought can cause unnecessary (duplicate) instructions to be used, by setting page or bank bits unnecessarily. The PIC16C5X family of devices has an architecture in which program memory has up to four pages of program memory (512 words / page) and four banks of data memory (16 bytes / bank). Two bits in the STATUS register, PA1:PA0, are used to manage the program memory pages. Two bits of the FSR register, bits 6 and
DS00586B-page 1
AN586
FIGURE 1: PROGRAM MEMORY ORGANIZATION
File Address 7 6 5 4 3 2 10 Indirect Addr. (1) 00h TMR0 01h PCL 02h A10 A9 A8 STATUS 03h FSR 04h PORTA 05h PORTB 06h PORTC 07h 08h General 09h 0Ah Purpose 0Bh 0Ch Register 0Dh 0Eh File 0Fh
CALL RETLW
10 9 8 7 6 5 4 3 2 1 0 STACK 1
10 9 8 7 6 5 4 3 2 1 0 STACK 2
5 4 3 2 1 0 OPTION
00 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 30h
01 50h
10 70h
11
(Bank 0) (2)
(Bank 1) (2) 3F
Note
1: Not a physically implemented register. 2: Bank 0 is available on all microcontrollers while Bank 1, Bank 2, and Bank 3 are only available on the PIC16C57 and PIC16C58.
DS00586B-page 2
AN586
FIGURE 2: DATA MEMORY MAP
GOTO, CALL instruction with PC as destination ................... from STATUS<6> (PIC16C57 Only) GOTO, CALL instruction with PC as destination ................... from STATUS<5> (PIC16C56/57/58 Only) GOTO direct from instruction word CALL instruction with PC as destination always '0' GOTO, CALL ................................................................ direct from instruction word Instruction with PC as destination .............................. from ALU
A10
PC
A9
A8
A<7:0>
00 PAGE 0
0FFh 100h
1FFh 200h
PIC16C54\PIC16C55
01
PAGE 1
2FFh 300h
10
PAGE 2
4FFh 500h
5FFh 600h
11
7FFh
PIC16C57/PIC16C58
DS00586B-page 3
AN586
The use of MPASMs conditional assembly, allows the selection of source code to be assembled based on the address of the symbol / label. The macros supplied are show in Table 1. They can be grouped into three categories: 1. 2. 3. Conguring of the program memory pages. Conguring of the data memory banks. Other.
TABLE 1:
MACROS
Operands address address address Operation Sets page bits, then CALLs the specied routine Sets page bits, then GOTOs the specied address Sets the specied page bits
Program Calling Paging CALLM GOTOM PAGE_MAC Data Memory Banking ADDWF_MAC ANDWF_MAC BCF_MAC BSF_MAC BTFSC_MAC BTFSS_MAC CLRF_MAC COMF_MAC DECF_MAC DECFSZ_MAC INCF_MAC INCFSZ_MAC IORWF_MAC MOVF_MAC MOVWF_MAC RLF_MAC RRF_MAC SUBWF_MAC SWAPF_MAC XORWF_MAC BANK_MAC Other SAVE_W_STATUS RESTORE_W_STATUS -
Reg, dest Reg, dest Reg, bit Reg, bit Reg, bit Reg, bit Reg Reg, dest Reg, dest Reg, dest Reg, dest Reg, dest Reg, dest Reg, dest Reg Reg, dest Reg, dest Reg, dest Reg, dest Reg, dest Reg
Sets Bank bits, then executes the ADDWF Sets Bank bits, then executes the ANDWF Sets Bank bits, then executes the BCF Sets Bank bits, then executes the BSF Sets Bank bits, then executes the BTFSC Sets Bank bits, then executes the BTFSS Sets Bank bits, then executes the CLRF Sets Bank bits, then executes the COMF Sets Bank bits, then executes the DECF Sets Bank bits, then executes the DECFSZ Sets Bank bits, then executes the INCF Sets Bank bits, then executes the INCFSZ Sets Bank bits, then executes the IORWF Sets Bank bits, then executes the MOVF Sets Bank bits, then executes the MOVWF Sets Bank bits, then executes the RLF Sets Bank bits, then executes the RRF Sets Bank bits, then executes the SUBWF Sets Bank bits, then executes the SWAPF Sets Bank bits, then executes the XORWF Sets the specied Bank bits
Saves the W and STATUS registers Restores the W and STATUS registers
DS00586B-page 4
AN586
These macros (Appendix A) ease the development of programs, but care should be taken in their use so that redundant instructions are not caused. An example of this (Example 1) is if you wanted to do the operations, INCF and BTFSS, on data memory location CNTR (in Bank 3) and the FSR was pointing to some other bank. The use of the macros for both operations would cause six program memory locations to be assembled, while with some thought only four words are needed (Example 2).
CONCLUSION
The use of these macros simplify program development by managing the memory resources of the PIC16C5X device. If the application program becomes too large for the devices program memory, it is recommended to study the listing le for any unnecessary code due to non-optimum usage of these macros. The MAC_TST.ASM le, is supplied to show how these macros work in a program.
EXAMPLE 1:
INCF_MAC
BTFSS_MAC
CNTR, 5
>
EXAMPLE 2:
INCF_MAC
BTFSS
CNTR, 5
>
DS00586B-page 5
AN586
Please check the Microchip BBS for the latest version of the source code. Microchips Worldwide Web Address: www.microchip.com; Bulletin Board Support: MCHIPBBS using CompuServe (CompuServe membership not required).
APPENDIX A:
MACRO FILE
LCALL_5X.ASM 1-16-1997 17:13:33 PAGE 1
00000000 000001FF 00000200 000003FF 00000400 000005FF 00000600 000007FF 000007FF 00000003 00000005 00000006 00000004 00000005 00000006 00000010 00000030 00000050 00000070 0000 0000 0A07 0001 0A0A
00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035
LIST P = 16C57, n = 66 ERRORLEVEL -302, -306 ; ; ; ; ; ; P1_TOP P1_BOTTOM P2_TOP P2_BOTTOM P3_TOP P3_BOTTOM P4_TOP P4_BOTTOM RESET_V ; STATUS PA0 PA1 ; FSR RP0 RP1 ; BANK0_T BANK1_T BANK2_T BANK3_T ; ; P1_CALL_1_V P1_CALL_2_V Program = LCALL_5x.asm Revision Date: 5-07-94 1-15-97
EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU org GOTO GOTO
0x0000 0x01FF 0x0200 0x03FF 0x0400 0x05FF 0x0600 0x07FF 0x07FF 0x03 0x05 0x06 0x04 0x05 0x06 0x10 0x30 0x50 0x70 P1_TOP P1_CALL_1 P1_CALL_2 ; Status Register ; Program Memory Page Address bit 0 ; Program Memory Page Address bit 1 ; FSR Register ; Direct Addressing Register Bank bit 0 ; Direct Addressing Register Bank bit 1
0007
000A
00036 00037 00038 00039 00040 00041 00042 00043 00044 00045 00408 00409 00046 00047 00048 00049 00050 00051 00052 00053 00054 00055 00056 00057 00058 00059 00060 00061 00062 00063 00064 00065 00066 00067 00068 00069 00070 00071 00072 00073 00074 00075 00076 00077 00078 00079 00080
0x10 1 0
<AUTO_PG.MAC>
; START CALL P1_CALL_3 ; LOOP GOTO LOOP ; ; P1_CALL_1 ; if ( (P1_CALL_1_V & 0x0600) != (P1_CALL_1 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; NOP NOP P1_CALL_1_END RETURN ; if ( (P1_CALL_1 & 0x0600) != (P1_CALL_1_END & 0x0600) ) MESSG Warning - User Defined: Call routine crosses page boundry endif ;
P1_CALL_2 ; if ( (P1_CALL_2_V & 0x0600) != (P1_CALL_2 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; NOP NOP P1_CALL_2_END RETURN ; if ( (P1_CALL_2 & 0x0600) != (P1_CALL_2_END & 0x0600) ) MESSG Warning - User Defined: Call routine crosses page boundry endif
AN586
AN586
000D
0010 05A3
0011 04C3
0015 05A3
0016 05C3
00081 00082 00083 00084 00085 00086 00087 00088 00089 00090 00091 00092 00093 00094 00095 00096 00097 00098 00099 M M M M M M M M M M M M M M 00100 00101 00102 00103 M M M M M M M M M M
P1_CALL_3 ; if ( (P1_CALL_3_V & 0x0600) != (P1_CALL_3 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; NOP NOP P1_CALL_3_END RETURN ; if ( (P1_CALL_3 & 0x0600) != (P1_CALL_3_END & 0x0600) ) MESSG Warning - User Defined: Call routine crosses page boundry endif ; CALLM ; if ( ( P2_CALL_3_V & 0x0200 ) == 0x0200 ) BSF STATUS, PA0 ; Set PA0 for Program Memory Page else BCF STATUS, PA0 ; Clear PA0 for Program Memory Page endif ; if ( ( P2_CALL_3_V & 0x0400 ) == 0x0400 ) BSF STATUS, PA1 ; Set PA1 for Program Memory Page else BCF STATUS, PA1 ; Clear PA1 for Program Memory Page endif ; CALL nop nop ; CALLM ; if ( ( P4_CALL_2_V & 0x0200 ) == 0x0200 ) BSF STATUS, PA0 ; Set PA0 for Program Memory Page else BCF STATUS, PA0 ; Clear PA0 for Program Memory Page endif ; if ( ( P4_CALL_2_V & 0x0400 ) == 0x0400 ) BSF STATUS, PA1 ; Set PA1 for Program Memory Page else P4_CALL_2_V P2_CALL_3_V P2_CALL_3_V
001A 04A3
001B 05C3
001F
M M M M 00104 00105 00106 00107 M M M M M M M M M M M M M M 00108 00109 00110 00111 00112 00113 00114 00115 00116 00117 00118 00119 00120 00121 00122 00123 00124 00125 00126 00127 00128 00129 M M M
STATUS, PA1
P4_CALL_2_V
P3_CALL_1_V
if ( ( P3_CALL_1_V & 0x0200 ) == 0x0200 ) BSF STATUS, PA0 ; Set PA0 for Program Memory Page else BCF STATUS, PA0 ; Clear PA0 for Program Memory Page endif ; if ( ( P3_CALL_1_V & 0x0400 ) == 0x0400 ) BSF STATUS, PA1 ; Set PA1 for Program Memory Page else BCF STATUS, PA1 ; Clear PA1 for Program Memory Page endif ; CALL nop nop P3_CALL_1_V
; P1_CALL_4 ; if ( (P1_CALL_4_V & 0x0600) != (P1_CALL_4 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; NOP NOP P1_CALL_4_END RETURN ; if ( (P1_CALL_4 & 0x0600) != (P1_CALL_4_END & 0x0600) ) MESSG Warning - User Defined: Call routine crosses page boundry endif ; nop nop ADDWF_MAC ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Page D_address, F
AN586
AN586
0024 04A4
0027 04A4
002A 04A4
002D 04A4
else BCF endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif ADDWF D_address, F ANDWF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif ANDWF D_address, F BCF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif BCF D_address, 7 BSF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 ) ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank FSR, RP0 ; Clear RP0 for Data Memory Bank
0030 04A4
0033 04A4
0036 04A4
; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank
BSF D_address, 7 BTFSC_MAC D_address, 7 ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif BTFSC D_address, 7 BTFSS_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 ) BSF FSR, RP1 ; Set RP1 for Data Memory Bank else BCF FSR, RP1 ; Clear RP1 for Data Memory Bank endif BTFSS D_address, 7 CLRF_MAC D_address ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank
AN586
; if ( ( D_address & 0x040 ) == 0x040 ) BSF FSR, RP1 ; Set RP1 for Data Memory Bank else BCF FSR, RP1 ; Clear RP1 for Data Memory Bank endif CLRF D_address
AN586
0039 04A4
003C 04A4
003F 04A4
COMF_MAC ;
D_address, F
if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif COMF D_address, F DECF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif DECF D_address, F DECFSZ_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif DECFSZ D_address, F INCF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank
0042 04A4
0045 04A4
0048 04A4
004B 04A4
BCF endif ;
FSR, RP0
if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif INCF D_address, F INCFSZ_MAC D_address, ;
) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank
if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif INCFSZ D_address, F IORWF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif IORWF D_address, F MOVF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 ) BSF FSR, RP1 ; Set RP1 for Data Memory Bank ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank
AN586
AN586
004E 04A4
0051 04A4
0054 04A4
else BCF endif MOVF D_address, F MOVWF_MAC D_address ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif MOVWF D_address RLF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif RLF D_address, F RRF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif RRF D_address, F SUBWF_MAC D_address, ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank FSR, RP1 ; Clear RP1 for Data Memory Bank
0057 04A4
005A 04A4
005D 04A4
0060 04A3
; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif SUBWF D_address, F SWAPF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 BSF FSR, RP1 else BCF FSR, RP1 endif SWAPF D_address, F XORWF_MAC D_address, ; if ( ( D_address & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( D_address & 0x040 ) == 0x040 ) BSF FSR, RP1 ; Set RP1 for Data Memory Bank else BCF FSR, RP1 ; Clear RP1 for Data Memory Bank endif XORWF D_address, F PAGE_MAC P1_CALL_4 ; if ( ( P1_CALL_4 & 0x0200 ) == 0x0200 ) BSF STATUS, PA0 ; Set PA0 for Program Memory Page else BCF STATUS, PA0 ; Clear PA0 for Program Memory Page ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank ) ; Set RP1 for Data Memory Bank ; Clear RP1 for Data Memory Bank
AN586
AN586
M endif M ; M if ( ( P1_CALL_4 & 0x0400 ) == 0x0400 ) M BSF STATUS, PA1 ; Set PA1 for Program Memory Page M else 0061 04C3 M BCF STATUS, PA1 ; Clear PA1 for Program Memory Page M endif M ; 00150 BANK_MAC D_address M ; M if ( ( D_address & 0x020 ) == 0x020 ) M BSF FSR, RP0 ; Set RP0 for Data Memory Bank M else 0062 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank M endif M ; M if ( ( D_address & 0x040 ) == 0x040 ) M BSF FSR, RP1 ; Set RP1 for Data Memory Bank M else 0063 04C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank M endif 00151 00152 00153 0064 00154 P1_CALL_5 00155 ; 00156 if ( (P1_CALL_5_V & 0x0600) != (P1_CALL_5 & 0x0600) ) 00157 MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page 00158 endif 00159 ; 0064 0000 00160 NOP 0065 0000 00161 NOP 00162 ; 0200 00163 org P2_TOP ; This is to force an intentional User Defined Message 00164 ; 0200 0000 00165 NOP 0201 0000 00166 NOP 0202 0800 00167 P1_CALL_5_END RETURN 00168 ; 00169 if ( (P1_CALL_5 & 0x0600) != (P1_CALL_5_END & 0x0600) ) Message[301]: MESSAGE: (Warning - User Defined: Call routine crosses page boundry) 00170 MESSG Warning - User Defined: Call routine crosses page boundry 00171 endif 00172 ; 00173 0203 0A08 00174 P2_CALL_1_V GOTO P2_CALL_1 0204 0A0B 00175 P2_CALL_2_V GOTO P2_CALL_2
020E 04A3
020F 04C3
0210 0902 0211 0000 0212 0000 0213 0000 0214 0000 0215 0800
00176 00177 00178 00179 00180 00181 00182 00183 00184 00185 00186 00187 00188 00189 00190 00191 00192 00193 00194 00195 00196 00197 00198 00199 M M M M M M M M M M M M M M 00200 00201 00202 00203 00204 00205 00206 00207 00208
P2_CALL_1
; if ( (P2_CALL_1_V & 0x0600) != (P2_CALL_1 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P2_CALL_2
; if ( (P2_CALL_2_V & 0x0600) != (P2_CALL_2 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; CALLM ; if ( ( P1_CALL_3_V & 0x0200 ) == 0x0200 ) BSF STATUS, PA0 ; Set PA0 for Program Memory Page else BCF STATUS, PA0 ; Clear PA0 for Program Memory Page endif ; if ( ( P1_CALL_3_V & 0x0400 ) == 0x0400 ) BSF STATUS, PA1 ; Set PA1 for Program Memory Page else BCF STATUS, PA1 ; Clear PA1 for Program Memory Page endif ; CALL nop nop P2_CALL_3 NOP NOP RETURN P1_CALL_3_V P1_CALL_3_V
AN586
; if ( (P2_CALL_3_V & 0x0600) != (P2_CALL_3 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page
DS00586B-page 18 0216 04A3 0217 04C3 0218 0A0A 0219 0000 021A 0000 021B 0800 021C 0000 021D 0000 021E 0800 1997 Microchip Technology Inc. 021F 04A4
AN586
00209 00210 00211 00212 M M M M M M M M M M M M M M 00213 00214 00215 00216 00217 00218 00219 00220 00221 00222 00223 00224 00225 00226 00227 00228 00229 00230 00231 00232 00233 M M M M M M M M
endif ; GOTOM ; if ( ( P1_CALL_2 & 0x0200 ) == 0x0200 ) BSF STATUS, PA0 ; Set PA0 for Program Memory Page else BCF STATUS, PA0 ; Clear PA0 for Program Memory Page endif ; if ( ( P1_CALL_2 & 0x0400 ) == 0x0400 ) BSF STATUS, PA1 ; Set PA1 for Program Memory Page else BCF STATUS, PA1 ; Clear PA1 for Program Memory Page endif ; GOTO ; P2_CALL_4 P1_CALL_2 P1_CALL_2
; if ( (P2_CALL_4_V & 0x0600) != (P2_CALL_4 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P2_CALL_5
; if ( (P2_CALL_5_V & 0x0600) != (P2_CALL_5 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; MOVF_MAC ; if ( ( BANK0_T & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Bank else BCF FSR, RP0 ; Clear RP0 for Data Memory Bank endif ; if ( ( BANK0_T & 0x040 ) == 0x040 ) BANK0_T, 0
0222 05A4
0225 04A4
0226 05C4
0227 0210
0228 05A4
0229 05C4
022A 0030
; Set RP1 for Data Memory Page ; Clear RP1 for Data Memory Page
if ( ( BANK1_T & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Page else BCF FSR, RP0 ; Clear RP0 for Data Memory Page endif ; if ( ( BANK1_T & 0x040 ) == 0x040 ) BSF FSR, RP1 ; Set RP1 for Data Memory Page else BCF FSR, RP1 ; Clear RP1 for Data Memory Page endif MOVWF BANK1_T MOVF_MAC BANK2_T, 0 ; if ( ( BANK2_T & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Page else BCF FSR, RP0 ; Clear RP0 for Data Memory Page endif ; if ( ( BANK2_T & 0x040 ) == 0x040 ) BSF FSR, RP1 ; Set RP1 for Data Memory Page else BCF FSR, RP1 ; Clear RP1 for Data Memory Page endif MOVF BANK2_T, 0 MOVWF_MAC BANK3_T ; if ( ( BANK3_T & 0x020 ) == 0x020 ) BSF FSR, RP0 ; Set RP0 for Data Memory Page else BCF FSR, RP0 ; Clear RP0 for Data Memory Page endif
AN586
; if ( ( BANK3_T & 0x040 ) == 0x040 ) BSF FSR, RP1 ; Set RP1 for Data Memory Page else BCF FSR, RP1 ; Clear RP1 for Data Memory Page endif MOVWF BANK3_T
AN586
0400 0400 0401 0402 0403 0404 0A05 0A08 0A0B 0A0E 0A05
00237 00238 00239 00240 00241 00242 00243 00244 00245 00246 00247 00248 00249 00250 00251 00252 00253 00254 00255 00256 00257 00258 00259 00260 00261 00262 00263 00264 00265 00266 00267 00268 00269 00270 00271 00272 00273 00274 00275 00276 00277 00278 00279 00280 00281 00282 00283
; org ; P3_CALL_1_V P3_CALL_2_V P3_CALL_3_V P3_CALL_4_V P3_CALL_5_V GOTO GOTO GOTO GOTO GOTO P3_TOP P3_CALL_1 P3_CALL_2 P3_CALL_3 P3_CALL_4 P3_CALL_5
P3_CALL_1
; if ( (P3_CALL_1_V & 0x0600) != (P3_CALL_1 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P3_CALL_2
; if ( (P3_CALL_2_V & 0x0600) != (P3_CALL_2 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P3_CALL_3
; if ( (P3_CALL_3_V & 0x0600) != (P3_CALL_3 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P3_CALL_4
; if ( (P3_CALL_4_V & 0x0600) != (P3_CALL_4 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ;
0600
00284 org P4_TOP 00285 ; 0600 0A08 00286 P4_CALL_1_V GOTO P4_CALL_1 0601 0A0B 00287 P4_CALL_2_V GOTO P4_CALL_2 0602 0A0E 00288 P4_CALL_3_V GOTO P4_CALL_3 0603 0A11 00289 P4_CALL_4_V GOTO P4_CALL_4 0604 0A14 00290 P4_CALL_5_V GOTO P4_CALL_5 00291 00292 ; 0605 0000 00293 P3_CALL_5 NOP ; This is to force an intentional User 0606 0000 00294 NOP 0607 0800 00295 RETURN 00296 ; 00297 if ( (P3_CALL_5_V & 0x0600) != (P3_CALL_5 & 0x0600) ) Message[301]: MESSAGE: (ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page) 00298 MESSG ERROR - User Defined: CALL VECTOR and CALL routine 00299 endif 00300 00301 ; 0608 0000 00302 P4_CALL_1 NOP 0609 0000 00303 NOP 060A 0800 00304 RETURN 00305 ; 00306 if ( (P4_CALL_1_V & 0x0600) != (P4_CALL_1 & 0x0600) ) 00307 MESSG ERROR - User Defined: CALL VECTOR and CALL routine 00308 endif 00309 00310 ; 060B 0000 00311 P4_CALL_2 NOP 060C 0000 00312 NOP 060D 0800 00313 RETURN 00314 ; 00315 if ( (P4_CALL_2_V & 0x0600) != (P4_CALL_2 & 0x0600) ) 00316 MESSG ERROR - User Defined: CALL VECTOR and CALL routine 00317 endif 00318 00319 ; 060E 0000 00320 P4_CALL_3 NOP 060F 0000 00321 NOP 0610 0800 00322 RETURN 00323 ; 00324 if ( (P4_CALL_3_V & 0x0600) != (P4_CALL_3 & 0x0600) ) 00325 MESSG ERROR - User Defined: CALL VECTOR and CALL routine 00326 endif 00327 00328 ; 0611 0000 00329 P4_CALL_4 NOP
Defined Message
AN586
AN586
00330 00331 00332 00333 00334 00335 00336 00337 00338 00339 00340 00341 00342 00343 00344 00345 00346 00347 00348 00349 00350 00351
NOP RETURN ; if ( (P4_CALL_4_V & 0x0600) != (P4_CALL_4 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P4_CALL_5
; if ( (P4_CALL_5_V & 0x0600) != (P4_CALL_5 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; ; org ; GOTO end - = Unused) XXXXXXXXXXXXXXXX XXXXXX---------XXXXXXXXXXX-------------------------------------------------XXXXXXXXXXXXXXXX ---------------------------------------------------------------------------X START ; Goto the begining of the program RESET_V
MEMORY USAGE MAP (X = Used, 0000 0040 0200 0400 0600 07C0 : : : : : : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX ----------------
All other memory blocks unused. Program Memory Words Used: Program Memory Words Free: 186 1862
0 0 reported, 2 reported,
0 suppressed 10 suppressed
AMERICAS (continued)
Toronto
Microchip Technology Inc. 5925 Airport Road, Suite 200 Mississauga, Ontario L4V 1W1, Canada Tel: 905-405-6279 Fax: 905-405-6253
ASIA/PACIFIC (continued)
Singapore
Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore 188980 Tel: 65-334-8870 Fax: 65-334-8850
ASIA/PACIFIC
Hong Kong
Microchip Asia Pacific Unit 2101, Tower 2 Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2-401-1200 Fax: 852-2-401-3431
Taiwan, R.O.C
Microchip Technology Taiwan 10F-1C 207 Tung Hua North Road Taipei, Taiwan, ROC Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Atlanta
Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 Fax: 770-640-0307
Boston
Microchip Technology Inc. 5 Mount Royal Avenue Marlborough, MA 01752 Tel: 508-480-9990 Fax: 508-480-8575
EUROPE
United Kingdom
Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5858 Fax: 44-118 921-5835
Beijing
Microchip Technology, Beijing Unit 915, 6 Chaoyangmen Bei Dajie Dong Erhuan Road, Dongcheng District New China Hong Kong Manhattan Building Beijing 100027 PRC Tel: 86-10-85282100 Fax: 86-10-85282104
Chicago
Microchip Technology Inc. 333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075
India
Microchip Technology Inc. India Liaison Office No. 6, Legacy, Convent Road Bangalore 560 025, India Tel: 91-80-229-0061 Fax: 91-80-229-0062
Denmark
Microchip Technology Denmark ApS Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45 4420 9895 Fax: 45 4420 9910
Dallas
Microchip Technology Inc. 4570 Westgrove Drive, Suite 160 Addison, TX 75248 Tel: 972-818-7423 Fax: 972-818-2924
Japan
Microchip Technology Intl. Inc. Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa 222-0033 Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122
France
Arizona Microchip Technology SARL Parc dActivite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Dayton
Microchip Technology Inc. Two Prestige Place, Suite 150 Miamisburg, OH 45342 Tel: 937-291-1654 Fax: 937-291-9175
Detroit
Microchip Technology Inc. Tri-Atria Office Building 32255 Northwestern Highway, Suite 190 Farmington Hills, MI 48334 Tel: 248-538-2250 Fax: 248-538-2260
Korea
Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea Tel: 82-2-554-7200 Fax: 82-2-558-5934
Germany
Arizona Microchip Technology GmbH Gustav-Heinemann-Ring 125 D-81739 Mnchen, Germany Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
Los Angeles
Microchip Technology Inc. 18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 949-263-1888 Fax: 949-263-1338
Italy
Arizona Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883
11/15/99
Shanghai
Microchip Technology RM 406 Shanghai Golden Bridge Bldg. 2077 Yanan Road West, Hong Qiao District Shanghai, PRC 200335 Tel: 86-21-6275-5700 Fax: 86 21-6275-5060
New York
Microchip Technology Inc. 150 Motor Parkway, Suite 202 Hauppauge, NY 11788 Tel: 631-273-5305 Fax: 631-273-5335
San Jose
Microchip Technology Inc. 2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955
Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999. The Companys quality system processes and procedures are QS-9000 compliant for its PICmicro 8-bit MCUs, KEELOQ code hopping devices, Serial EEPROMs and microperipheral products. In addition, Microchips quality system for the design and manufacture of development systems is ISO 9001 certified.
All rights reserved. 1999 Microchip Technology Incorporated. Printed in the USA. 11/99
Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchips products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies.