Professional Documents
Culture Documents
Revolution
John Bowers
Director, Institute for Energy Efficiency
Collaborators
UCSB: Dan Blumenthal, Larry Coldren, Martijn Heck, Jock Bovington, Molly Piels, Yongbo Tang,
Daoxin Dai, Sid Jain, Jon Peters
Intel : Richard Jones, Mike Morse, Yimin Kang, Mario Paniccia, Brian Koch
Aurrion: Eric Hall, Alex Fang, Greg Fish
Hewlett Packard: Di Liang, Marco Fiorentino, Raymond G. Beausoleil
1
Institute
Focused of Energy- Research
Solutions Efficiency
Lighting
A $1 LED light bulb 20x more efficient than an incandescent bulb
Computing
A new Moore’s Law for more energy-efficient computing
2
Outline
3
Global Data Timeline
Slide Courtesy Intel
A Zetabyte of
2
ZB
data is
generated in
one year
1.5
ZB
126 million blogs
234 million websites
1.73 billion web users
1
ZB
Generated data
90 trillion emails sent
exceeds global Twice as much
storage data generated
than can be
500
EB
capacity
stored
Internet video to pc
Internet traffic
Cisco forecast
2 dB/year
File sharing
Minnesota
Traffic Study
5
Source: Cisco VNI June, 2009
Transmission Research records
Space Division Multiplexing
Phase diversity (SDM) starting
started
WDM started PDM started
100
Capacity on a single fiber
10
Tb/s
100
Gb/s
10
1986 1990 1994 1998 2002 2006 2010
1980: 50 Mbit/s
Plot courtesy of P. Winzer and Chris Doerr
How do we get to Terabit Optical Ethernet?
100G standards being commercialized – 200G and 400G are
next – then onto Terabit
Ultra-Narrow Δν and
Tunable InP/Si Lasers
& Laser Arrays
Capability
THz-Bandwidth Chirped
Lidar & mmW Sources 256 QAM
1Tb/s Integrated Coherent PICs
Tx/Rx Capacity Epitaxial InP on Si
PICs
st
1 Gen Hybrid InP/Si
Laser Technology 100Gb/s All-Optical
Coherent Regeneration
100Gb/s Integrated
Tx/Rx Capacity 350 GHz fmax HBT
OPLL ASICs
st
1 Gen Optical
Phase-Locked Loops
QPSK Coherent
PICs
2015
2020
10
Monolithic Integration
S. C. Nicholes, et al.
Switch elements
Why Silicon Photonics?
Utilize advanced fabrication technologies for low cost, high volume integrated photonics.
The Solution: Optical Interconnects
• 3D layer stacking will be
prevalent in the 22nm
timeframe
al I/O
• Intra-chip optics can take
advantage of this
Optic
BUT: Silicon is reciprocal. How to make an isolator?
affic
technology
ptical tr
• Photonics layer (with
BUT: SiO2 is thermally
supporting electrical resistive. So, power dissipation of
active circuits)
devices moreis a problem, particularly for rings and DWDM
easily
o
signa ical
On-chip
integrated with high
ip opt
performance logic and
ls
BUT: Silicon is centrosymmetric (not
memory layers electro-optic)!
Photonic
Off-ch Plane
Memory Plane
So, • how to can
Layers integrate modulators?
be separately Logic Plane
optimized for performance
and yield
BUT: Silicon has an indirect gap and is a Kash,
poor absorber
“Photonics (not
in Supercomputing:
Lasers Si Manufacturing
OPTICAL
ANYWHERE,
INCREDIBLE
Very high High volume, POTENTIAL
bandwidth low cost
Long distances
InP Highly Silicon
Photonic integrated Photonic
Immunity Integrated
to Six Generations
Integrated
electrical noise
circuits Scalability circuits
Year
of
Production 1995 1998 2001 2004 2007 2010 2013 2016
DRAM
1/2
Pitch
(nm) 270 190 130 90 65 43 32 22
Wafer
Size
(mm) 150 200 200 200 300 Courtesy:
300 300
Rattner 450
(Intel)
Hybrid Silicon Photonics
16
Arrays of 16 DFBs with Electroabsorption
Modulators and Photodetectors
Laser A EAM
bandgap bandgap
Laser B
bandgap EAM
bandgap
8 Integrated
PD-DFB-EAM
16 DFB/PD
laser array
III-V
Si
10 mA, 1 V =10 mW
0.4 pJ/bit
25 Gbit/s
240µ
1
m
E/O response [dB]
0
-1
430µm
-2
-3
-4 42GHz
-5
-6
0 10 Frequency
20 [GHz]
30 40 50
Bitrate:50 Gb/s
ER: 9.8 dB
Vpp: 2 V 20ps
• Optical amplifiers
• Photodetectors
• Modulators
• Beam splitters
• Arrayed waveguide routers
8 AMPs 8 detectors
• Polarization rotators
• Coherent receivers
have all been demonstrated in the hybrid silicon
platform.
23
H. Park et al., PTL, 19(4), 230, February (2007).
State-of-the Art Electronic IP Router
• Problem: Bandwidth demands scaling faster than both silicon and
cooling technologies
Maximum configuration for CRS-1 92 Tbps (80 racks)
~1 Megawatt!!!
D. J. Blumenthal,
Director, LASOR
25
LASOR PIC Technologies
MOTOR
Optical Buffers
“An 8x8 InP Monolithic Tunable Optical Router (MOTOR) Packet Forwarding
Chip,” S. C. Nicholes, et. al., IEEE JLT, Special Issue on OFC, (2009)
(Invited).
iPhod = Fiber Like Losses on Chip -> 10x, 100x, 1000x reduction over today’s losses
Si3N4 waveguides on Si platform
3 cm
28
Network Interface Rate
*Courtesy of R. W. Tkach,
OIDA Annual Forum 2009
Power Savings
1.E+03
Energy
per
bit
(nJ) 1.E+02
1.E+01
1.E+00
1.E‐01
1.E‐02
1.E‐03
1.E‐04
Fast
Optical
Fast
Ethernet
Core
Router PON
ONU IPTV
Server
Switch Electrical
Switch
Switch
gate contact
BCB
n-DBR
oxide channel contact
aperture
injector active channel
pad region pad
p-DBR
i-DBR
18 0.7
DC and RF
Frequency response (dB)
0.35 35 Gb/s
12 1.0 5 1
measurement
~ 11GHz
15
f 3 dB ~ 1 1 G H z
1.75 -1V
10
6 3.0
Response (dB)
5
4 -2V
0
-5 0.8
4.4
Ibia s = 4 m A
-1 0
0
-1 5 V ga t e = 0 V
-3V -2 0
0 5 10
F re q ue nc y(G H z )
15
3 -4V 0.6
-6
Vgate
-12 2 0.4
o
-18 3 µm @ 20 C Channel
1 Vgate Vpn
0.2
0 5 10 15 20 Gate
FICSL I bias
0 0
0 1 2 3 4
Bias current, I bias (mA)
PetaFlop System
1 Peta-
FLOPS OI at ~1 pJ/bit
Computational Throughput
100
TFLOPS
100
GFLOPS
10 MW 1 MW 100 kW 10 kW 1 kW
Power Consumption *D. A. B. Miller, IEEE Proc., 2009
35