Professional Documents
Culture Documents
ABSTRACT
This paper describes the implementation for a basic fuzzy logic controller in Very High
speed integrated-circuit Hardware-Description Language (VHDL). It is not intended as
an introduction to fuzzy logic control methodology; instead, we try to demonstrate the
implementation of a fuzzy logic controller through the use of the VHDL code. Use of the
hardware description language (HDL) in the application is suitable for being
implemented into an Application Specific Integrated Circuit (ASIC) and Field
Programmable Gate Array (FPGA). The main advantages of using the HDL approach are
rapid prototyping, and allowing usage of powerful synthesis tools such as Xilinx ISE,
Synosys, Mentor Graphic, or Cadence to be targeted easily and efficiently.
1. INTRODUCTION
The motivation behind the implementation of a fuzzy controller in VHDL was driven by the
need for an inexpensive hardware implementation of a generic fuzzy controller for use in
industrial and commercial applications. A very simple fuzzy controller is used to demonstrate
this implementation. In the controller, an external device’s information, such as that from a
sensor, etc., is converted into an output control signal to drive a device(s) such as motors,
actuators etc., via the process of fuzzification, rule evaluation and defuzzification [1,2,3]. These
processes are all based on a set of membership functions and the details of this process can be
found in numerous publications [4, 5, 6, 7].
2. FUZZIFICATION
There are numerous different types of membership functions. Among them, the two most
commonly used in practice are the triangular and trapezoidal membership functions (triangular
membership function being a special case of the trapezoidal function). For this application we use
a trapezodial function.
Each trapezoidal membership function is defined by two points and two slope values. The
entire membership function can be divided into three segments: 0, 1 and 2 as shown in Figure 1.
The Y axis shows the degree of membership (µ) as a value between 0 and 1. The X axis shows
the universe of discourse and is divided into three segments. The degree of membership depends
on the location of the input value with reference to these three segments. Figure 1 shows how
trapezoidal input membership functions are formed in the fuzzification process [8, 9, 10].
The calculation of the degree of membership ((µ) can be categorized into three different
segments: (a) in segment 0: µ = 0, (b) in segment 1: slope is upward from left to right, therefore:
µ = (Input value – point 1) * slope Y
1, where µ is limited to a maximum Point α Segment 1 Point 2
value of 1, (c) in segment 2: slope is
1 Segment 0 Segment 2
downward from left to right,
therefore: µ = 1 - (Input value – Slope 2
µ Slope 1
point 2) * slope 2, where µ is
limited to a minimum value of 0. Point β
Point 1
As an example, let’s use the
input value of 10 to calculate the
0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15X
degree of membership function.
Using an 8-bit resolution
Figure 1. Trapezoidal Type Membership Function
computation, µ = 1 equals to $FF or
255 in decimal (the “$” sign indicates hexadecimal number representation). The values of Point
1 and Point 2 are $04 and $09, respectively, and the two slopes can be calculated as follows:
Since the input value of 10 ($0A) is greater than Point 2 and lies in segment 2, therefore:
µ = $FF – (Input value – point 2) * slope 2 = $FF – ($0A - $09)*$55 = $AA (3)
In VHDL, each membership function is defined by four 8-bit values, two points and two
slope values using record type declaration as follow [11]:
3. RULE EVALUATION
“AND” is a fuzzy operator which is the minimum operation between the two antecedents. In
VHDL, the following “minimum” function is used to obtain the result of each rule evaluation
between two variables:
There is also an implied “OR” operation between successive rules when more than one rule is
involved with the same output. The linguistic rule, IF (x1 is A1 AND y1 is B1) OR (x2 is A2 AND
y2 is B2) THEN z is C , can be implemented by taking the maximum value of all the results with
the same consequent block. In VHDL code, a function of taking the maximum of two input
variables to determine the final result of all rules with the same output can be written as:
By combining the “minimum” and “maximum’ functions, the truth value for each rule can be
obtained as:
4. DEFUZZIFICATION
During the defuzzification process, each fuzzy output is multiplied by its corresponding
singleton position. The sum of this product is divided by the sum of all fuzzy output to obtain the
result of the final output. In VHDL, this is implemented as:
For i = 1 to n do begin product = (s(i) × f(i)) + product; sum = f[i] + sum; end for loop;
output = product / sum;
Although several types of membership functions, such as singleton, trapezoidal etc., could be
used to describe the output using VHDL, the defuzzification calculation are not the same, some
are more complicated than others. If trapezoidal shapes are used, finding the center of gravity
and overall area of the membership functions are considerably more complicated than the
calculation on singletons, and the results are not necessary effective or better [8].
¾ Cold : Point1 = -55° ($00), Slope1 = 255, Point2 = -25° ($2A), Slope2 = 6
¾ Cool : Point1 = -25° ($2A), Slope1= 6, Point2 = 5° ($55), Slope2 = 6
¾ Mild : Point1 = 5° ($55), Slope1 = 6, Point2 = 35° ($7F), Slope2 = 6
¾ Warm : Point1 = 35° ($7F), Slope1 = 6, Point2 = 65° ($AA), Slope2 = 6
¾ Hot : Point1 = 65° ($AA), Slope1= 6, Point2 = 95° ($FF), Slope2 = 255
Since the 75°C vertical line intersects two membership functions, warm and hot respectively,
the degrees of these two membership function intersections can be calculated using the three
segment information as described above to obtain the grade of each membership intersection.
The following calculation shows how the grade of the membership is calculated for the
temperature value of 75°C:
type te_type is (cold, cool, mild, warm, hot, none); type te_ membership is record term: te_type;
point1: std_logic_vector(7 downto 0); slope1: std_logic_vector(7 downto 0);
point2: std_logic_vector(7 downto 0); slope2: std_logic_vector(7 downto 0);end record;
type te_membership_functions is array(natural range <>) te_membership;
constant te_mfs: te_membership_functions :=
((term => cold, point1 => x"00", slope1 => x"FF", point2 => x"2A", slope2 => x"06"), (term
=> cool, point1 => x"2A", slope1 => x"06", point2 => x"55", slope2 => x"06"), (term =>
mild, point1 => x"55", slope1 => x"06", point2 => x"7F", slope2 => x"06"),
(term => warm, point1 => x"7F", slope1 => x"06", point2 => x"AA", slope2 => x"06"),
(term => hot, point1 => x"AA", slope1 => x"06", point2 => x"D5", slope2 => x"FF"),
(term => none, point1 => x"FF", slope1 => x"FF", point2 => x"FF", slope2 => x"FF"));
type tr_type is (slow, moderate, fast); type tr_ membership is record term: tr_type;
point1: std_logic_vector(7 downto 0); slope1: std_logic_vector(7 downto 0);
point2: std_logic_vector(7 downto 0); slope2: std_logic_vector(7 downto 0); end record;
type tre_membership_functions is array(natural range <>) tr_membership;
constant tr_mfs: tr_membership_functions :=
((term => slow, point1 => x"00", slope1 => x"00", point2 => x"32", slope2 => x"03"),
(term => moderate, point1 => x"32", slope1 => x"03", point2 => x"7E", slope2 => x"03"),
(term => fast, point1 => x"7E", slope1 => x"03", point2 => x"FF", slope2 => x"FF"),
(term => none, point1 => x"FF", slope1 => x"FF", point2 => x"FF", slope2 => x"FF"));
Fuzzification():
75°C 1°C/s
Figure 6. Rule Evaluation Example
Understanding the evaluation of these rules in the fuzzy inference stage, the set of rule
evaluation in VHDL can be described as follow:
9. DEFUZZIFICATION MODULE
After the output grade of each rule has been determined, the next step is to combine all the
output grades into a single value that can be used to control the heater operation. In the
defuzzifier process, Center-of-Gravity (COG) [8, 9, 10] deffuzifiction technique will be used to
obtain the final system output. In this application, singleton variables are used as the output
membership functions. Defuzzification involves taking the weighted average of all the fuzzy
outputs. Each fuzzy output is multiplied by its corresponding singleton value, then the sum of
these products divided by the sum of all the fuzzy outputs to obtain the final single output
variable. The following pseudo-code illustrates the procedure of this defuzzification process:
Defuzzification():
CONCLUSION
The design of a typical fuzzy logic controller using VHDL is presented in this paper. Once
the basic design of the fuzzy logic control system has been defined, the implementation of the
fuzzy logic controller is very straight forward by coding each component of the fuzzy inference
system in VHDL according to the design specifications. The availability of different synthesis
tools for the programmable logic devices such as FPGA and CPLD have made it easier for the
designers to experiment their design capabilities. By simply changing some parameters in the
codes and design constraint on the specific synthesis tool, one can experiment with different
design circuitry to get the best result in order to satisfy the system requirement.
REFERENCES
[1] Madni Asad M, Wan L. A, Hansen, Robert K, Vuong Jim B, “Adaptive Fuzzy Logic Based Control
System for Rifle Stabilization”, Proceedings, 1998 World Automation Congress (WAC ’98),
Anchorage, Alaska, May 10-14, 1998, pp.103-112.
[2] Madni Asad M, Wan L.A, Vuong J. and Vuong P, “Fuzzy Logic Based Smart Controller for a
Cryogenic Cooler”, Proceedings 1996 World Automation Congress (WAC ’96), International
Symposium of Soft Computing in Industry (ISSCI), May 27-30, 1996, Volume 5, pp.481-488.
[3] Madni Asad M, Wan L. A, Kuo D and Vuong J, “Sensor Based Microcontroller Unit with Built In
Fuzzy Inference for an Endometrium Ablator”, Proceedings 1995, 3rd European Congress on
Intelligent Techniques and Soft Computing (EUFIT ’95), August 28-31, 1995, pp. 1621-1624.
[4] Zadeh, L.A., "Fuzzy Sets," Information and Control, 8, 338-353, 1965.
[5] Brubaker, David I., "Fuzzy Logic Basics: Intuitive Rules Replace Complex Math," EDN, June 18,
1992, pp.111.
[6] Glenn A, “Fundamentals of Fuzzy Logic Part I & II”, SENSORS, April 1993.
[7] Earl Cox, The Fuzzy Systems Handbook (1994), ISBN 0-12-194270-8
[8] Sibigtroth J, “Implementing Fuzzy Expert Rules in Hardware”, AI Expert, April 1992.
[9] Sibigtroth J, “Creating Fuzzy Micros”, Embedded Systems Programming, Vol. 4, December 1991.
[10] Sibigtroth J, “Fuzzy Logic for Embedded Microcontrollers”, Circuit Cellar, March 1995.
[11] Kevin Skahill, “VHDL for PROGRAMMABLE LOGIC”, Cypress Semiconductor, Addison-Wesley
Publishing., Inc. 1996.