Analog CMOS Integrated Circuits for High-Temperature Operation

with Leakage Current Compensation

Toyota Central R&D Labs.,Inc.
Kentaro Mizuno
Noiikazu Ohta
Fumitaka Kitagawa
Hiroshi Nagase

ABSTRACT- To facilitate high-temperature
operation of CMOS analog integrated circuits, we
proposed new compensation circuits which
compensated for PN-junction leakage current more
precisely than conventional compensation circuits.
As the result of applying these circuits to a voltage
reference circuit, the operating temperature region was
extended 20-40 “C.
1. Introduction
The operation of analog CMOS integrated circuits at
high temperature depends on the temperature
characteristics of the MOSFET’s parameters, e.g.,
threshold voltage, mobility and leakage currents of
parasitic diodes that exist between the sourcddrain
and the body(the n-well or the p-well). The operating
temperature range is limited by leakage current!;,
because leakage currents are drastically increased by
5-6 orders of magnitude from 25°C to 200°C.
In order to extend the operating temperature range of
analog CMOS integrated circuits, we propose new
leakage current compensation circuits.
effect on circuit currents, 11and 12, is reduced and the
circuit operation at high temperature remains stable.
However, in the conventional leakage current
compensation circuits, the compensation diode does
not have the same structure as; that of the parasitic
diode, e.g., for the circuit in Fig. 1, the compensation
diode Dlc is a p’n diode, and the parasitic diode D1 is
an n’p diode.
Therefore, it is very difficult to achieve a good
matching compensation current with a leakage current,
because this requires precise adjustment of the
junction area and the periphery of the compensation
diode for matching with the leakage current.
Load
Mi
\~. IL
.............-3t.. ...

2. Conventional Compensation of Leakage Circuit

Currents
To reduce the effects of leakage current on the
operation of analog CMOS integrated circuits, leakage
Fig. 1. Conventional Compensation Technique.
current compensation circuits with a compensation
diode were usually used [l]. For example, a
compensation diode Dlc is inserted between the drain
and the voltage source as shown in Fig. 1. In this
Even if the effective leakage current, I L - ~ c ,is
circuit, because a leakage current I,, which flows
reduced by a leakage current cornpensation circuit, the
from the drain to the body of n-channel MOSFET MI,,
effective leakage current is increased with temperature
is compensated by the reverse current IC (the
and then becomes over the operation-limited leakage
compensation current) of the compensation diode:,
current when the operation of analog CMOS
which flows into the drain node, the leakage current

0-7803-4540-1/98/$10.00 0 1998 IEEE 41

integrated circuits fails at high temperature.
Fig. 2 shows the theoretical calculation results of the
improvement of operation temperature in the case of
CMOS integrated circuits which failed at 150°C
without the compensation circuit. Where Err is the
compensation error defined as
IL : the leakage current
IC : the compensation current
The reverse current of a diode at high temperature is
dominated by the diffision current; therefore, the
following expression was used as IL and IC [ 2 ] .
KL : the constant of the leakage current
KL : the constant of the compensate current
The operation temperature is improved by about
20°C at Err=20%. Fig. 2 indicates that the
compensation circuit is not effective and that the
improvement in operation temperature is small when
Err is more than 20-30%. Therefore, It is strongly
required for the compensation circuit that the leakage
currents be precisely and stably compensated.
I I
IL:the leakage current
IC:the compensation current
0 20 40 60 80
Compensation Error Err ["h]
Fig. 2. A Compensation Error vs. Improvement of
Operating Temperature Region.
3. New Leakage Current Compensations
3.1.The Basic Circuit for Leakage Current
Compensation
We propose new leakage current compensation
circuits (Fig. 3) that basically consist of a current
mirror circuit and a compensation diode to solve the
conventional compensation circuit's disadvantage.
Fig. 3. The Proposed Compensation Circuit.
In the proposed circuits, a parasitic diode of another
n-channel MOSFET Mtc, which is manufactured
simultaneously, is used as the compensation diode;
therefore, the compensation diode has the same
I structure and same junction area as those of the
parasitic diode of the n-channel MOSFET MI.
Therefore, currents generated from the parasitic diode
and the compensation diode are quite the same, when
the voltage (in this case, connect to the VSS) that
keeps the channel current from flowing is applied
across the gate-source of the n-channel MOSFET MIC,
i.e.,
100 Because the directions of both currents are the same,
a current mirror circuit is used for changing the
direction and compensating the leakage current.
IeIL=ICo (5)
Thus, this compensation circuit can realize more
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precise and stabler operation than the conventional
compensation circuit, because of the manufacturing
dispersion in CMOS processing.

We applied the basic compensation technique to a

',1
voltage reference circuit for compensating leakage
currents of all parasitic diodes (Fig. 4) and obtained a
20°C improvement for high temperature operation (B
in Fig. 5).

3.2. Refinement of a Basic Leakage

Current Circuit
With addition of the basic leakage current
compensation circuit, we obtained a smaller
improvement, about 20°C . In this case, the
compensation error was about 20% and was mainly
caused by the reverse bias voltage dependence of the
leakage current. This is the reason that the current IC
which is generated from a high-biased diode is higher
than the current I, which is generated from a
low-biased diode.
Parasitic
Diode
Fig. 4. Leakage Current Compensation
of Voltage Reference Circuit.
The effect of reverse bias dependence on the leakage
current compensation can be reduced by adding a
sub-circuit consisting of M P ~&I, ,MN~and DKLas
shown in Fig. 6. In this leakage current compensation

-0.2 - U -
25 75 125 175 225
Temperature ["C]
Fig. 5. Temperature Characteristics of Vref .

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circuit, more precise leakage current matching can be of the operating temperature range was extended by
achieved because the deviation between IC and 4 is 20-40"c, and the usefulness of the proposed circuits
swept out by the sub-circuit. was confirmed.

Precise
REFERECES
[ 11 F.S.Shoucair, "Potential and problems of
high-temperature electronics and CMOS integrated
circuits(25-25O"C )- a n overview",
Microelectron Journal V01.22 N0.2 1991
[2] A.S.Grove,"Physics and Technology of
Semiconductor Devices",John Wiley & Sons, Inc.

Fig. 6. Precise Compensation Circuit.

Applying this refined circuit to the nodes in the

voltage reference circuit that are more sensitive to the
bias voltage dependence of the leakage current, the
upper limit of the operating temperature range was
extended by 20°C further, i.e., a total improvement of
40°C was obtained (C in Fig. 5).
In this case, the compensation error was about 5%
according to Fig. 2. If the compensation error is
improved much more, i.e., 4%, 3%, or less, we can
obtain a drastic advantage in the leakage current
compensation.
However, It is difficult to maintain a precise and
stable leakage current compensation. The maximum
improvement in high temperature operation is
considered to be 2040°C when using a leakage
current compensation circuit.

4. Conclusion
We propose new leakage current compensation
circuits to solve the disadvantage of a conventional
leakage current compensation circuit in an analog
CMOS integrated circuit.
Applying the proposed leakage current compensation
circuits to the voltage reference circuit, the upper limit

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